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TARGET DATA
June 2003
STW20NK70Z
N-CHANNEL 700V - 0.25
- 20A TO-247
Zener-Protected SuperMESHTMPower MOSFET
n
TYPICAL R
DS
(on) = 0.25
n
EXTREMELY HIGH dv/dt CAPABILITY
n
100% AVALANCHE TESTED
n
GATE CHARGE MINIMIZED
n
VERY LOW INTRINSIC CAPACITANCES
n
VERY GOOD MANUFACTURING
REPEATIBILITY
DESCRIPTION
The SuperMESHTM series is obtained through an
extreme optimization of ST's well established strip-
based PowerMESHTM layout. In addition to pushing
on-resistance significantly down, special care is tak-
en to ensure a very good dv/dt capability for the
most demanding applications. Such series comple-
ments ST full range of high voltage MOSFETs in-
cluding revolutionary MDmeshTM products.
APPLICATIONS
n
HIGH CURRENT, HIGH SPEED SWITCHING
n
IDEAL FOR OFF-LINE POWER SUPPLIES
ORDERING INFORMATION
TYPE
V
DSS
R
DS(on)
I
D
Pw
STW20NK70Z
700 V
< 0.285
20 A
300 W
SALES TYPE
MARKING
PACKAGE
PACKAGING
STW20NK70Z
W20NK70Z
TO-247
TUBE
TO-247
1
2
3
INTERNAL SCHEMATIC DIAGRAM
STW20NK70Z
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ABSOLUTE MAXIMUM RATINGS
( )
Pulse width limited by safe operating area
(1) I
SD
17A, di/dt
TBDA/s, V
DD
V
(BR)DSS
, T
j
T
JMAX.
(*) Limited only by maximum temperature allowed
THERMAL DATA
AVALANCHE CHARACTERISTICS
GATE-SOURCE ZENER DIODE
PROTECTION FEATURES OF GATE-TO-SOURCE ZENER DIODES
The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device's
ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be
applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and
cost-effective intervention to protect the device's integrity. These integrated Zener diodes thus avoid the
usage of external components.
Symbol
Parameter
Value
Unit
V
DS
Drain-source Voltage (V
GS
= 0)
700
V
V
DGR
Drain-gate Voltage (R
GS
= 20 k
)
700
V
V
GS
Gate- source Voltage
30
V
I
D
Drain Current (continuous) at T
C
= 25C
20
A
I
D
Drain Current (continuous) at T
C
= 100C
12
A
I
DM
( )
Drain Current (pulsed)
80
A
P
TOT
Total Dissipation at T
C
= 25C
300
W
Derating Factor
2.4
W/C
V
ESD(G-S)
Gate source ESD(HBM-C=100pF, R=1.5K
)
TBD
V
dv/dt (1)
Peak Diode Recovery voltage slope
TBD
V/ns
T
j
T
stg
Operating Junction Temperature
Storage Temperature
-55 to 150
C
Rthj-case
Thermal Resistance Junction-case Max
0.42
C/W
Rthj-amb
T
l
Thermal Resistance Junction-ambient Max
Maximum Lead Temperature For Soldering Purpose
50
300
C/W
C
Symbol
Parameter
Max Value
Unit
I
AR
Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by T
j
max)
TBD
A
E
AS
Single Pulse Avalanche Energy
(starting T
j
= 25 C, I
D
= I
AR
, V
DD
= 50 V)
TBD
mJ
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
BV
GSO
Gate-Source Breakdown
Voltage
Igs= 1mA (Open Drain)
30
V
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STW20NK70Z
ELECTRICAL CHARACTERISTICS (T
CASE
=25C UNLESS OTHERWISE SPECIFIED)
ON/OFF
DYNAMIC
SWITCHING ON
SWITCHING OFF
SOURCE DRAIN DIODE
Note: 1. Pulsed: Pulse duration = 300 s, duty cycle 1.5 %.
2. Pulse width limited by safe operating area.
3. C
oss eq.
is defined as a constant equivalent capacitance giving the same charging time as C
oss
when V
DS
increases from 0 to 80%
V
DSS
.
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
V
(BR)DSS
Drain-source
Breakdown Voltage
I
D
= 1 mA, V
GS
= 0
700
V
I
DSS
Zero Gate Voltage
Drain Current (V
GS
= 0)
V
DS
= Max Rating
V
DS
= Max Rating, T
C
= 125 C
1
50
A
A
I
GSS
Gate-body Leakage
Current (V
DS
= 0)
V
GS
= 20V
10
A
V
GS(th)
Gate Threshold Voltage
V
DS
= V
GS
, I
D
= 150 A
3
3.75
4.5
V
R
DS(on)
Static Drain-source On
Resistance
V
GS
= 10V, I
D
= 10 A
0.25
0.285
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
g
fs
(1)
Forward Transconductance
V
DS
= 15 V
,
I
D
= 10 A
19
S
C
iss
C
oss
C
rss
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
V
DS
= 25V, f = 1 MHz, V
GS
= 0
5000
470
100
pF
pF
pF
C
oss eq.
(3)
Equivalent Output
Capacitance
V
GS
= 0V, V
DS
= 0V to 640V
TBD
pF
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
t
d(on)
t
r
Turn-on Delay Time
Rise Time
V
DD
= 400 V, I
D
= A
R
G
= 4.7
V
GS
= 10 V
(Resistive Load see, Figure 3)
TBD
TBD
ns
ns
Q
g
Q
gs
Q
gd
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
V
DD
= 640V, I
D
= 20 A,
V
GS
= 10V
220
TBD
TBD
nC
nC
nC
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
t
d(off)
t
f
Turn-off Delay Time
Fall Time
V
DD
= 400 V, I
D
= A
R
G
= 4.7
V
GS
= 10 V
(Resistive Load see, Figure 3)
TBD
TBD
ns
ns
t
r(Voff)
t
f
t
c
Off-voltage Rise Time
Fall Time
Cross-over Time
V
DD
= 640 V, I
D
= 20 A,
R
G
= 4.7
,
V
GS
= 10V
(Inductive Load see, Figure 5)
TBD
TBD
TBD
ns
ns
ns
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
I
SD
I
SDM
(2)
Source-drain Current
Source-drain Current (pulsed)
20
80
A
A
V
SD
(1)
Forward On Voltage
I
SD
= 20 A, V
GS
= 0
1.6
V
t
rr
Q
rr
I
RRM
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
I
SD
= 20 A, di/dt = 100A/s
V
DD
= 100 V, T
j
= 150C
(see test circuit, Figure 5)
TBD
TBD
TBD
ns
C
A
STW20NK70Z
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Fig. 5: Test Circuit For Inductive Load Switching
And Diode Recovery Times
Fig. 4: Gate Charge test Circuit
Fig. 2: Unclamped Inductive Waveform
Fig. 1: Unclamped Inductive Load Test Circuit
Fig. 3: Switching Times Test Circuit For
Resistive Load
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STW20NK70Z
DIM.
mm.
inch
MIN.
TYP
MAX.
MIN.
TYP.
MAX.
A
4.85
5.15
0.19
0.20
A1
2.20
2.60
0.086
0.102
b
1.0
1.40
0.039
0.055
b1
2.0
2.40
0.079
0.094
b2
3.0
3.40
0.118
0.134
c
0.40
0.80
0.015
0.03
D
19.85
20.15
0.781
0.793
E
15.45
15.75
0.608
0.620
e
5.45
0.214
L
14.20
14.80
0.560
0.582
L1
3.70
4.30
0.14
0.17
L2
18.50
0.728
P
3.55
3.65
0.140
0.143
R
4.50
5.50
0.177
0.216
S
5.50
0.216
TO-247 MECHANICAL DATA
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