13-32
200V
HV20420P
HV20420PJ
HV20420X
200V
HV20620PJ
V
PP
V
NN
28-pin
28-lead plastic
Die
plastic DIP
chip carrier
HV20420
HV20620
Low Charge Injection
8-Channel High Voltage Analog Switch
Package Options
Ordering Information
General Description
Not recommended for new designs. Please use HV202 instead.
This device is a low charge injection 8-channel high-voltage
analog switch integrated circuit (IC) intended for use in applica-
tions requiring high voltage switching controlled by low voltage
control signals, such as ultrasound imaging and printers. Input
data is shifted into an 8-bit shift register which can then be
retained in an 8-bit latch. To reduce any possible clock feed-
through noise, Latch Enable Bar (LE) should be left high until all
bits are clocked in. Using HVCMOS technology, this switch
combines high voltage bilateral DMOS switches and low power
CMOS logic to provide efficient control of high voltage analog
signals.
This IC is suitable for various combinations of high voltage
supplies, e.g., V
PP
/V
NN
: +50V/150V, or +100V/100V.
The specifications for the HV204 and HV206 are identical except
that the pinouts in the 28-lead plastic chip carrier are different.
Features
s
s
HVCMOS
technology for high performance
s
s
Low charge injection
s
s
Very low quiescent power dissipation 10
A
s
s
Output On-resistance typically 22 ohms
s
s
Low parasitic capacitances
s
s
DC to 10MHz analog signal frequency
s
s
-60dB typical output off isolation at 5MHz
s
s
CMOS logic circuitry for low power
s
s
Excellent noise immunity
s
s
On-chip shift register, latch and clear logic circuitry
s
s
Flexible high voltage supplies
s
s
Surface mount package available
Absolute Maximum Ratings*
V
DD
Logic power supply voltage
-0.5V to +18V
V
PP
- V
NN
Supply voltage
220V
V
PP
Positive high voltage supply
-0.5V to V
NN
+200V
V
NN
Negative high voltage supply
+0.5V to -200V
Logic input voltages
-0.5V to V
DD
+0.3V
Analog Signal Range
V
NN
to V
PP
Peak analog signal current/channel
3.0A
Storage temperature
-65
C to +150
C
Power dissipation
1.2W
* Absolute Maximum Ratings are those values beyond which damage to the
device may occur. Functional operation under these conditions is not implied.
Continuous operation of the device at the absolute rating level may affect
device reliability.
13-34
HV20420/HV20620
Time to Turn Off V
SIG
*
t
SIG(OFF)
0
ns
Set Up Time Before LE Rises
t
SD
150
150
150
ns
Time Width of LE
t
WLE
150
150
150
ns
Clock Delay Time to Data Out
t
DO
175
175
190
ns
Time Width of CL
t
WCL
150
150
150
ns
Set Up Time Data to Clock
t
SU
15
15
8.0
20
ns
Hold Time Data from Clock
t
H
35
35
35
ns
Clock Freq
f
CLK
5.0
5.0
5.0
MHz
50% duty cycle
f
DATA
= f
CLK
/2
Turn On Time
t
ON
5.0
5.0
5.0
s
V
SIG
= V
PP
- 10V
Turn Off Time
t
OFF
5.0
5.0
5.0
s
V
SIG
= V
PP
- 10V
13
V
PP
= +50V
Maximum V
SIG
Slew Rate
dv/dt
V
NN
= -150V
13
V/ns
V
PP
= +100V
V
NN
= -100V
-30
-30
-33
-30
dB
f = 5.0 MHz,
Off Isolation
KO
1K
//15pF load
-45
-45
-60
-45
dB
f = 5MHz,
50
load
Switch Crosstalk
K
CR
-60
-60
-70
-60
dB
f = 5MHz,
50
load
Output Switch Isolation
I
ID
300
300
300
mA
300ns pulse width,
Diode Current
2.0% duty cycle
Off Capacitance SW to GND
C
SG(OFF)
5.0
17
5.0
12
17
5.0
17
pF
0V, 1MHz
On Capacitance SW to GND
C
SG(ON)
25
50
25
38
50
25
50
pF
0V, 1MHz
Output Voltage Spike
+V
SPK
150
V
PP
= +100V
mV
V
NN
= -100V
-V
SPK
150
R
L
= 50
0
C
+25
C
+70
C
Characteristics
Sym
min
max
min
typ
max
min
max
Units
Test Condition
*Time required for analog signal to turn off before output switch turns off.
Operating Conditions*
Symbol
Parameter
Value
V
DD
Logic power supply voltage
1,3
10.0V to 15.5 V
V
PP
Positive high voltage supply
1,3
50V to V
NN
+ 200V
V
NN
Negative high voltage supply
1,3
-100V to -150V
V
IH
High-level input voltage
V
DD
-2V to V
DD
V
IL
Low-level input voltage
0V to 2.0V
V
SIG
Analog signal voltage peak to peak
2
V
NN
+10V to V
PP
-10V
T
A
Operating free air-temperature
0
C to 70
C
Notes:
1 Power up/down sequence is arbitrary except GND must be powered-up first and powered-down last.
2 V
SIG
must be V
NN
V
SIG
V
PP
or floating during power up/down transistion.
3 Rise and fall times of power supplies V
DD
, V
PP
, and V
NN
should not be less than 1.0msec.
Electrical Characteristics
AC Characteristics
(over operating conditions V
DD
= 15V, unless otherwise noted)
13-35
13
HV20420/HV20620
Crosstalk
K
CR
= 20Log
V
OUT
V
IN
V
IN
= 10 V
PP
@5MHz
NC
50
V
PP
15V
V
NN
V
PP
V
NN
V
DD
GND
50
Output Voltage Spike
V
PP
15V
V
NN
V
PP
V
NN
V
DD
GND
V
OUT
1K
50
+V
SPK
V
SPK
OFF Isolation
K
O
= 20Log
V
OUT
V
IN
V
IN
= 10 V
PP
@5MHz
V
PP
15V
V
NN
V
PP
V
NN
V
DD
GND
R
L
V
OUT
T
ON
/T
OFF
Test Circuit
V
PP
15V
V
NN
V
PP
V
NN
V
DD
GND
V
PP
10V
R
L
10K
V
OUT
DC Offset ON/OFF
V
PP
15V
V
NN
V
PP
V
NN
V
DD
GND
V
OUT
100K
R
L
Switch OFF Leakage
I
SOL
V
PP
15V
V
NN
V
PP
V
NN
V
DD
GND
V
NN
+10
V
PP
10
Truth Table
D0
D1
D2
D3
D4
D5
D6
D7
LE
CL
SW0 SW1 SW2 SW3 SW4 SW5 SW6 SW7
L
L
L
OFF
H
L
L
ON
L
L
L
OFF
H
L
L
ON
L
L
L
OFF
H
L
L
ON
L
L
L
OFF
H
L
L
ON
L
L
L
OFF
H
L
L
ON
L
L
L
OFF
H
L
L
ON
L
L
L
OFF
H
L
L
ON
L
L
L
OFF
H
L
L
ON
X
X
X
X
X
X
X
X
H
L
HOLD PREVIOUS STATE
X
X
X
X
X
X
X
X
X
H
OFF OFF OFF OFF OFF OFF OFF OFF
Notes:
1. The eight switches operate
independently.
2. Serial data is clocked in on
the L
H transition CLK.
3. The switches go to a state
retaining their present
condition at the rising edge of
LE. When LE is low the shift
register data flows through
the latch.
4. D
OUT
is high when switch 7 is
on.
5. Shift register clocking has no
effect on the switch states if
LE is H.
6. The clear input overrides all
other inputs.
Test Circuits
PDF 
ZIP
