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Электронный компонент: HV440

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1
HV440
Absolute Maximum Ratings
V
PP1
- V
NN1
, power supply voltage
+240V
V
PP1
, positive high voltage supply
+120V
V
PP2
, positive gate voltage supply
+120V
V
NN1
, negative high voltage supply
-170V
V
NN2
, negative gate voltage supply
-170V
V
DD
, logic supply
+7.5V
Storage temperature
-65C to +150C
Power dissipation
800mW
Operating Voltage
Package Options
V
PP1
- V
NN1
SOW-16
220V
HV440WG
General Description
The Supertex HV440 is a monolithic integrated circuit capable of
generating up to a 70V RMS sine wave output at frequencies of
15Hz to 60Hz with a load of 5 North American RENs. Its output
rating can be enhanced to 20 North American RENs with the
addition of two Supertex MOSFETs: one N-Channel MOSFET,
the TN2524N8 and one P-Channel MOSFET, the TP2522N8.
The high voltage output P- and N-Channel transistors are con-
trolled independently by the logic inputs P
IN
and N
IN
. Connecting
the mode pin to ground will enable the device to be controlled with
a single input, N
IN
. This adds a 200ns deadband on the control
logic to avoid cross conduction on the high voltage output. A logic
high on N
IN
will turn the high voltage P-Channel on and the N-
Channel off. The high voltage outputs have pulse by pulse over
current protection set by two external sense resistors. Nominal
PWM logic input frequency is 100KHz.
Ordering Information
High-Voltage Ring Generator
Features
220V maximum operating voltage
Integrated high voltage transistors
Up to 70 V
RMS
ring signal
Pulse by pulse output over current protection
5 REN output capability
External MOSFETs enhance output rating to 20 REN
Applications
Microcontroller or microprocessor controlled high voltage
ring generator
Set-top/Street box ring generator
Pair gain ring generator
Wireless local loops
Fiber in the loop/to the curb
Coax cable loop
12/13/01
Supertex Inc. does not recommend the use of its products in life support applications and will not knowingly sell its products for use in such applications unless it receives an adequate "products liability
indemnification insurance agreement." Supertex does not assume responsibility for use of devices described and limits its liability to the replacement of devices determined to be defective due to
workmanship. No responsibility is assumed for possible omissions or inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications, refer to the
Supertex website: http://www.supertex.com. For complete liability information on all Supertex products, refer to the most current databook or to the Legal/Disclaimer page on the Supertex website.
Pin Configuration
top view
SOW-16
1
8
2
3
4
5
6
7
16
9
15
14
13
12
11
10
V
PP1
P
GND
GND
Mode
P
IN
N
IN
EN
V
DD
V
PP2
P
GATE
V
PSEN
HV
OUT
V
NSEN
N
GATE
V
NN2
V
NN1
2
Symbol Parameters
Min
Typ
Max
Unit
Conditions
V
PP1
High voltage positive supply
15
110
V
T
A
= -40C to +85C
V
PP2
Positive linear regulator output voltage
V
PP1
- 9.9
V
PP1
-19.1
V
T
A
= -40C to +85C
V
NN1
High voltage negative supply
V
PP1
- 220
-110
V
T
A
= -40C to +85C
V
NN2
Negative linear regulator output voltage V
NN1
+ 5.6
V
NN1
+ 10.5
V
T
A
= -40C to +85C
V
DD
Logic supply voltage
4.5
5.5
V
T
A
= -40C to +85C
I
PP1Q
V
PP1
quiescent current
250
400
A
P
IN
= N
IN
= 0V, T
A
= -40C to +85C
I
NN1Q
V
NN1
quiescent current
250
550
A
P
IN
= N
IN
= 0V, T
A
= -40C to +85C
I
DDQ
V
DD1
quiescent current
10
A
P
IN
= N
IN
= 0V
I
PP1
V
PP1
operating current
1.7
mA
No load, V
OUTP
and V
OUTN
switching at
100KHz, T
A
= -40C to +85C
I
NN1
V
NN1
operating current
1.9
mA
No load, V
OUTP
and V
OUTN
switching at
100KHz, T
A
= -40C to +85C
I
DD
V
DD
operating current
1.0
mA
I
IL
Mode logic input low current
25
A
Mode = 0V
V
IL
Logic input low voltage
0
1.0
V
V
DD
= 5.0V
V
IH
Logic input high voltage
4.0
5.0
V
V
DD
= 5.0V
High Voltage Output
Symbol Parameters
Min
Typ
Max
Unit
Conditions
R
SOURCE
V
OUT
P source resistance
60
80
I
OUT
= 100mA
R
SINK
V
OUT
P sink resistance
60
80
I
OUT
= -100mA
R/T
Change in source/sink resistance
0.33
/C
T
A
= -40C to +85C
over temperature
t
d(ON)
HV
OUT
delay time
150
ns
P
IN
= high to low, Mode = high
t
rise
HV
OUT
rise time
50
ns
P
IN
= high to low
t
d(OFF)
HV
OUT
delay time
200
ns
N
IN
= low to high, Mode = high
t
fall
HV
OUT
fall time
50
ns
N
IN
= low to high
t
db
Logic deadband time
200
ns
Mode = low
V
psen
HV
OUT
current source sense voltage
V
PP1
-0.75
V
PP1
-1.00
V
PP1
- 1.25
V
V
PP1
-0.67
V
PP1
-1.31
T
A
= -40C to +85C
V
nsen
HV
OUT
current sink sense voltage
V
NN1
+ 0.75 V
NN1
+ 1.00 V
NN1
+ 1.25
V
V
NN1
+ 0.65
V
NN1
+ 1.33
T
A
= -40C to +85C
t
shortP
HV
OUT
off delay time when current source
100
ns
sense is activated
t
shortN
HV
OUT
off time when current sink
100
ns
sense is activated
t
WHOUT
Minimum pulse width for HV
OUT
at V
PP1
500
ns
T
A
= -40C to +85C
t
WLOUT
Minimum pulse width for HV
OUT
at V
NN1
500
ns
T
A
= -40C to +85C
Electrical Characteristics
(Over operating supply voltage unless otherwise specified, T
A
= 25C.)
Truth Table
N
IN
P
IN
Mode
EN
HV
OUT
L
L
H
L
V
PP1
L
H
H
L
High Z
H*
L*
H
L
H
H
H
L
V
NN1
L
X
L
L
V
NN1
H
X
L
L
V
PP1
X
X
X
H
High Z
*This state will short V
PP1
to V
NN1
and should therefore be avoided.
HV440
3
Block Diagram
High
Voltage
Level
Translator
Logic
Linear
Reg
V
PP1
V
DD
V
DD
P
IN
N
IN
EN
Mode
GND
V
psen
P
gate
V
PP2
HV
OUT
P
GND
Current
Sense
and
Driver
Current
Sense
and
Driver
Linear
Reg
V
NN2
V
nsen
N
gate
V
NN1
High
Voltage
Level
Translator
Pin Description
V
PP1
Positive high voltage supply.
V
PP2
Positive gate voltage supply. Generated by an internal linear regulator. A 0.1F capacitor should be connected between
V
PP2
and V
PP1
.
V
NN1
Negative high voltage supply.
V
NN2
Negative gate voltage supply. Generated by an internal linear regulator. A 0.1F capacitor should be connected between
V
NN2
and V
NN1
.
V
DD
Logic supply voltage.
GND
Low voltage ground.
PGND
High voltage power ground.
P
IN
Logic control input. When mode is high, logic input high turns OFF output high voltage P-Channel.
N
IN
Logic control input. When mode is high, logic input high turns ON output high voltage N-Channel.
EN
Logic enable bar input. Logic low enables IC.
Mode
Logic mode input. Logic low activates 200nsec deadband. When mode is low, N
IN
turns on and off the high voltage N- and
P-Channels. Pin is not used and should be connected to V
DD
or ground.
HV
OUT
High voltage output. Voltage swings from V
PP1
to V
NN1
.
V
psen
Pulse by pulse over current sensing for P-Channel MOSFET.
V
nsen
Pulse by pulse over current sensing for N-Channel MOSFET.
P
gate
Gate drive for external P-channel MOSFET.
N
gate
Gate drive for external N-channel MOSFET.
HV440
4
Typical Application Circuit
High
Voltage
Level
Translator
Linear
Reg
V
PP1
V
DD
HV440
V
DD
GND
V
psen
P
gate
V
PP2
HV
OUT
1.5mH
P
GND
3.9
3.9
0.1
F
0.22
F
Sine Wave
Ring Output
Current
Sense
and
Driver
Current
Sense
and
Driver
Linear
Reg
Logic
N
IN
P
IN
Mode
EN
V
NN2
V
nsen
N
gate
V
NN1
0.1
F
High
Voltage
Level
Translator
-Controller
HV440
1235 Bordeaux Drive, Sunnyvale, CA 94089
TEL: (408) 744-0100 FAX: (408) 222-4895
www.supertex.com
12/13/010
2001 Supertex Inc. All rights reserved. Unauthorized use or reproduction prohibited.