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Электронный компонент: HV6810P

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12-142
10-Channel Serial-Input Latched Display Driver
HV6810
Ordering Information
Package Options
General Description
The HV6810 is a monolithic integrated circuit designed to drive a
dot matrix or segmented vacuum fluorescent display (VFD).
These devices feature a serial data output to cascade additional
devices for large displays.
A 10-bit data word is serially loaded into the shift register on the
positive-going transition of the clock. Parallel data is transferred
to the output buffers through a 10-bit D-type latch while the latch
enable input is high and is latched when the latch enable is low.
When the blanking input is high, all outputs are low.
Outputs are structures formed by double-diffused MOS (DMOS)
transistors with output voltage ratings of 80 volts and 25 milliam-
pere source-current capability. All inputs are compatible with
CMOS levels.
Features
s
s
High output voltage 80V
s
s
High speed 5MHz @ 5V
DD
s
s
Low power I
BB
0.1mA (All high)
s
s
Active pull down 100
A min
s
s
Output source current 100mA at 60V V
PP
s
s
Each device drives 10 lines
s
s
High-speed serially-shifted data input
s
s
5V CMOS-compatible inputs
s
s
Latches on all driver outputs
s
s
Pin-compatible improved replacement for UCN5810A
and TL4810A, TL4810B
Absolute Maximum Ratings
1
Logic supply voltage, V
DD
2
7.5V
Driver supply voltage, V
BB
2
90V
Output voltage
2
90V
Input voltage
2
-0.3V to V
DD
+ 0.3V
Continuous total power dissipation
18-Pin P-DIP
3
900mW
at 25
C free-air temperature
3
20-Pin SOIC
4
1000mW
20-Pin PLCC
4
1000mW
Operating Temperature Range
-40
to +85*C
Notes:
1. Over operating free-air temperature.
2. All voltages are referenced to V
SS
.
3. For operation above 25
C ambient derate linearly to 85
C at 15mW/
C.
4. For operation above 25
C ambient derate linearly to 85
C at 16.7mW/
C.
Device
18-Pin
20-Pin Small
20-Pin Plastic
Die
Plastic DIP
Outline Package
Chip Carrier
HV6810
HV6810P
HV6810WG
HV6810PJ
HV6810X
*For Hi-Rel process flow, refer to page 5-3 of the Databook.
12-143
Symbol
Parameter
Min
Typ
Max
Units
Conditions
V
OH
High-level output voltage
Q outputs
57.5
58
V
I
OH
= 25mA
Serial output
4
4.5
V
V
DD
= 4.5V, I
OH
= -100
A
V
OL
Low-level output voltage
Q outputs
0.15
1
V
I
OH
= 100
A, Blanking input at V
DD
Serial output
0.05
0.1
V
V
DD
= 4.5V, I
OL
= 100
A
I
OL
Low-level Q output current (pull-down current)
60
80
A
T
A
= Max, V
OL
= 0.7V
I
O(OFF)
Off-state output current
-1
-15
A
V
O
= 0, Blanking input
T
A
= Max at V
DD
I
H
High-level input current
1
A
V
I
= V
DD
I
DD
Supply current from V
DD
(standby)
10
50
A
All inputs at 0V, one Q output high
10
50
A
All inputs at 0V, all Q outputs low
I
BB
Supply current from V
BB
0.05
0.1
mA
All outputs low, all Q outputs open
0.05
0.1
mA
All outputs high, all Q outputs open
*
All typical values are at T
A
= 25
C, except for I
O
.
HV6810
Electrical Characteristics
DC Characteristics
(V
DD
= 5V
10%, V
BB
= 60V, V
SS
= 0, T
A
= 25
C unless otherwise noted)
Symbol
Parameter
Min
Nom
Max
Units
V
DD
Supply voltage
4.5
5.5
V
V
BB
Supply voltage
20
80
V
V
SS
Supply voltage
0
V
V
IH
High-level input voltage (for V
DD
= 5V)
3.5
5.3
V
V
IL
Low-level input voltage
-0.3
0.8
V
I
OH
Continuous high-level Q output current
-25
mA
f
CLK
Clock frequency
5
MHz
T
A
Operating free-air temperature
Plastic
-40
+85
C
Note:
Power-up sequence should be the following:
1. Connect ground.
2. Apply V
DD
.
3. Set all inputs (Data, CLK, Enable, etc.) to a known state.
4. Apply V
PP
.
Power-down sequence should be the reverse of the above.
Recommended Operating Conditions
AC Characteristics
(Timing requirements over recommended operating conditions)
Symbol
Parameter
Min
Typ
Max
Units
Conditions
t
W(CKH)
Pulse duration, clock high
100
ns
t
W(LEH)
Pulse duration, latch enable high
100
ns
t
SU(D)
Setup time, data before clock
50
ns
t
H(D)
Hold time, data after clock
50
ns
t
CKH-LEH
Delay time, clock to latch enable high
50
ns
t
pd
*
Propagation delay time, latch enable to output
0.3
s
*
Switching characteristics, V
BB
= 60V, T
A
= 25
C.
12-144
VALID
IRRELEVANT
INVALID
VALID
PREVIOUSLY STORED DATA
NEW DATA VALID
VALID
Clock
Data In
SR Contents
Latch
Enable
Latch
Contents
Blanking
Q Outputs
V
DD
Input
V
SS
Input Equivalent Circuit
V
SS
Output
Logic Data Output
V
BB
Input and Output Equivalent Circuits
HV6810
Timing Diagram
12-145
w(CKH)
t
50%
50%
V
IH
V
IL
V
IH
V
IL
Valid
50%
50%
Data
Clock
h(D)
t
su(D)
t
50%
V
IH
V
IL
V
IH
V
IL
50%
50%
CKHLEH
t
Valid
Valid
90%
Clock
Input
Latch
Enable
Output
pd
t
w(LEH)
t
HV6810
Serial
Shift Register Contents
Serial
Latch Contents
Output Contents
Clock
Strobe
Blanking
Data
Data
Input
Input
Input
Input
I
1
I
2
I
3
... I
N-1
I
N
Output
I
1
I
2
I
3
... I
N-1
I
N
I
1
I
2
I
3
... I
N-1
I
N
H
H R
1
R
2
... R
N-2
R
N-1
R
N-1
L
L R
1
R
2
... R
N-2
R
N-1
R
N-1
X
R
1
R
2
R
3
... R
N-1
R
N
R
N
X X X ... X
X
X
L
R
1
R
2
R
3
... R
N-1
R
N
P
1
P
2
P
3
... P
N-1
P
N
P
N
P
1
P
2
P
3
... P
N-1
P
N
P
1
P
2
P
3
... P
N-1
P
N
X X X ... X
X
H
L L L ... L
L
L
H
L = Low logic level
H = High logic level
X = Irrelevant
P = Present state
R = Previous state
Function Table
Functional Block Diagram
Input Timing
Output Switching Times
Switching Waveforms
Blanking
Latch Enable
Q1
Q9
Q2
Q10
1D
C1
C2
2D
1D
C1
1D
C1
1D
C1
C2
2D
C2
2D
C2
2D
Data Input
Clock
R1
R2
R9
R10
LC1
LC2
LC9
LC10
Latches
Shift Register
6 Stages
(Q3 thru Q8)
not shown
Serial
Out
Logic Diagram (positive logic)
12-146
19
20
1
2
3
18
17
16
15
14
13
12
11
10
9
4
5
6
7
8
top view
1
10
2
3
4
5
6
7
8
9
20
11
19
18
17
16
15
14
13
12
top view
HV6810
Pin Configurations
HV6810
18-Pin DIP
Pin
Function
Pin
Function
1
Q8
10
Q3
2
Q7
11
Q2
3
Q6
12
Q1
4
Clock
13
Blanking
5
V
SS
14
Data in
6
V
DD
15
V
BB
7
LE (strobe)
16
Serial data out
8
Q5
17
Q10
9
Q4
18
Q9
Package Outlines
HV6810
20-Pin Plastic PLCC
Pin
Function
Pin
Function
1
Q8
11
Q3
2
Q7
12
Q2
3
Q6
13
Q1
4
Clock
14
Blanking
5
N/C
15
Data In
6
V
SS
16
N/C
7
V
DD
17
V
BB
8
LE(Strobe)
18
Serial data out
9
Q5
19
Q10
10
Q4
20
Q9
20-pin PLCC
HV6810
20-Pin SOW
Pin
Function
Pin
Function
1
Q8
11
Q3
2
Q7
12
Q2
3
Q6
13
Q1
4
Clock
14
Blanking
5
V
SS
15
Data in
6
N/C
16
V
BB
7
V
DD
17
Serial data out
8
LE (strobe)
18
N/C
9
Q5
19
Q10
10
Q4
20
Q9
SOW-20
1
2
3
4
5
6
7
8
9
18
17
16
15
14
13
12
11
10
top view
18-pin DIP