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Электронный компонент: HV7620DG

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02/96/022
Supertex Inc. does not recommend the use of its products in life support applications and will not knowingly sell its products for use in such applications unless it receives an adequate "products liability
indemnification insurance agreement." Supertex does not assume responsibility for use of devices described and limits its liability to the replacement of devices determined to be defective due to
workmanship. No responsibility is assumed for possible omissions or inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications, refer to the
Supertex website: http://www.supertex.com. For complete liability information on all Supertex products, refer to the most current databook or to the Legal/Disclaimer page on the Supertex website.
Ordering Information
Package Options
Device
64 Pin Plastic Gullwing
80-Lead Ceramic Gullwing
Die in Wafer Form
HV76
HV7620PG
HV7620DG
HV7620XW
General Description
The HV76 is a low-voltage serial to high-voltage parallel con-
verter with push-pull outputs. This device has been designed for
use as a driver for color AC plasma displays.
The device has 4 parallel 8-bit shift registers permitting data rate
4 times the speed of one. The data are clocked in simultaneously
on all four data inputs with a single clock. Data are shifted in on
a low to high transition of the clock. The latches and control logic
perform the output enable function.
The DIR pin causes clockwise (CW) shifting of the data when
connected to V
DD1
, and counterclockwise (CCW) shifting when
connected to GND. Operation of the shift register is not affected
by the LE (latch enable) input. Transfer of data from the shift
registers to the latches occurs when the LE input is high. Data is
stored in the latches when LE is low. The current source on the
logic inputs provides active pull up when the input pins are open.
HV7620
40MHz, 32-Channel Serial to Parallel Converter
with Push-Pull Outputs
Absolute Maximum Ratings
Supply voltage
1
, V
DD1
-0.5V to +15V
Supply voltage
1
, V
DD2
-0.5V to +15V
Supply voltage
1
, V
PP
-0.5V to +225V
Logic input levels
1
-2.0V to V
DD1
+2.0V
Continuous total power dissipation
2
Plastic
1200mW
Ceramic
1900mW
Operating temperature range
Plastic
-40C to +85C
Ceramic
-55C to 125C
Storage temperature range
-65C to +150C
Notes:
1. All voltages are referenced to GND.
2. For operation above 25C ambient derate linearly to maximum operating
temperature at 20mW/C for plastic and at 19mW/C for ceramic.
Features
Processed with HVCMOS
technology
5V CMOS logic and 12V supply rail
Output voltage up to 200V
Low power level shifting
Source/sink current minimum 50mA
40MHz equivalent data rate
Chip select
Polarity function
Forward and reverse shifting options (DIR pin)
Latched outputs
2
AC Characteristics
(Logic signal inputs and data inputs have t
r
, t
f
5ns. V
DD1
= 5V or 12V, V
DD2
= 12V, V
PP
= 200V)
Symbol
Parameters
Min
Max
Units
Condition
f
CLK
Clock frequency
V
DD1
= 5V
10
MHz
Per register C
L
= 15pF
V
DD1
= 12V
5
MHz
Per register C
L
= 15pF
t
WL
, t
WH
Clock width high or low
40
ns
t
SU
Data set-up time
20
ns
t
H
Data hold time
20
ns
t
ON
, t
OFF
Time from LE to HV
OUT
275
ns
C
L
= 15pF
t
WLE
Width of LE pulse
25
ns
t
DLE
Delay time clock to LE low to high
50
ns
t
SLE
LE setup time before clock rises
20
ns
t
DLF
, t
DLN
BL or CS low to high to HV
OUT
250
ns
t
COF
, t
CON
Clock to HV
OUT
275
ns
t
DLH
Delay time clock to data low to high
100
ns
C
L
= 15pF
t
DHL
Delay time clock to data high to low
100
ns
C
L
= 15pF
Electrical Characteristics
(over recommended operating conditions unless noted)
DC Characteristics
(V
DD1
= 5V, V
DD2
= 12V, V
PP
= 200V and T
A
= 25C)
Symbol
Parameters
Min
Max
Units
Condition
I
DD1
V
DD1
supply current
5
mA
f
CLK
=10MHz
I
DD2
V
DD2
supply current
20
mA
V
DD2
= V
DD2
max
f
CLK
= 10 MHz
I
PP
High voltage supply current
2
mA
All output high or low
I
DD1Q
Quiescent V
DD1
supply current
100
A
All input = V
DD1
I
DD2Q
Quiescent V
DD2
supply current
100
A
All input = V
DD1
V
OH
High-level output
185
V
I
O
= -50mA
V
OL
Low-level output
20
V
I
O
= 50mA
I
IH
High-level logic input current
1.0
A
V
IN
= V
DD1
I
IL
Low-level logic input current
-10
A
V
IN
= 0V
V
GG
HVGND to LVGND voltage difference
-1.0
1.0
V
Recommended Operating Conditions
Symbol
Parameters
Min
Max
Unit
V
DD1
Logic supply voltage
4.5
V
DD2
V
V
DD2
12V supply voltage
10.8
13.2
V
V
PP
High voltage supply voltage
50
200
V
V
IH
High-level input voltage
V
DD1
-0.5V
V
DD1
V
V
IL
Low-level input voltage
0
0.5
V
f
CLK
Clock frequency
V
DD1
= 5V
10
MHz
V
DD1
= 12V
5
MHz
T
A
Operating free-air temperature
Plastic
-40
+85
C
Ceramic
-55
+125
C
I
OD
Allowable pulsed current through
500
mA
ouptut diodes
1
I
GND(Vpp)
Allowable pulsed V
PP
or HVGND current
1
16
A
V
PP(SLEW)
2
Slew rate of V
PP
340
V/s
Notes:
1.The current pulse width = 500ns, duty cycle = 5%.
2.This device cannot be hot-switched for output frequency greater than 500Hz. For output frequency greater than 500Hz, V
PP
must be ramped.
HV7620
3
HV7620
CLK
Data Input
50%
50%
50%
50%
t
SU
t
H
t
WL
t
f
t
WH
t
r
90%
10%
50%
90%
10%
50%
t
DLE
t
WLE
t
SLE
10%
90%
t
OFF
LE
t
ON
V
IH
V
IL
V
IH
V
IL
V
IH
V
IL
V
OH
V
OL
V
OH
V
OL
HV
OUT
HV
OUT
50%
50%
50%
50%
t
DHL
t
COF
t
CON
t
DLH
Data Valid
V
OH
V
OL
V
OH
V
OL
Data Output
10%
t
DLF
90%
t
DLN
V
IH
V
IL
V
OH
V
OL
BLA, BLB,
BLC, BLD, or CS
HV
OUT
V
DD1
Input
Logic Inputs
V
DD1
V
PP
HV
OUT
V
DD2
LVGND
LVGND
HVGND
DATA OUT
Logic Data Output
High Voltage Outputs
Switching Waveforms
Input and Output Equivalent Circuits
4
HV7620
8
8-bit
shift
register
LE
BLA CS
POL
D
OUT
A
CLK
HV
OUT
A1
QA1
8-bit
latches
QA8
D
IN
B
D
IN
A
D
IN
C
D
IN
D
D
OUT
B
8
BLB
DIR
HV
OUT
B1
D
OUT
C
D
OUT
D
8
BLC
HV
OUT
C1
8
BLD
HV
OUT
D1
HV
OUT
A8
HV
OUT
B8
HV
OUT
C8
HV
OUT
D8
8-bit
shift
register
QB1
8-bit
latches
QB8
8-bit
shift
register
QC1
8-bit
latches
QC8
8-bit
shift
register
QD1
8-bit
latches
QD8
Functional Block Diagram
Inputs
HV Outputs
Function
D
IN
A
D
IN
B
D
IN
C
D
IN
D
CLK
LE
DIR
BLA
BLB
BLC
BLD
CS
POL
A
B
C
D
All O/P High
X
X
X
X
X
X
X
X
X
X
X
L
L
H
H
H
H
All O/P Low
X
X
X
X
X
X
X
X
X
X
X
L
H
L
L
L
L
"A" Outputs Low
X
X
X
X
X
X
X
L
X
X
X
X
H
L
*
*
*
Normal Polarity
X
X
X
X
X
X
X
H
H
H
H
H
H
No Inversion
Outputs Inverted
X
X
X
X
X
X
X
H
H
H
H
H
L
Inversion
Transparent Mode
H
L
L
L
H
X
H
H
H
H
H
H
H
L
L
L
Data Stored
X
X
X
X
X
L
X
H
H
H
H
H
H
Stored Data
Shift CW
X
X
X
X
H
H
H
H
H
H
H
X
A
N
B
N
C
N
D
N
A
N+1
B
N+1
C
N+1
D
N+1
Shift CCW
X
X
X
X
H
L
H
H
H
H
H
X
A
N
B
N
C
N
D
N
A
N1
B
N1
C
N1
D
N1
Function Table
Notes:
H = High level, L = Low level, X = Irrelevant, = Low to high transition.
* = Dependent on previous stage's state before the last CLK for last LE high.
Power-up sequence:
GND (HV, LV)
V
DD2
V
DD1
Logic Input Signals
V
PP
To power down reverse the sequence above.
The V
PP
should not drop below V
DD
or float during operation.
5
1235 Bordeaux Drive, Sunnyvale, CA 94089
TEL: (408) 744-0100 FAX: (408) 222-4895
www.supertex.com
02/06//02
2002 Supertex Inc. All rights reserved. Unauthorized use or reproduction prohibited.
HV7620
Pin
Function
33
CS
34
D
OUT
B
35
D
IN
B
36
D
IN
A
37
D
OUT
A
38
CLK
39
BLA
40
BLB
41
V
DD1
42
LVGND
43
N/C
44
HVGND
45
HVGND
46
V
PP
47
HV
OUT
D4
48
HV
OUT
C4
49
HV
OUT
B4
50
HV
OUT
A4
51
HV
OUT
D3
52
HV
OUT
C3
53
HV
OUT
B3
54
HV
OUT
A3
55
HV
OUT
D2
56
HV
OUT
C2
57
HV
OUT
B2
58
HV
OUT
A2
59
HV
OUT
D1
60
HV
OUT
C1
61
HV
OUT
B1
62
HV
OUT
A1
63
V
PP
64
HVGND
Pin
Function
1
HVGND
2
V
PP
3
HV
OUT
D8
4
HV
OUT
C8
5
HV
OUT
B8
6
HV
OUT
A8
7
HV
OUT
D7
8
HV
OUT
C7
9
HV
OUT
B7
10
HV
OUT
A7
11
HV
OUT
D6
12
HV
OUT
C6
13
HV
OUT
B6
14
HV
OUT
A6
15
HV
OUT
D5
16
HV
OUT
C5
17
HV
OUT
B5
18
HV
OUT
A5
19
V
PP
20
HVGND
21
HVGND
22
V
DD2
23
BLC
24
BLD
25
LE
26
D
OUT
D
27
D
IN
D
28
D
IN
C
29
D
OUT
C
30
POL
31
LVGND
32
DIR
Pin Configurations
Index
1
24
64
41
25
40
top view
3-sided Plastic 64-pin Gullwing Package
Package Outline
HV76
*Pins 65 to 80 are N/C (ceramic only)
65
80
1
24
25
40
41
64
Index
top view
80-pin Ceramic Gullwing Package