ChipFind - документация

Электронный компонент: 73M2901-32IH

Скачать:  PDF   ZIP

Document Outline

73M2901/3.3V
Advanced Single
Chip Modem
DESCRIPTION
The 73M2901/3.3V is a single-chip modem that
combines all the controller (DTE) and data pump
functions necessary to implement an intelligent
V.22bis data modem. This device is based on TDK
Semiconductor's implementation of the industry
standard 8032 microcontroller core with a proprietary
multiply and accumulate (MAC) coprocessor; Sigma-
Delta A/D and D/A converters; and an analog front
end. The ROM and RAM necessary to operate the
modem are contained on the device. Additionally,
the 73M2901/3.3V provides an on-chip oscillator and
Hybrid driver.
The 73M2901/3.3V is a high performance, low
voltage, low power, single chip modem capable of
data transmission and reception through 2400bps.
The 73M2901/3.3V is intended for embedded
applications and battery operation. This device
offers low power 3.3 volt design with optional
internal hybrid and country specific call progress
support.
FEATURES
Low overall system chip count. True one
chip solution for embedded systems
Low operating power (~120mW @ 3.3V,
automatic low power standby and power
down options available)
Internal ROM and RAM for normal operation
On chip optional hybrid driver
Designed for +3.15 through +3.6 volts
Data speeds:

V.22bis 2400bps

V.22, Bell 212 1200bps

V.21, Bell 103 300bps

V.23 1200/75bps (w/ turnaround (PAVI))

Bell 202 1200bps

Bell 202 and V23 4-wire operations
Dynamic Range: -9dBm to 43 dBm
"AT" command set
Host access to modem port pins via AT
commands for custom I/O expansion
DTMF tone generation and detection
Call progress support with multinational
options (FCC68, CTR21, JATE...)
Caller ID capability
Blacklisting capability
Packaging: 32 pin PLCC or 44 pin TQFP
BLOCK DIAGRAM
ROM
MAC
RAM
CPU
AFE
Hybrid
RxA
TxAP
TxAP
HBDEN
TxCLK
ASRCH
RING
DTR
RI
CTS
DCD
DSR
RTS
RxCLK
TxD
RxD
USR10
USR11
RELAY
December 2000
73M2901/3.3V
Advanced Single
Chip Modem
2
HARDWARE DESCRIPTION
The 73M2901/3.3V is designed for a single +3.3 volt
supply with low power consumption (~120mW @ 3.3
volts). The modem supports automatic standby idle
mode. The modem will also accept a request to
power down from the DTE via hardware control. No
additional major components are required to
complete the modem core logic. The modem
provides direct firmware LED support via port pins.
HARDWARE FEATURES
Fully self-contained. "AT" Command interpreter
and data pump
User
pin
available
Synchronous serial data I/O available
Asynchronous serial port
On-chip hybrid driver.
Autobaud capability from 300bps to 9600bps
POWER SUPPLY
Power is supplied to the 73M2901/3.3V via the VPD
and VPA pins. The 73M2901/3.3V is designed for a
single +3.15 through +3.6 volt supply and for low
power consumption (~120mW @ 3.3 volts). Ground
Reference is provided at the VND and VNA pins.
LOW POWER MODE
The TDK 73M2901/3.3V supports a low power
mode. If the low power standby option is enabled
the 73M2901/3.3V will go into a power saving mode
when idle. The oscillator will be running, clocks will
be supplied to the UART, timers and interrupt
blocks; but no clocks will be supplied to the CPU.
Instruction processing and activity on the internal
busses is halted. Normal operation is resumed when
an interruption such as
DTR, RING or ASRCH (any
character send to the 73M2901/3.3V) is requested
or when a reset occurs.
ANALOG LINE / HYBRID INTERFACE
The 73M2901/3.3V provides a differential analog
output (TXAP and TXAN) and a single-ended analog
input (RXA) with internal A/D and D/A converters. A
driver is provided for an internal hybrid function.
The internal hybrid driver is capable of driving an
external load matching impedance and a line-
coupling transformer. If an external hybrid is to be
used, the on-chip hybrid drivers can be reconfigured
to drive a minimum load of 50k
and thus reduce
the driver's power consumption.
The hybrid configuration is controlled by the state of
the HBDEN pin. For driving a line-coupling
transformer, HBDEN should be pulled high. For
driving an external hybrid (load on TXAP and TXAN
is 50k
or larger), HBDEN should be pulled low.
The 73M2901/3.3V provides firmware control for a
hook relay driver (
RELAY) as well as interrupt
support for a ring detect opto-coupler (
RING).
INTERRUPT PINS
The external interrupt sources,
DTR, ASRCH and RING,
come from dedicated input pins of the same name.
DTR informs the 73M2901/3.3V that the host has
requested the 73M2901/3.3V perform a specific
function. The actual particulars of that function can
be changed by "AT" commands (described in full in
the TDK 73M2901 User's Guide).
ASRCH informs the 73M2901/3.3V that the host is
passing data to the 73M2901/3.3V over the DTE
interface. This instructs the 73M2901/3.3V to begin
looking for valid "AT" commands. This pin needs to
be connected to the TXD pin.
RING informs the 73M2901/3.3V that the external
DAA circuitry has detected a ring signal.
CRYSTAL OSCILATOR
The TDK 73M2901/3.3V single chip modem can use
an external 11.0592 MHz reference clock or can
generate such a clock using only a crystal and two
capacitors. If an external clock is used, it should be
applied to OSCIN.
SPECIFYING A CRYSTAL
The manufacturer of a crystal resonator verifies its
frequency of oscillation in a test set-up, but to
ensure that the same frequency is obtained in the
application, the circuit conditions must be the same.
The TDK 73M2901/3.3V modem requires a parallel
mode (antiresonant) crystal, the important
specifications of which are as follows:
Mode:
Parallel (antiresonant)
Frequency:
11.0592 MHz
Frequency
tolerance:
50 ppm at initial
temperature.
Temperature drift:
50 ppm additional over full
Range.
Load capacitance:
18pF or 20pF
ESR:
75
max.
Drive level:
Less than 1mW.
73M2901/3.3V
Advanced Single
Chip Modem
3
RESET
A reset is accomplished by holding the RESET pin
high. To ensure a proper power-on reset, the reset
pin must be held high for a minimum of 3
s. At
power on, the voltage at VPD, VPA, and RESET
must come up at the same time for a proper reset.
ASYNCHRONOUS AND SYNCHRONOUS SERIAL
DATA INTERFACE
The serial data interface consists of the TXD and
RXD data paths (LSBit shifted in and out first,
respectively); and the TXCLK and RXCLK serial
clock outputs associated with the data pins;
CTS/RTS flow control; DCR, DSR and DTR. In
synchronous mode, the data is passed at the bit rate
(tolerance is +1%, -2.5%).
PIN DESCRIPTIONS
POWER PIN DESCRIPTION
PIN NAME
32-PIN 44-PIN
TYPE DESCRIPTION

VPA
15

16

I

Positive analog voltage (+ Analog Supply)

VNA
21

22

I

Negative analog voltage. (Analog Ground)

VPD
6, 25,
29

2,12,
27, 33

I

Positive digital voltage (+ Digital Supply)

VND
5, 22,
26

11, 24,
44, 28

I

Negative digital voltage. (Digital Ground)
ANALOG INTERFACE PIN DESCRIPTION
PIN NAME
32-PIN 44-PIN
TYPE DESCRIPTION

RXA
20

21

I

Receive analog data

TXAN
16

17

O

Transmit Analog -

TXAP
17

18

O

Transmit Analog +

HBDEN
14

15

I

2w/4w hybrid driver enable pin

0 = Driver configured for 50k
or greater load (Tie to VND)

1 = Driver configured for driving line-coupling transformer (Tie to
VPD)

VBG
19

20

O

Analog Band Gap voltage reference pin (0.1
F to VNA)

VREF
18

19

O

Analog reference voltage pin (0.1
F to VNA)
EXTERNAL INTERRUPTS PIN DESCRIPTIONS
PIN NAME
32-PIN 44-PIN
TYPE DESCRIPTION
RING
ASRCH
DTR
2
1
32

39

38

37

I

I

I

External interrupt Line interface ring detection circuitry input

External interrupt Autobaud detection, connected to TXD

External interrupt DTE DTR signal input
73M2901/3.3V
Advanced Single
Chip Modem
4
PIN DESCRIPTIONS
(continued)
OSCILLATOR PIN DESCRIPTION
PIN NAME
32-PIN 44-PIN
TYPE DESCRIPTION

OSCIN
24

26

I

Crystal input for internal oscillator, also input for external
source.

OSCOUT
23

25

O

Crystal oscillator output.
DIGITAL INTERFACE PIN DESCRIPTION
PIN NAME
32-PIN 44-PIN
TYPE DESCRIPTION

RESET
13

9

I

Resets 73M2901/3.3V

RXCLK
31

36

O

Receive Data Synchronous Clock

RXD
30

35

O

Serial output to DTE.

TXCLK
28

31

O

Transmit Data Synchronous Clock

TXD
27

30

I

Serial data input from DTE.

USR10
12

8

I/O

This pin can optionally be configured as an active low detect
pin. This can be used to implement such functions as "parallel-
pick-up", "line-in-use", or "seize" detect.

USR11

11

7

I/O

Programmable I/O port. This pin can ooptionnaly be used to
control an external switch for Caller ID decoding operations.
RTS (USR12)

10

6

I

Request to Send
CTS (USR13)

9

5

O

Clear to Send
DSR (USR14)

8

4

O

Data Set Ready
DCD (USR15)

7

3

O

Data Carrier Detect
RI (USR16)

4

43

O

Ring Indicator
RELAY (USR17)

3

40

O

Relay driver output
73M2901/3.3V
Advanced Single
Chip Modem
5
ELECTRICAL SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS
Operation above maximum rating may permanently damage the device.
PARAMETER
RATING
Supply Voltage

-0.5V to +7.0V
Pin Input Voltage

-0.5V to VPD + 0.5V
Storage Temperature

-55C to 150C
RECOMMENDED OPERATING CONDITIONS
PARAMETER
RATING

Supply Voltage

3.15V 3.6V

Oscillator Frequency

11.0592MHz +/- 50ppm

Operating Temperature

-40C to +85C
TRANSMITTER
PARAMETER
CONDITIONS
MIN
NOM
MAX
UNIT

ITU Guard Tone Power

550Hz (relative to carrier)

1800Hz (relative to carrier)

-5

-8

-3.5

-6.5

-2

-5

dB

dB

Calling Tone

1300Hz

-11

-9.0

dBm0
1

Answer Tone Power

2225/2100Hz

-11

-9.0

dBm0
1

DTMF Transmit Power

High band tones

Low band tones

-8.0

-10

-6.0

-8.0

dBm0
1
MAXIMUM TRANSMIT LEVELS
Vref =1.25V; VPA = 3.3V
QAM
-9.6
DPSK
-7.4
FSK
-5.3
DTMF (high tone)
-7.9
DTMF (low tone)
-9.8
DTMF (total)
-5.7
Note: The recommended DAA (see the TDK 73M2901 Reference Manual) will result in approximately 8dB loss from the transmit pins to the
phone line. This includes the loss through the line matching impedance (475
resistor), transformer, and solid state off-hook relay.
1
dBm0 refers to the TDK recommended DAA ( 8dB loss from Transmit pins to the line and 5dB loss from the line to the Receive pin). Results
may vary depending on selected DAA. 0dBm = 0.775V
rms
. dBm = 10log {Vrms
2
/[(1mW)(600)]}