AVPro
5003
Triple SCART A/V Switch
DESCRIPTION
The AVPro
5003 is a low cost IC that performs
switching of analog audio and video signals. The
device accepts analog audio and video inputs from
three external sources, typically a video encoder
IC/stereo DAC, an auxiliary SCART connector, and
a VCR SCART connector. The input signals from
these sources are presented to a set of internal
multiplexers that perform the SCART switching
function. Outputs are provided to the VCR and
auxiliary SCART connectors, as well as a TV
SCART connector and an RF modulator. Video
outputs are buffered to drive 150
loads. Audio
outputs are buffered to provide 2 Vrms output into
600 ohms. Typical applications for the 5003 include
digital video recorders (DVRs) and digital receivers
for satellite, cable, and terrestrial television.
August 2000
FEATURES
SCART connections for TV, VCR, AUX
Integrated video drivers
Integrated audio drivers
-
Negative supply eliminates AC coupling
caps
5-bit audio attenuation for TV output
- Attenuation from 0 to 31 dB, 1 dB steps
- Mute of TV outputs
Serial port control of SCART switching
64-lead MQFP packaging (JEDEC MO-108)
BLOCK DIAGRAM
BLANK
TV_C
TV_R
TV_G
TV_B
SVHS_Cout
AUX_YCout
TV_YCout
TV_Mod
VCR_YCout
TV_Fnc
DO_0
DO_1
VCR_Lout
VCR_Rout
Lout
TV_Lout
TV_Rout
Rout
AUX_Lout
AUX_Rout
GN
D
GN
D
GN
D
GN
D
VC
C
VC
C
VC
C
VC
C
VE
E
VEE
VE
E
VE
E
VD
D
Mono
Rin
Lin
Rbias
Vref
VCR_Rin
VCR_Lin
Tgen
AUX_Rin
AUX_Lin
SDATA
SCLK
Enc_Y
Enc_YC
VCR_YCin
AUX_YCin
AUX_Fnc
AUX_B
Enc_B
Enc_G
AUX_G
SVHS_Cin
Enc_C
Enc_R
AUX_R
EBLANK
ABLANK
Mux
Mux
Mux
Mux
Comparitor
Mux
Mux
Mux
Mux
TV Fn
Output
Digital
Output
Mux
Mux
Mux
Serial
Port
Timing
Generator
Vref and
Bias
VCR_Fnc
VC
C
AVPro
5003
Triple SCART A/V Switch
2
FUNCTIONAL DESCRIPTION
SCART Video Switching
The device is designed to accept video signals from
several SCART video resources. The device
includes an analog multiplexer that receives the
external video signals and allows routing of the
signals to the various video outputs on the device.
Writing bits to serial port Register 1 controls
switching.
RGB Outputs: The device accepts RGB video
signals from two sources. The AUX_R, AUX_G,
AUX_B input pins are typically connected to the
auxiliary SCART connector. The Enc_R, Enc_G,
Enc_B input pins are connected to the RGB outputs
of an external video encoder device. The lower two
bits of serial port Register 1 determine which RGB
input port will be used as the source for the TV_R,
TV_G, TV_B output pins. When these bits are set to
xxxxxx00, the auxiliary SCART is used as the input.
When these bits are set to xxxxxx01, the video
encoder is used as the input.
The RGB sync can be selected from either the RGB
signals or the output on TV_YCout, as set by the
MSB of serial port Register 0. Setting this bit selects
the timing signal for the DC restore circuit. The DC
restore circuit acts to position the blank level to 0.6 V
at the output video load. When the bit is high, the
timing signal is from the output on TV_YCout from
either the AUX_YCin or Enc_YC. When the bit is
low, the timing signal will detect sync on either of the
RGB signals. The associated blanking signal from
respective video sources is also switched
accordingly with a delay matched to that of the RGB
signals.
When the SVHS mode is active, the TV_R pin
receives a chroma signal from either Enc_C or
SVHS_Cin. The DC restore averages to
approximately 1.8 VDC at the output pin. The
TV_G, TV_B outputs are also disabled (~0 V) in this
mode.
TV Composite Output: The device accepts up to
three composite (YC) video sources. The
AUX_YCin input pin is typically connected to the
Video In pin on the auxiliary SCART connector. The
VCR_YCin input pin is typically connected to the
Video In pin from the VCR SCART connector. The
Enc_YC input pin is typically connected to the YC
output from the external video encoder device. Two
bits in the serial port register determine which of the
composite input signals will be switched to the
TV_YCout output pin. When bits of Register 1 are
set to xxxx00xx, the signal on AUX_YCin is used as
the input. When the bits are set to xxxx01xx, the
signal on Enc_YC is used as the input. When the
bits are set to xxxx10xx, the signal on VCR_YCin is
used as the input. The TV_YCout pin can be active
with a composite video signal when RGB inputs are
active. When the TV SVHS mode is selected the
composite video mode is not available and the
TV_YCout pin provides luminance information to the
TV SCART connector. The DC restore circuit acts to
position the blank level to 0.6 V at the output 75 ohm
load.
RF Modulator Outputs: The device has a TV_Mod
output that follows the TV_YCout signal. When the
TV SCART has composite video, TV_Mod can be fed
directly to the RF modulator. When the TV is in
SVHS mode, the TV_Mod output (luminance) can be
summed with the TV_C output (chroma) to provide a
composite signal for the RF modulator. When the TV
SCART has composite available, the TV_C output
can be disabled via the MSB of serial port Register 1.
Auxiliary Composite Output: The VCR and video
encoder composite video sources are available to
switch to the AUX_YCout output pin. This pin is
typically connected to the Video Out pin on the
auxiliary SCART connector. A bit in serial port
Register 1 determines the signal source for the
AUX_YCout output pin. Setting the register to
x0xxxxxx selects the signal on VCR_YCin, while
setting the register to x1xxxxxx selects the signal on
ENC_YC. The DC restore circuit acts to position the
blank level to 0.5 V at the output pin.
VCR Composite Output: The auxiliary SCART and
video encoder composite video sources are available
to switch to the VCR_YCout output pin. This pin is
typically connected to the Video Out pin on the VCR
SCART connector. Two bits in serial port Register 1
determine the source for the AUX_YCout output pin.
Setting the register to xx01xxxx selects the signal on
AUX_YCin, while setting the register to xx10xxxx
selects the signal on ENC_YC.
SVHS Switching: The device supports the SVHS
mode from the VCR SCART connector. The
SVHS_Cin pin provides chroma information from the
VCR SCART connector to the TV SCART connector.
The SVHS_Cout pin provides chroma information
AVPro
5003
Triple SCART A/V Switch
3
from the encoder IC to the VCR SCART connector.
The encoder chroma output can also be routed to
the TV_R pin to support SVHS applications. When
Register 1 is set to xxxx1011, the SVHS mode is
selected with SVHS_Cin and VCR_YCin providing
the chroma and luma inputs, respectively. In this
mode, the load for the VCR chroma source (SCART
pin 15) is provided by the series resistor for the
SVHS_Cout pin and the low output impedance of
the amplifier. The SVHS_Cin is ac coupled, and its
dc bias set to approximately 0.9V. When the bits are
set to xxxx1110, the ENC_C and ENC_Y inputs
provide the chroma and luma inputs, respectively.
The VCR SCART can also receive SVHS
information from the video encoder by setting the
register bits to xx00xxxx. Note that when the VCR is
receiving information it cannot be used as a signal
source for other devices.
Function Switch: The device monitors the function
switch pin (pin 8) of the auxiliary SCART and VCR
SCART connectors, AUX_Fnc and VCR_Fnc pins,
respectively. It is also known as slow blanking.
Each of these inputs can detect three distinct levels
and set two bits in serial port read Register 0.
When the SCART input level is 0 to 2 V, the register
bits are set to 00. When the input level is 4.5 to 7.0
V, the register bits are set to 01. When the input
level is 9.5 to 12 V, the register bits are set to 10.
The device also provides a function switching output
(TV_Fnc) to the TV SCART connector (pin 8). The
output level is determined by the state of two LSBs
in serial port write Register 0. The table below
defines the state of the TV_Fnc pin based on the
register bit values.
Bits
Output
voltage
Function
xxxxxx00
~0 V
Normal TV
xxxxxx01
~6 V
16:9 aspect
xxxxxx10
~ 11 V
Peritelevision
xxxxxx11
~ 11 V
Peritelevision
SCART Audio switching
The device is designed to accept stereo audio inputs
from an external audio DAC and from auxiliary
SCART and VCR SCART connectors. The device
provides audio outputs to the TV SCART, auxiliary
SCART, and VCR SCART connectors. It also
provides fixed gain, stereo line outputs of the audio
output on the TV SCART. The line outputs are
intended for use by an external stereo
receiver/amplifier. These outputs are also combined
for a Mono output to a RF modulator.
The audio inputs are considered to be associated
with the respective composite video input. As a
result, the video selection determines which audio
signals will be switched to a given SCART output.
Refer to the SCART Video Switching section of this
document for more information.
Volume Control: The device provides control of the
output level on the TV audio outputs
(TV_Lout/Rout). The output level is controlled
through serial port write Register 2. The lower 6-bits
of this register set an attenuation level from 0 to -63
dB in 1 dB steps, where xx000000 is 0 dB and
xx111111 is -63 dB. However, the attenuation is
only specified to 5-bits of accuracy (-31 dB).The
mute function is controlled by the fifth bit of write
Register 0, which allows these outputs to be muted
to -75 dB. When this bit is set to 0, the attenuator is
active. When it is set to 1, the outputs are muted to
-75 dB. This bit can be set independent of the
attenuation register such that the output can be
muted before any change in volume, or any
switching of audio sources. The audio control
circuits have a zero crossing detector that allows
volume control changes to be completed only when
the audio signal is near a zero crossing. This
prevents audible popping and clicking during a
volume change.
Hot-plug of SCART connectors. The 5003 devices
are sensitive to discharge caused by floating chassis
grounds between audio/video equipment. This is
observed when the SCART cables are repeatedly
connected and disconnected while the 5003 is
powered on inside the IRD. When the SCART cable
is unplugged, an AC potential can exist between
equipments. When the SCART cable is plugged
back into the IRD, the AC potential discharges
through the SCART connector. If the discharge
occurs through the shield of the SCART connector
or the ground pins, there is no problem. If the
discharge occurs through the signal pins, the 5003
devices can experience a latch-up condition and a
high current situation will exist. The latch-up will
occur if the pulse created by the discharge has a
fast rising edge, typically a few hundred pico-
seconds. This is an order of magnitude faster than a
standard ESD pulse so the internal ESD diodes of
the 5003 will not respond fast enough to protect the
device. This problem can be resolved by placing a
AVPro
5003
Triple SCART A/V Switch
4
small shunt capacitor on each SCART I/O pin. The
capacitor slows the rising edge of the discharge
pulse and allows the internal ESD diodes to react to
the discharge. Good results are achieved using a
470 pF value, but an exact value should be
calculated for each signal line depending upon the
signal type so as to avoid roll-off of the intended
signal. As an alternate approach, external diodes
can be used to shunt this discharge.
Digital Outputs
The device includes programmable digital outputs
(DO_0, and DO_1). These pins are general purpose
outputs programmed by bits in serial port Register 0.
Bit 3 of this register controls DO_0 while bit 4
controls DO_1. Setting the register bits to 0 puts
these outputs in the LOW state. Setting the register
bits to 1 puts the outputs in the HIGH state. Internal
pull-ups are incorporated.
Serial Port Definition
Internal functions of the device are monitored and
controlled by a simple two-wire serial port that is
compatible with the inter-IC (I2C) bus. The serial port
operates in a slave mode only and can be written to
or read from. The default address of the device is
1001000x. The serial port uses a clock input (SCLK)
that is driven by the bus master and a bi-directional
data input (SDATA) to perform all data transfers.
Data Transfers: The device is enabled for a data
transfer when the SDATA pin is driven from HIGH to
LOW by the bus master while the SCLK pin is HIGH.
The data transfer is complete when the bus master
drives the SDATA pin from LOW to HIGH while the
SCLK pin is HIGH.
The first eight bits of data clocked into the device are
decoded to determine if a valid address has been
received. The first seven bits of information are the
address with the eighth bit indicating whether the
cycle is a read (bit is HIGH) or a write (bit is LOW). If
the address is valid for this device, on the falling
SCLK edge of the eighth bit of data, the device will
drive the SDATA pin low and hold it LOW until the
next falling edge of the SCLK pin to acknowledge
the address transfer. Once a valid address is
detected the device will continue to transmit or
receive data until the process is complete, or the bus
master issues a stop.
Reset: At power-up the serial port defaults to the
states indicated in boldface type. At device power-
up, the device also generates an acknowledge. The
device also responds to the system level reset that
is transmitted through the serial port. When the
master sends the address 00000000 followed by the
data 00000110, the device resets to the default
condition, and generates and acknowledge.
I2C Latch-up. The 5003 may latch-up if the I2C bus
is active and there is no power to the 5003 device. In
a typical application, this will not occur as the I2C
bus and the 5003 device are powered from the
same power supply. This condition typically occurs
when evaluating the 5003 devices on a demo board.
When the I2C is powered on and the 5003 device is
powered off, the I/O lines of the I2C bus are active
and therefore will be at +5V. The SDATA pin internal
ESD diodes will begin to conduct current through the
SDATA pin and attempt to power-on internal circuits
of the device. When power is applied to the 5003
device, circuits can be in an unknown state and
therefore latch-up occurs. This is prevented by
disconnecting the I2C interface when the device is
powered down.
Power Supply Sequence: The 5003 require three
power supplies ( 12V, 5V and 5V ) for proper
operation. Similar to other CMOS devices that are
powered from multiple supplies, the 5003 family
device requires proper power ramp-up sequence to
avoid forwardly biasing the substrate diodes which
can cause destructive latch-up. In order to insure
that the chip substrate diodes are always reverse
biased, the 5V supply should always be applied
before the other two supplies. The preferred power
ramp-up sequences is "5V, +12V and then +5V."
If this sequence can not be achieved, placing
schottky diodes from 5V to ground and / or +12V to
+5V supply, depending upon sequence and timing,
can prevent latchup.
SCLK
SDATA
Start
Stop
AVPro
5003
Triple SCART A/V Switch
5
Serial Port Register Table (Write registers); Device Address = 10010000 (Bold indicates default setting)
REGISTER
FUNCTION
BITS
DESCRIPTION
0
TV Function Control
xxxxxx00
xxxxxx01
xxxxxx10
xxxxxx11
Level 0; normal TV output (TV_Fnc = 0V)
Level 1A; 16:9 aspect ratio (TV_Fnc = 6V)
Level 1B; Peritelevision output mode (TV_Fnc =11V)
Level 1B; not valid mode (TV_Fnc =11V)
0
Digital Outputs
(independent)
xxxx00xx
xxxx11xx
DO_0, DO_1 are set LOW
DO_0, DO_1 are set HIGH
0
TV Mute Control*
xxx0xxxx
xxx1xxxx
TV audio (TV_Lout/TV_Rout, Lout/Rout/Mono) output = ON
TV audio (TV_Lout/TV_Rout, Lout/Rout/Mono) output = Mute
0
n/a
x00xxxxx
Reserved: Set these bits to "0" for normal operation
0
RGB Sync Source
0xxxxxxx
1xxxxxxx
RGB sync /DC restore source = RGB
RGB sync /DC restore source = TV_YC
1
TV RGB/ S video
chroma Source
(S Video has chroma
on TV_R.
TV_G &
TV_B outputs are
disabled.)
xxxxxx00
xxxxxx01
xxxxxx10
xxxxxx11
TV RGB signal source = Auxiliary SCART input (RGB )
TV RGB signal source = Video encoder IC,
TV RGB signal source = Video encoder IC, chroma on TV red
TV RGB signal source = VCR SCART (red) chroma on TV red
1
TV composite video /
Audio Source
xxxx00xx
xxxx01xx
xxxx10xx
xxxx11xx
TV composite & audio signal source = Auxiliary SCART input
TV composite & audio signal source =
Video encoder IC
audio DAC IC
TV composite & audio signal source =
VCR SCART input
TV composite (S video luma ) & audio signal source =
Video encoder IC (Enc_Y), audio DAC IC
1
VCR Signal Source
xx00xxxx
xx01xxxx
xx10xxxx
xx11xxxx
SVHS mode, source = Video encoder IC (Y & C), audio DAC IC
VCR signal source = Auxiliary SCART composite input
VCR signal source = Video encoder IC (YC), audio DAC IC
VCR signal source = Video encoder IC (YC), audio DAC IC
1
Auxiliary Output Select
x0xxxxxx
x1xxxxxx
Auxiliary signal source = VCR SCART input
Auxiliary signal source = Video encoder IC, audio DAC IC
1
TV Chroma RF output
0xxxxxxx
1xxxxxxx
TV_C (chroma RF) output: output disabled
TV_C (chroma) output: = TV_R (for RF mod to sum Y & C)
2
TV Volume Control*
xx000000
xx011111
TV audio volume = normal (0 dB)
TV audio volume = minimum (31 dB atten.)
2
n/a
00xxxxxx
Serial Port Register Table (Read register); Device Address = 10010001 (Bold indicates default setting)
0
AUX Function Control
Input
xxxxxx00
xxxxxx01
xxxxxx10
Level 0; normal TV output (TV_Fnc = 0 volts)
Level 1A; 16:9 aspect ratio (TV_Fnc = 6 volts)
Level 1B; Peritelevision output mode (TV_Fnc = 11 volts)
0
VCR Function Control
Input
xxxx00xx
xxxx01xx
xxxx10xx
Level 0; normal TV output (TV_Fnc = 0 volts)
Level 1A; 16:9 aspect ratio (TV_Fnc= 6 volts)
Level 1B; Peritelevision output mode (TV_Fnc = 11 volts)
0
n/a
0000xxxx
Reserved: These bits set to "0" in normal operation
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