Document Outline
- Return to Contents
- Features
- Ordering Information
- Functional Block Diagram
- General Description
- Absolute Maximum Ratings*
- Electrical Characteristics: Unless otherwise stated, these specifications apply for 40C < TA <
- Electrical Characteristics: Unless otherwise stated, these specifications apply for 40C < TA <
- Pin Configuration
- Pin Description
- Output Section
- Soft Start
- Shutdown
- Oscillator Section
- Oscillator Synchronization
- Oscillator Synchonization with Separate RC Timer
- Oscillator Frequency and Output Dead Time
- Undervoltage Lockout Section
- Bench Test Operational Simulation Waveforms
- Replacing Bipolar Versions With CMOS
- Typical Characteristics
4-111
TELCOM SEMICONDUCTOR, INC.
7
6
5
4
3
1
2
8
11
A
VDD
14
B
OSC OUT
4
15
CMPTR
+6V
50
A
ERROR
AMP
SYNC
3
CT
5
DISCH
7
COMP
9
IN
1
IN+
2
SOFT
START
8
SHUTDOWN
10
GND
12
RT
6
V+
IN
REFERENCE
REGULATOR
FLIP
FLOP
UNDER
VOLTAGE
OSC
S
R
R
+6V
35C25
PWM
LATCH
16
VREF
13
+4V REF
TC25/35C25-2 10/1/96
FUNCTIONAL BLOCK DIAGRAM
TC25C25
TC35C25
BICMOS PWM CONTROLLERS
GENERAL DESCRIPTION
The TC35C25 family of PWM controllers are CMOS
implementations of the industry standard 3525 voltage
mode SMPS ICs.
These second generation CMOS devices employ
TelCom Semiconductors' Tough BiCMOS
TM
process for
latch-up proof operation. They offer much lower power
consumption than any of their previous CMOS or bipolar
counterparts.
These controllers have separate supply pins for the
control and output sections of the circuit. This allows "boot-
strap" operation. The CMOS output stage allows the output
voltage to swing to within 25mV of either rail.
Other improved features include tighter hysteresis and
undervoltage start-up specifications over temperature, and
very low input bias current on all inputs.
FEATURES
s
Low Power BICMOS Construction
s
Low Supply Current at 20 kHz ............... 1.0mA Typ
s
Latch-Up Immunity ................. >500mA on Outputs
s
Below Rail Input Protection .............................. 5V
s
High Output Drive ................................ 500mA Peak
s
Fast Rise/Fall Time ..................... 50nsec @ 1000pF
s
High Frequency Operation .................. Up to 1MHz
s
Tri-state Sync Pin for Easy Parallel Operation
s
Under Voltage Hysteresis Guaranteed
s
Shutdown Pin Available
s
Double-Ended
s
Soft Start, With Small Cap
s
Low Prop Delay Shutdown to
Output ................................................. 140nsec Typ.
ORDERING INFORMATION
Part No.
Configuration
Pkg./Temperature
TC25C25EOE
Non-Inverting
16-Pin SOIC (Wide)
40
C to +85
C
TC25C25EPE
Non-Inverting 16-Pin Plastic DIP (Narrow)
40
C to +85
C
TC35C25COE
Non-Inverting
16-Pin SOIC (Wide)
0
C to +70
C
TC35C25CPE
Non-Inverting 16-Pin Plastic DIP (Narrow)
0
C to +70
C
4-112
TELCOM SEMICONDUCTOR, INC.
ELECTRICAL CHARACTERISTICS:
Unless otherwise stated, these specifications apply for 40
C < T
A
<
+85
C for the TC25C25Exx; and 0
C <T
A
< +70
C for the TC35C25Cxx;
V
IN
and V
DD
= 16V; R
T
= 3.7k
; C
T
= 1000pF; RD = 760
.
Parameter
Test Conditions
Min
Typ
Max
Units
Reference Section
Output Voltage
T
J
= 25
C, I
O
= 1mA
3.9
4
4.1
V
Line Regulation
V
IN
= 8V to 18V
--
4
10
mV
Load Regulation
I
I
= 1mA to mA
--
4
15
mV
Temp Coefficient
Note 1
--
0.01
0.4
mV/
C
V
REF
Worst Case
3.85
4
4.15
V
Long Term Drift
T
J
= 25
C, (Note 1)
--
50
--
mV/1000Hrs
Short Circuit
V
REF
to GND
20
40
70
mA
Output Noise
T
J
= 25
C, 10 Hz
f
10 kHz, (Note 1)
--
21
--
V(rms)
Oscillator Section
Initial Accuracy
T
J
= 25
C, at 97 kHz
--
2
3
%
Voltage Coefficient
V
IN
= 8V to 18V
--
0.01
0.1
%/V
Temp Coefficient
Note 1
--
0.025
0.06
%/
C
OSC Ramp Amplitude
2.9
3.2
3.4
V
Reset Switch R
DS (ON)
T
J
= 25
C
30
50
60
Clock Amplitude
f
osc
= 100kHz, R
L
= 1M
, (Note 1)
4.9
5.5
6.7
V
Clock Min Width
T
J
= 25
C, R
D
= 0
, (Note 1)
--
170
200
nsec
C
T
= 100pF, R
T
= 1
Sync Threshold
R
T
Pin Tied to V
REF,
C
T
Pin at GND
1.8
2.2
2.8
V
Sync Input Current
Sync Voltage = 4V, V(R
T
) = 4V
--
--
1
A
Min Sync Pulse Width
T
J
= 25
C, Sync Amplitude = 5V, (Note 1)
--
130
175
nsec
Max OSC Freq
R
T
= 1
, C
T
= 100pF, R
D
= 0
, (Note 1)
1.0
--
--
MHz
Error Amplifier Section (V
CM
= 2.5V)
Input Offset Voltage
--
5
15
mV
Input Bias Current
T
J
= 25
C
--
50
200
pA
Input Offset Current
T
J
= 25
C
--
25
100
pA
DC Open Loop Gain
R
L
= 100k
70
85
--
dB
Gain Bandwidth Product
Note 1
0.7
0.9
1.2
MHz
Output Low Level
R
L
= 100k
(N Channel)
--
10
20
mV
Output High Level
R
L
= 100k
(NPN)
4.9
5.4
5.9
V
CMRR
V
CM
= 0.5 to 4.7V
60
75
--
dB
ABSOLUTE MAXIMUM RATINGS*
Supply Voltage ............................................................ 18V
Maximum Chip Temperature ................................... 150
C
Storage Temperature ............................ 65
C to +150
C
Lead Temperature (10 sec) ..................................... 300
C
Package Thermal Resistance
PDIP R
J-A .....................................................................
125
C/W
PDIP R
J-C ........................................................................
45
C/W
SOIC R
J-A .....................................................................
250
C/W
SOIC R
J-A ........................................................................
75
C/W
Operating Temperature
25C2x ........................................ 40
C
T
A
+85
C
35C2x ............................................. 0
C
T
A
+70
C
*Static-sensitive device. Unused devices must be stored in conductive
material. Protect devices from static discharge and static fields. Stresses
above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. These are stress ratings only and functional
operation of the device at these or any other conditions above those
indicated in the operational sections of the specifications is not implied.
BICMOS PWM CONTROLLERS
TC25C25
TC35C25
4-113
TELCOM SEMICONDUCTOR, INC.
7
6
5
4
3
1
2
8
ELECTRICAL CHARACTERISTICS:
Unless otherwise stated, these specifications apply for 40
C < T
A
<
+85
C for the TC25C25Exx; and 0
C <T
A
< +70
C for the TC35C25Cxx;
V
IN
and V
DD
= 16V; R
T
= 3.7k
; C
T
= 1000 pF; RD = 760
.
Parameter
Test Conditions
Min
Typ
Max
Units
Supply Voltage Rejection
V
IN
= 8V to 18V
90
120
--
dB
Slew Rate
C
LOAD
= 50pF, ACL = 1
--
1
--
V/
sec
V(EA+) = 1V to 3V Pulse, (Note 1)
--
--
--
Threshold Hysteresis
0.6
0.8
1
V
Total Standby Current
Supply Current
--
1.2
2.5
mA
Start-Up Current
--
250
350
A
PWM Comparator
Min. Duty Cycle
Note 1, T
J
= 25
C
--
--
0
%
Max Duty Cycle
T
J
= 25
C, f
OSC
= 100kHz, (Note 1)
45
49
--
%
Input Threshold
V(C
T
) = 0.6V
0.5
0.6
0.7
V
Input Threshold
V(C
T
) = 3.6V
3.4
3.6
3.7
V
Input Bias Current
Note 1, T
J
= 25
C
--
--
1
A
Soft Start Section
Soft Start Current
V
SHUTDOWN
= 0V
30
46
75
A
Soft Start Voltage
V
SHUTDOWN
= 3V
--
30
100
mV
Shutdown Input Current
V
SHUTDOWN
= 3V
--
1
100
nA
Min Shutdown Pulse Width
V
SHUTDOWN
= 5V, (Note 1)
--
20
40
nsec
Shutdown Delay
V
SHUTDOWN
= 5V, (Note 1)
130
140
220
nsec
Shutdown Threshold
1.5
2.4
3
V
Output Drivers (each output)
Output Low Level RDS (ON)
I
SINK
= 20mA
--
13
25
Output High Level RDS (ON)
I
SOURCE
= 20mA
--
20
35
Rise Time
C
L
= 1
nF
, (Note 1)
--
55
80
nsec
Fall Time
C
L
= 1
nF
, (Note 1)
--
40
65
nsec
Power Supply
Supply Current
f
OSC
= 100kHz
--
2
3
mA
UV Lockout Threshold
6.45
7
7.3
V
UV Lockout Hysteresis
1.7
2.2
2.5
V
Start-up Current
--
75
200
A
NOTE:
1. Not Tested.
TelCom Semiconductor reserves the right to make changes in the circuitry or specifications detailed in this manual at any time without notice. Minimums
and maximums are guaranteed. All other specifications are intended as guidelines only. TelCom Semiconductor assumes no responsibility for the use of
any circuits described herein and makes no representations that they are free from patent infringement.
BICMOS PWM CONTROLLERS
TC25C25
TC35C25
4-114
TELCOM SEMICONDUCTOR, INC.
TC25C25
TC35C25
BICMOS PWM CONTROLLERS
PIN CONFIGURATION (DIP AND SOIC)
1
16
2
15
3
14
4
13
5
12
6
11
7
10
VDD
OSC OUT
8
9
IN+
IN
CT
RT
DISCHARGE
SOFT START
OUTPUT B
V
+
IN
VREF
GND
OUTPUT A
SHDN
CMPTR
SYNC
TC25C25EPE
TC35C25CPE
8
1
14
2
13
3
12
4
11
5
10
6
9
7
15
16
TC25C25EOE
TC35C25COE
VDD
OSC OUT
IN+
IN
CT
RT
DISCHARGE
SOFT START
OUTPUT B
V
+
IN
VREF
GND
OUTPUT A
SHDN
CMPTR
SYNC
PIN DESCRIPTION
Pin No.
Symbol
Description
1
IN
Error Amplifier inverting input for output voltage reference input and amplifier gain set.
2
IN
+
Error Amplifier, non-inverting input for output voltage feedback to regulate voltage.
3
SYNC
Input pin for PWM controller oscillator synchronization of two or more controllers from an
external clock output or from another PWM controller oscillator output.
4
OSC OUT
Pin for output of the internal oscillator. This signal can be used as a master oscillator to
sync other oscillators to run at the same timing period.
5
C
T
Pin is the capacitor timing input to set oscillator frequency in conjunction with pin 6 R
T
timing
resistor.
6
R
T
Pin for timing resistor input to set oscillator frequency by setting the charge current into
capacitor C
T
of pin 5.
7
DISCHARGE
Pin for discharging the timing capacitor, C
T
of pin 5. During discharging time period, PWM
controller output is disabled. This is called dead time. With a resistor between pin 7 and pin 5,
the dead time can be controlled.
8
SOFT START
Pin for soft starting the power supply. A capacitor from this pin to GND pin 12 will limit
duty cycle till capacitor is charged above error amplifier output.
9
CMPTR
Pin for compensation of the feedback loop response.
10
SHDN
Pin for terminating both outputs of pins 11 and 14. This will shutdown the power supply
outputs. A positive input with shutdown threshold of 2.4V is required for shutdown.
11
OUTPUT A
Pin for output drive of phase A to drive push pull transistor A.
12
GND
Pin for ground return for all inputs and output signals.
13
V
DD
Pin for power supply input to operate the output drivers A and B.
14
OUTPUT B
Pin for output drive of phase B to drive push pull transistor B.
15
V
+
IN
Pin for voltage bias supply input for all PWM controller functions except output drive circuits.
16
V
REF
Pin is the reference supply output voltage of 4.0 volts that may be used for any voltage
reference purposes such as a reference to control output voltage.
4-115
TELCOM SEMICONDUCTOR, INC.
7
6
5
4
3
1
2
8
BICMOS PWM CONTROLLERS
TC25C25
TC35C25
OSCILLATOR SYNCHRONIZATION WITH
SEPARATE RC TIMER
Synchronization can also be done by having a separate
RC timing circuit on the slave oscillator that is slightly lower
frequency than the master oscillator. The sync input will not
be in a high impedance state so the number of slave
oscillators is limited. This method of synchronization is
useful when slave oscillator is located in a different location.
When a separate RC timer is used in the slave controller,
ground loop noise pickup in the oscillator is minimized.
OUTPUT SECTION
The output stage of the TC35C25 is comprised of two
pairs of complimentary CMOS drivers operating in a push-
pull mode. Each output is capable of sinking or sourcing
nearly 500mA of peak current. They are also capable of
absorbing just as much "kick-back" current without latching.
SOFT START
A soft restart recovery rate may be selected by placing
a capacitor from SOFT START (pin 8) to ground. The
calculation for the recovery timing is approximately 60 msec/
F.
SOFT START will mediate the start-up from under
voltage recovery, power-on, or SHUTDOWN.
SHUTDOWN
There is a minimum delay, non-latching shutdown fea-
ture on the TC35C25 PWM controller. Both outputs may be
turned off by applying a positive voltage to SHUTDOWN (pin
10). Typical shutdown threshold is 2.4V. Returning the pin
back to ground will reinitialize the soft start cycle.
OSCILLATOR SECTION
A tri-state feature has been added to accommodate
systems which require multiple controllers to be run in a
"master/slave" configuration. The timing resistor pin (R
T
, pin
6) may be tied to V
REF
to place the sync pin (SYNC, pin 3)
in a high impedance state. This will allow the chip to be
clocked from an external source.
The sync output (OSC OUT, pin 4) of the TC35C25 can
drive several sync inputs configured in this manner.
OSCILLATOR SYNCHRONIZATION
Synchronization of two TC35C25's can be done by
making one PWM Controller as the master oscillator to
synchronize the slave as follows:
4
3
5
12
6
VREF
OSC OUT
CT GND
RT
CT GND
RT
TCx5C25
5
6
MASTER
SLAVE
CT
SLAVE TC > MASTER TC
CT
RT
RT
TCx5C25
SYNC
12
4
3
5
12
6
16
OSC OUT
CT GND
RT
TCx5C25
CT GND
RT
TCx5C25
5
6
12
MASTER
SLAVE
CT
RT
SYNC
VREF
4-116
TELCOM SEMICONDUCTOR, INC.
TC25C25
TC35C25
BICMOS PWM CONTROLLERS
The resistor (R
D
)
controls the period of dead time (T
D
).
During dead time this resistor (R
D
) current is the sum of the
C
T
discharge current and the I
CHG
current. The value for R
D
can range from >1
to <900
. Dead time increases when
R
D
is increased. See graph in Typical Characteristic Curve
for dead time resistor value.
OSCILLATOR FREQUENCY AND OUTPUT DEAD TIME
The oscillator frequency (F
O
) =
1
T
CHG
+ T
D
T
CHG
is the charging duration of C
T
. One of the PWM
Controller output drivers is ON during charging of C
T
. T
D
is
the output dead time when both of the output drivers are
inactive. Resistor (R
T
) sets the Capacitor (C
T
) charging
current.
To choose an oscillator frequency (F
O
), first select the
period of dead time (T
D
) required. Calculate the capacitor
charge time (T
CHG
).
T
CHG
=
1 F
O
x T
C
F
O
Select a capacitor in the range of 100 pF to 1000 pF for
C
T
. See graph in Typical Characteristic Curve. Calculate
capacitor charging current (I
CHG
).
C
T
in Farads, T
CHG
in seconds, I
CHG
in amperes, and
R
T
in ohms.
I
CHG
=
2.5 x C
T
T
CHG
R
T
=
1.5
I
CHG
1mA
TO OUTPUT
SHUTDOWN
IS
VON = 9.2V
VOFF = 7V
75
A
7V
9.2V
IS = STARTUP CURRENT
VIN
V+
IN
CT
5
DISCH
7
RT
6
+
1.5V
3
SYNC
VDD
ICHARGE
1.5V
RT
1/FO
TD
3V
.5V
ON-TIME
(TCHG)
PIN 5
OUTPUT DEAD TIME (TD)
PIN 4
RD
3V
0.5V
UNDERVOLTAGE LOCKOUT SECTION
The typical turn on threshold is 9.2V for operation of this
family of PWM Controllers. When supply voltage at pin 15
drops below 7V, after normal operation above 9.2V, lockout
occurs and both output drives to pin 11 and 14 are termi-
nated.
4-117
TELCOM SEMICONDUCTOR, INC.
7
6
5
4
3
1
2
8
BICMOS PWM CONTROLLERS
TC25C25
TC35C25
The 5k potentiometer sets a reference voltage at pin 2.
When ramp voltage of pin 5 reaches this reference voltage,
output drive pulse is active ON. Varying the discharge
resistor will vary the dead time. Increasing the discharge
resistor will effect an increase in the dead time.
BENCH TEST OPERATIONAL SIMULATION
WAVEFORMS
3V
OSC OUT
PIN 4
PIN 2
VOLTAGE
DEAD TIME
0.5V
CT
PIN 5
OUTPUT A
PIN 11
OUTPUT B
PIN 14
REPLACING BIPOLAR VERSIONS WITH CMOS
Although the pin-out and functions are the same for both
the Bipolar and CMOS versions, there are several differ-
ences that need to be taken into account. The reference
voltage on the TC35C25 is 4V instead of 5V and the
oscillator ramp is 3V, not 4V. The R
T
and C
T
values are
different for any particular frequency and dead-time require-
ment.
The most important difference is that the absolute
maximum rating of the V
DD
and V
IN
voltages for the TC35C25
is 18V, whereas the UC3525 is 40V.
8
1
14
2
13
3
12
4
11
5
10
6
9
7
15
16
VDD
OUTB
VIN
VREF
GND
OUTA
SHDN
CMPTR
OSC OUT
SYNC
IN+
IN
CT
RT
DISCH
SOFT
+
1000pF
MET
3.7k
0 to 1k
MET
.1
f
V011
16V
5k
GND
GND
TYPICAL CHARACTERISTICS
0
5
10
15
20
25
30
35
40
1
0.8
0.6
0.4
0.2
0
Supply Current
vs. Frequency
CL = 2200pF
CL = 1000pF
CL = 470pF
CL = 10pF
VDD = 16V, TA +25
C
I DD
(mA)
FREQUENCY (MHz)
Oscillator Frequency
vs. Ct and Rt
0
100
200
300
400
500
600
700
800
900
1000
800
600
400
200
F
OSC
(kHz)
Ct (pF)
Rt = 1k
Rt = 2k
Rt = 5k
Rt = 10k
Rt = 20k
VDD = VIN = 16V, TA +25
C
0
200
400
600
800
1000
3000
DEAD TIME (nsec)
2500
2000
1500
1000
500
0
Dead Time
vs. Ct and Discharge Resistor
DISCHARGE RESISTOR (
)
Ct = 1000pF
Ct = 500pF
Ct = 330pF
Ct = 100pF
VDD = 16V, TA +25
C, Rt = 10k
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