IN
2
IN
1
NC
NC
GND
V+ Substrate
NC
NC
S
2
D
1
D
2
S
1
V
NC
Dual-In-Line
1
2
3
4
5
6
7
14
13
12
11
10
9
8
Top View
Metal Can
NC
Top View
D
1
V
S
1
IN
1
V+ (Substrate and Case)
IN
2
GND
S
2
D
2
1
2
3
4
5
6
7
8
9
10
DG200A
Siliconix
S-52880--Rev. B, 28-Apr-97
1
Monolithic Dual SPST CMOS Analog Switch
Features
Benefits
Applications
D "15 V Input Signal Range
D 44-V Maximum Supply Ranges
D On-Resistance: 45 W
D TTL and CMOS Compatibility
D Wide Dynamic Range
D Simple Interfacing
D Reduced External Component Count
D Servo Control Switching
D Programmable Gain Amplifiers
D Audio Switching
D Programmable Filters
Description
The DG200A is a dual, single-pole, single-throw analog
switch designed to provide general purpose switching of
analog signals. This device is ideally suited for designs
requiring a wide analog voltage range coupled with low
on-resistance.
The DG200A is designed on Siliconix' improved PLUS-40
CMOS process. An epitaxial layer prevents latchup.
Each switch conducts equally well in both directions when
on, and blocks up to 30 V peak-to-peak when off. In the on
condition, this bi-directional switch introduces no offset
voltage of its own.
Functional Block Diagram and Pin Configuration
Truth Table
Logic
Switch
0
ON
1
OFF
Logic "0"
v 0.8 V
L
i "1"
w 2 4 V
g
Logic "1"
w 2.4 V
Updates to this data sheet may be obtained via facsimile by calling Siliconix FaxBack, 1-408-970-5600. Please request FaxBack document #70035.
DG200A
2
Siliconix
S-52880--Rev. B, 28-Apr-97
Ordering Information
Temp Range
Package
Part Number
0 to 70
_C
14-Pin Plastic DIP
DG200ACJ
25 to 85
_C
14-Pin CerDIP
DG200ABK
25 to 85
_C
10-Pin Metal Can
DG200ABA
DG200AAK
14-Pin CerDIP
DG200AAK/883,
JM38510/12301BCA
55 to 125
_C
DG200AAA
10-Pin Metal Can
DG200AAA/883,
JM38510/12301BIC
14-Pin Sidebraze
JM38510/12301BCC
Absolute Maximum Ratings
V+ to V
44 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
GND to V
25 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Digital Inputs
a
, V
S
, V
D
(V) 2 V to (V+) +2 V or
. . . . . . . . . . . . . . . .
30 mA, whichever occurs first
Current (Any Terminal) Continuous
30 mA
. . . . . . . . . . . . . . . . . . . . . .
Current S or D
(Pulsed at 1 ms, 10% Duty Cycle Max)
100 mA
. . . . . . . . . . . . . . . . . . .
Storage Temperature
(AX, BX Suffix)
65 to 150
_C
. . . . . . . . . .
(CJ Suffix)
65 to 125
_C
. . . . . . . . . . . . . . .
Power Dissipation (Package)
b
10-Pin Metal Can
c
450 mW
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
14-Pin CerDIP
d
825 mW
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
14-Pin Plastic DIP
e
470 mW
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Notes:
a.
Signals on S
X
, D
X
, or IN
X
exceeding V+ or V will be clamped by
internal diodes. Limit forward diode current to maximum current
ratings.
b.
All leads welded or soldered to PC Board.
c.
Derate 6 mW/
_C above 75_C
d.
Derate 11 mW/
_C above 75_C
e.
Derate 6.5 mW/
_C above 25_C
Schematic Diagram (Typical Channel)
Figure 1.
V+
IN
X
V
GND
+
S
D
V
V+
DG200A
Siliconix
S-52880--Rev. B, 28-Apr-97
3
Specifications
a
Test Conditions
Unless Otherwise Specified
V
15 V V
15 V
A Suffix
55 to 125
_C
B, C Suffix
Parameter
Symbol
V+ = 15 V, V = 15 V
V
IN
= 2.4 V, 0.8 V
f
Temp
b
Typ
c
Min
d
Max
d
Min
d
Max
d
Unit
Analog Switch
Analog Signal Range
e
V
ANALOG
Full
15
15
15
15
V
Drain-Source
On-Resistance
r
DS(on)
V
D
=
"10 V, I
S
= 1 mA
Room
Full
45
70
100
80
100
W
Source Off
Leakage Current
I
S(off)
V
S
=
"14 V, V
D
=
#14 V
Room
Full
"0.01
2
100
2
100
5
100
5
100
Drain Off
Leakage Current
I
D(off)
V
D
=
"14 V, V
S
=
#14 V
Room
Full
"0.01
2
100
2
100
5
100
5
100
nA
Channel On
Leakage Current
f
I
D(on)
V
S
= V
D
=
"14 V
Room
Full
"0.1
2
200
2
200
5
200
5
200
Digital Control
Input Current with
I
V l
Hi h
I
INH
V
IN
= 2.4 V
Room
Full
0.0009
0.5
1
1
10
p
Input Voltage High
I
INH
V
IN
= 15 V
Room
Full
0.005
0.5
1
1
10
mA
Input Current with
Input Voltage Low
I
INL
V
IN
= 0 V
Room
Full
0.0015
0.5
1
1
10
Dynamic Characteristics
Turn-On Time
t
ON
See Switching Time Test Circuit
Room
440
1000
1000
ns
Turn-Off Time
t
OFF
See Switching Time Test Circuit
Room
340
425
425
ns
Charge Injection
Q
C
L
= 1000 pF, V
g
= 0 V
R
g
= 0
W
Room
10
pC
Source-Off Capacitance
C
S(off)
f = 140 kHz
V
5 V
V
S
= 0 V
Room
9
Drain-Off Capacitance
C
D(off)
V
IN
= 5 V
V
D
= 0 V
Room
9
pF
Channel-On Capacitance
C
D(on)
+
C
S(On)
V
D
= V
S
= 0 V, V
IN
= 0 V
Room
25
pF
Off Isolation
OIRR
V
IN
= 5 V R
L
= 75
W
Room
75
Crosstalk
(Channel-to-Channel)
X
TALK
V
IN
= 5 V, R
L
= 75
W
V
S
= 2 V, f = 1 MHz
Room
90
dB
Power Supplies
Positive Supply Current
I+
Both Channels On or Off
V
0 V
d 2 4 V
Room
0.8
2
2
mA
Negative Supply Current
I
V
IN
= 0 V and 2.4 V
Room
0.23
1
1
mA
Notes:
a.
Refer to PROCESS OPTION FLOWCHART.
b.
Room = 25
_C, Full = as determined by the operating temperature suffix.
c.
Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
d.
The algebraic convention whereby the most negative value is aminimum and the most positive a maximum, is used in this data sheet.
e.
Guaranteed by design, not subject to production test.
f.
V
IN
= input voltage to perform proper function.
DG200A
4
Siliconix
S-52880--Rev. B, 28-Apr-97
Typical Characteristics
Leakage Currents vs. Analog Voltage
r
DS(on)
vs. V
D
and Power Supply Voltage
r
DS(on)
()
W
(pA)
I
, I
SD
V
D
Drain Voltage (V)
V
ANALOG
Analog Voltage (V)
120
15
D
C
+6
15
E
0
15
100
80
60
40
20
0
15
0
6
12
18
24
I
D(off)
or I
S(off)
I
D(on)
T
A
= 25_C
A:
"5 V
B:
"10 V
C:
"12 V
D:
"15 V
E:
"20 V
12
6
6
12
9
3
3
9
12
9
6
3
3
6
9
12
B
A
Supply Currents vs. Toggle Frequency
Input Switching Threshold vs. V+ and V Supply Voltages
V+, V Positive and Negative Supplies (V)
Toggle Frequency (Hz)
(V)
T
V
I+, I (mA)
6
2.5
0
2.0
1.5
1.0
0.5
0
5
4
3
2
1
0
"5
"10
"15
"20
I+
I
V+ = 15 V
V = 15 V
Both logic inputs
toggled simutaneously
1 k
10 k
100 k
1 M
DG200A
Siliconix
S-52880--Rev. B, 28-Apr-97
5
Test Circuits
Figure 2.
Switching Time
Figure 3.
Charge Injection
C
L
1000 pF
V
g
3 V
D
V+
V
R
g
15 V
GND
IN
S
V
O
+15 V
V
O
DV
O
IN
X
ON
ON
OFF
DV
O
= measured voltage error due to charge injection
The charge injection in coulombs is
DQ = C
L
x
DV
O
V
O
is the steady state output with switch on. Feedthrough via gate capacitance may result in spikes at leading and trailing edge of output waveform.
50%
0 V
3 V
t
OFF
t
ON
V
O
V
S
t
r
<20 ns
t
f
<20 ns
Logic
Input
Switch
Input
Switch
Output
90%
C
L
35 pF
R
L
1 k
W
V
O
= V
S
R
L
+ r
DS(on)
R
L
V
S
= +5 V
V
O
V
V+
IN
S
D
3 V
15 V
GND
+15 V
Figure 4.
Off Isolation
S
IN
R
L
D
R
g
= 50
W
V
S
V
O
5 V
Off Isolation = 20 log
V
S
V
O
V+
15 V
GND
V
C
C
+15 V
IN
1
0V
V
O
+15 V
15 V
GND
R
L
V+
V
NC
X
TALK
= 20 log
C
V
S
C
V
O
0V
50
W
V
S
S
1
IN
2
S
2
R
g
= 50
W
D
1
D
2
C = RF bypass
Figure 5.
Channel-to-Channel Crosstalk
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