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TLC556, TLC556Y
DUAL LinCMOS
TM
TIMERS
SLFS047B FEBRUARY 1984 REVISED SEPTEMBER 1997
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
D
Very Low Power Consumption . . . 2 mW
Typ at V
DD
= 5 V
D
Capable of Operation in Astable Mode
D
CMOS Output Capable of Swinging Rail to
Rail
D
High Output-Current Capability
Sink 100 mA Typ
Source 10 mA Typ
D
Output Fully Compatible With CMOS, TTL,
and MOS
D
Low Supply Current Reduces Spikes
During Output Transitions
D
Single-Supply Operation From 2 V to 15 V
D
Functionally interchangeable With the
NE556; Has Same Pinout
description
The TLC556 series are monolithic timing circuits
fabricated using the TI LinCMOS
TM
process, which
provides full compatibility with CMOS, TTL, and
MOS logic and operates at frequencies up to
2 MHz. Accurate time delays and oscillations are
possible with smaller, less-expensive timing
capacitors than the NE556 because of the high
input impedance. Power consumption is low
across the full range of power supply voltages.
Like the NE556, the TLC556 has a trigger level
approximately one-third of the supply voltage and
a threshold level approximately two-thirds of the supply voltage. These levels can be altered by use of the control
voltage terminal. When the trigger input falls below the trigger level, the flip-flop is set and the output goes high.
If the trigger input is above the trigger level and the threshold input is above the threshold level, the flip-flop is
reset and the output is low. The reset input can override all other inputs and can be used to initiate a new timing
cycle. If the reset input is low, the flip-flop is reset and the output is low. Whenever the output is low, a
low-impedance path is provided between the discharge terminal and ground.
While the CMOS output is capable of sinking over 100 mA and sourcing over 10 mA, the TLC556 exhibits greatly
reduced supply-current spikes during output transitions. This minimizes the need for the large decoupling
capacitors required by the NE556.
These devices have internal electrostatic-discharge (ESD) protection circuits that prevent catastrophic failures
at voltages up to 2000 V as tested under MIL-STD-883C, Method 3015. However, care should be exercised in
handling these devices, as exposure to ESD may result in degradation of the device parametric performance.
All unused inputs should be tied to an appropriate logic level to prevent false triggering.
The TLC556C is characterized for operation from 0
C to 70
C. The TLC556I is characterized for operation from
40
C to 85
C. The TLC556M is characterized for operation over the full military temperature range of 55
C
to 125
C.
Copyright
1997, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
LinCMOS is a trademark of Texas Instruments Incorporated.
1 DISCH
1 THRES
1 CONT
1 RESET
1 OUT
1 TRIG
GND
1
2
3
4
5
6
7
14
13
12
11
10
9
8
V
DD
2 DISCH
2 THRES
2 CONT
2 RESET
2 OUT
2 TRIG
D, J, OR N PACKAGE
(TOP VIEW)
3
2
1 20 19
9 10 11 12 13
4
5
6
7
8
18
17
16
15
14
2 THRES
NC
2 CONT
NC
2 RESET
1 CONT
NC
1 RESET
NC
1 OUT
FK PACKAGE
(TOP VIEW)
1 THRES
1 DISCH
NC
2 TRIG
2 OUT
V
2 DISCH
1 TRIG
GND
NC
NCNo internal connection
DD
TLC556, TLC556Y
DUAL LinCMOS
TM
TIMERS
SLFS047B FEBRUARY 1984 REVISED SEPTEMBER 1997
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
AVAILABLE OPTIONS
TA
VDD
PACKAGE
CHIP FORM
TA
RANGE
VDD
RANGE
SMALL OUTLINE
(D)
CHIP CARRIER
(FK)
CERAMIC DIP
(J)
PLASTIC DIP
(N)
CHIP FORM
(Y)
O
C
to
70
C
2 V
to
18 V
TLC556CD
TLC556CN
TLC556Y
4O
C
to
85
C
3 V
to
18 V
TLC556lD
TLC556IN
55
C
to
125
C
5 V
to
18 V
TLC556MD
TLC556MFK
TLC556MJ
TLC556MN
The D package is available taped and reeled. Add the suffix R to the device type (e.g., TLC556CDR).
FUNCTION TABLE
RESET
VOLTAGE
TRIGGER
VOLTAGE
THRESHOLD
VOLTAGE
OUTPUT
DISCHARGE
SWITCH
< MIN
Irrelevant
Irrelevant
L
On
> MAX
< MIN
Irrelevant
H
Off
>MAX
>MAX
>MAX
L
On
> MAX
> MAX
< MIN
As previously established
For conditions shown as MIN or MAX, use the appropriate value specified under electrical characteristics.
functional block diagram (each timer)
OUT
DISCH
R1
R
S
1
RESET
CONT
VDD
THRES
R
R
R
GND
TRIG
3
5
1
4
14
2
6
7
RESET can override TRIG and THRES.
TRIG can override THRES.
Pin numbers shown are for the D, J, or N packages.
TLC556, TLC556Y
DUAL LinCMOS
TM
TIMERS
SLFS047B FEBRUARY 1984 REVISED SEPTEMBER 1997
3
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
TLC556Y chip information
These chips, properly assembled, display characteristics similar to the TLC556 (see electrical table). Thermal
compression or ultrasonic bonding may be used on the doped aluminum bonding pads. Chips may be mounted
with conductive epoxy or a gold-silicon preform.
OUT
DISCH
R1
R
S
1
RESET
CONT
VDD
THRESH
R
R
R
GND
TRIG
(3)
(5)
(1)
BONDING PAD ASSIGNMENTS
CHIP THICKNESS: 15 TYPICAL
BONDING PADS: 4
4 MINIMUM
TJ max = 150
C
TOLERANCES ARE
10%
ALL DIMENSIONS ARE IN MILS
NO BACKSIDE METALLIZATION
PIN (7) INTERNALLY CONNECTED
TO BACKSIDE OF CHIP
FUNCTIONAL BLOCK DIAGRAM (EACH TIMER)
(4)
(14)
(2)
(6)
(7)
61
97
TLC556, TLC556Y
DUAL LinCMOS
TM
TIMERS
SLFS047B FEBRUARY 1984 REVISED SEPTEMBER 1997
4
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature (unless otherwise noted)
TLC556C
TLC556I
TLC556M
UNIT
Supply voltage, VDD (see Note 1)
18
18
18
V
Input voltage range, VI
0.3 to VDD
0.3 to VDD
0.3 to VDD
V
Sink current, discharge or output
150
150
150
mA
Source current, output
15
15
15
mA
Continuous total power dissipation
See Dissipation Rating Table
Operating free-air temperature range
0 to 70
40 to 85
55 to 125
C
Storage temperature range
65 to 150
65 to 150
65 to 150
C
Case temperature for 60 seconds
FK package
260
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds
J package
300
C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds
D or N package
260
260
NOTE 1: All voltage values are with respect to network ground terminal.
DISSIPATION RATING TABLE
PACKAGE
TA
25
C
POWER RATING
DERATING FACTOR
ABOVE TA = 25
C
TA = 70
C
POWER RATING
TA = 85
C
POWER RATING
TA = 125
C
POWER RATING
D
FK
J
N
950 mW
1375 mW
1375 mW
1150 mW
7.6 mW/
C
11.0 mW/
C
11.0 mW/
C
9.2 mW/
C
608 mW
880 mW
880 mW
736 mW
494 mW
715 mW
715 mW
598 mW
N/A
275 mW
275 mW
N/A
recommended operating conditions
MIN
MAX
UNIT
Supply voltage, VDD
2
15
V
TLC556C
0
70
Operating free-air temperature range, TA
TLC556I
40
85
C
TLC556M
55
125
TLC556, TLC556Y
DUAL LinCMOS
TM
TIMERS
SLFS047B FEBRUARY 1984 REVISED SEPTEMBER 1997
5
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
electrical characteristics at specified free-air temperature, V
DD
= 2 V for TLC556C, V
DD
= 3 V for
TLC556I
PARAMETER
TEST
TA
TLC556C
TLC556I
UNIT
PARAMETER
CONDITIONS
TA
MIN
TYP
MAX
MIN
TYP
MAX
UNIT
VIT
Input threshold voltage
25
C
0.95
1.33
1.65
1.6
2
2.4
V
VIT
Input threshold voltage
Full range
0.85
1.75
1.5
2.5
V
Threshold current
25
C
10
10
pA
Threshold current
MAX
75
150
pA
V(t i
)
Trigger voltage
25
C
0.4
0.67
0.95
0.71
1
1.29
V
V(trigger) Trigger voltage
Full range
0.3
1.05
0.61
1.39
V
I(t i
)
Trigger current
25
C
10
10
pA
I(trigger)
Trigger current
MAX
75
150
pA
V(
t)
Reset voltage
25
C
0.4
1.1
1.5
0.4
1.1
1.5
V
V(reset)
Reset voltage
Full range
0.3
1.8
0.3
1.8
V
I(
t)
Reset current
25
C
10
10
pA
I(reset)
Reset current
MAX
75
150
pA
Control voltage (open circuit) as
a percentage of supply voltage
MAX
66.7%
66.7%
Discharge switch on-state volt-
IOL = 1 mA
25
C
0.04
0.2
0.03
0.2
V
g
age
IOL = 1 mA
Full range
0.25
0.375
V
Discharge switch off-state cur-
25
C
0.1
0.1
nA
g
rent
MAX
0.5
120
nA
VOH
High level output voltage
IOH = 300
A
25
C
1.5
1.9
1.5
1.9
V
VOH
High-level output voltage
IOH = 300
A
Full range
1.5
2.5
V
VOL
Low level output voltage
IOL = 1 mA
25
C
0.07
0.3
0.07
0.3
V
VOL
Low-level output voltage
IOL = 1 mA
Full range
0.35
0.4
V
IDD
Supply current
See Note 2
25
C
130
500
130
500
A
IDD
Supply current
See Note 2
Full range
800
1000
A
Full range is 0
C to 70
C for TLC556C and 40
C to 85
C for TLC556I.
NOTE 2: These values apply for the expected operating configurations in which THRES is connected directly to DISCH or TRIG.