Document Outline

• features
• description
• functional block diagram
• memory map
• pin functions
  • Pin Functions
  • Pin Assignments
• absolute maximum ratings over operating case temperature range (unless otherwise noted)�
• recommended operating conditions (see Note 5)
• electrical characteristics over recommended ranges of supply voltage (unless otherwise noted) ( see Note 5)
• PARAMETER MEASUREMENT INFORMATION
  • signal transition levels
  • timing parameter symbology
• X2/CLKIN, H1, and H3 timing
  • timing parameters for X2/CLKIN, H1, H3 (see Note 5, Figure 7, Figure 8, and Figure 9)
• memory read/write timing
  • timing parameters for a memory [(M)STRB\ = 0] read/write (see Figure 10 and Figure 11)
  • timing parameters for a memory ( IOSTRB\ = 0) read ( see Figure 12)
  • timing parameters for a memory (IOSTRB\ = 0) write (see Figure 13)
• XF0 and XF1 timing when executing LDFI or LDII
  • timing parameters for XF0 and XF1 when executing LDFI or LDII ( see Figure 14)
• XF0 timing when executing STFI and STII
  • timing parameters for XF0 when executing STFI or STII (see Figure 15)
• XF0 and XF1 timing when executing SIGI
  • timing parameters for XF0 and XF1 when executing SIGI (see Figure 16)
• loading when XFx is configured as an output
  • timing parameters for loading the XFx register when configured as an output pin ( see Figure 17)
• changing XFx from an output to an input
  • timing parameters of XFx changing from output to input mode ( see Figure 18)
• changing XFx from an input to an output
  • timing parameters of XFx changing from input to output mode ( see Figure 19)
• reset timing
  • timing parameters for RESET\ [P = tc(CI)] (see Figure 9 and Figure 20)
• interrupt-response timing
  • timing parameters for INT3\-INT0\ [Q = tc(H)] (see Figure 21)
• interrupt-acknowledge timing
  • timing parameters for IACK\ (see Figure 22)
• serial-port timing parameters (see Figure 23 and Figure 24)
• HOLD\ timing
  • HOLD\/ HOLDA\ timing (see Figure 25)
• general-purpose I/O timing
  • peripheral pin I/O timing
    • timing parameters for peripheral pin general-purpose I/O (see Note 11 and Figure 26)
  • changing the peripheral pin I/O modes
    • timing parameters for peripheral pin changing from general-purpose output to input mode ( see Note 12 and Figure 27)
    • timing parameters for peripheral pin changing from general-purpose input to output mode ( see Figure 28)
  • timer pin (TCLK0 and TCLK1) timing
    • timing parameters for timer pin (TCLK0 and TCLK1) (see Figure 29)
• SHZ\ pin timing
  • timing parameters for SHZ\ pin (see Figure 30)
• SMJ320C30 part order information
• MECHANICAL DATA
  • HFG (S-CQFP-F196) CERAMIC QUAD FLATPACK WITH TIE BAR
  • GA-GB (S-CPGA-P15 X 15) CERAMIC PIN GRID ARRAY PACKAGE