SN54ABTH32245, SN74ABTH32245
36-BIT BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS228G JUNE 1992 REVISED MAY 1997
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
D
Members of the Texas Instruments
Widebus+
TM
Family
D
State-of-the-Art
EPIC-
B
TM
BiCMOS Design
Significantly Reduces Power Dissipation
D
Latch-Up Performance Exceeds 500 mA Per
JEDEC Standard JESD-17
D
Typical V
OLP
(Output Ground Bounce)
< 0.8 V at V
CC
= 5 V, T
A
= 25
C
D
High-Impedance State During Power Up
and Power Down
D
Released as DSCC SMD 5962-9557701NXD
D
PZ Package Qualified for Military Per
MIL-PRF-38535 (QML)
D
Distributed V
CC
and GND Pin Configuration
Minimizes High-Speed Switching Noise
D
High-Drive Outputs (32-mA I
OH
, 64-mA I
OL
)
D
Bus Hold on Data Inputs Eliminates the
Need for External Pullup/Pulldown
Resistors
D
Package Options Include 100-Pin Plastic
Thin Quad Flat (PZ) Package With
14
14-mm Body Using 0.5-mm Lead Pitch
and Space-Saving 100-Pin Ceramic Quad
Flat (HS) Package
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
'ABTH32245 . . . PZ PACKAGE
(TOP VIEW)
1A9
2A1
GND
2A2
2A3
2A4
2A5
GND
2A6
2A7
2A8
2A9
V
CC
3A1
3A2
3A3
3A4
GND
3A5
3A6
3A7
3A8
GND
3A9
4A1
1B9
2B1
GND
2B2
2B3
2B4
2B5
GND
2B6
2B7
2B8
2B9
V
CC
3B1
3B2
3B3
3B4
GND
3B5
3B6
3B7
3B8
GND
3B9
4B1
1A8
1A7
1A6
V
CC
GND
4A5
4A2
4A3
4A4
1A5
1A4
1A3
1A2
1A1
GND
1DIR
1OE
2OE
2DIR
GND
1B1
1B2
1B3
1B4
1B5
GND
1B6
1B7
1B8
GND
4A9
GND
4A6
4A7
4A8
3OE
3DIR
4DIR
4OE
4B7
4B6
GND
4B9
4B8
GND
4B4
4B5
4B3
4B2
V
CC
50
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
The HS package is not production released.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Widebus+ and EPIC-
B are trademarks of Texas Instruments Incorporated.
Copyright
1997, Texas Instruments Incorporated
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
SN54ABTH32245, SN74ABTH32245
36-BIT BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS228G JUNE 1992 REVISED MAY 1997
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
GND
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
1B7
1B8
2B1
2B2
2B3
2B4
2B5
GND
2B6
2B7
2B8
2B9
3B1
3B4
GND
3B5
3B6
3B7
3B8
1A6
1A8
1A9
2A1
2A2
2A3
2A4
2A5
2A6
2A7
2A9
3A1
3A2
3A3
3A4
GND
3A5
3A7
3A8
GND
1A5
1A3
1A2
1A1
1B2
1B3
1B4
1B5
GND
GND
4A5
4A6
4A7
4A8
4A9
4B9
4B8
4B7
4B5
GND
4B6
1A7
GND
1B9
3B3
GND
3A6
3A9
4A1
4A2
4A3
GND
3B9
4B1
4B2
4B3
1B1
1A4
SN54ABTH32245 . . . HS PACKAGE
(TOP VIEW)
2A8
V
CC
4DIR
4OE
CC
V
3OE
3DIR
3B2
V
CC
GND
2DIR
2OE
CC
V
1OE
1DIR
GND
GND
4A4
4B4
1B6
For HS package availability, please contact the factory or your local TI Field Sales Office.
GND
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
description
The 'ABTH32245 are 36-bit (quad 9-bit) noninverting 3-state transceivers designed for synchronous two-way
communication between data buses. The control-function implementation minimizes external timing
requirements.
These devices can be used as four 9-bit transceivers, two18-bit transceivers, or one 36-bit transceiver. They
allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level
at the direction-control (DIR) inputs. The output-enable (OE) inputs can be used to disable the device so that
the buses are effectively isolated.
When V
CC
is between 0 and 2.1 V, the device is in the high-impedance state during power up or power down.
However, to ensure the high-impedance state above 2.1 V, OE should be tied to V
CC
through a pullup resistor;
the minimum value of the resistor is determined by the current-sinking capability of the driver.
Active bus-hold circuitry holds unused or floating data inputs at a valid logic level.
SN54ABTH32245, SN74ABTH32245
36-BIT BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS228G JUNE 1992 REVISED MAY 1997
3
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
description (continued)
The SN54ABTH32245 is characterized for operation over the full military temperature range of 55
C to 125
C.
The SN74ABTH32245 is characterized for operation from 40
C to 85
C.
FUNCTION TABLE
(each 9-bit section)
INPUTS
OPERATION
OE
DIR
OPERATION
L
L
B data to A bus
L
H
A data to B bus
H
X
Isolation
logic diagram (positive logic)
1A1
1DIR
1B1
1OE
To Eight Other Channels
One of Nine
Channels
Pin numbers shown are for the PZ package.
90
92
89
84
2A1
2DIR
2B1
2OE
To Eight Other Channels
One of Nine
Channels
86
2
87
74
3A1
3DIR
3B1
3OE
To Eight Other Channels
One of Nine
Channels
40
14
39
62
4A1
4DIR
4B1
4OE
To Eight Other Channels
One of Nine
Channels
36
25
37
51
SN54ABTH32245, SN74ABTH32245
36-BIT BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS228G JUNE 1992 REVISED MAY 1997
4
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
CC
0.5 V to 7 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, V
I
(except I/O ports) (see Note 1)
0.5 V to 7 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage range applied to any output in the high or power-off state, V
O
0.5 V to 5.5 V
. . . . . . . . . . . . . . . . . . .
Current into any output in the low state, I
O
: SN54ABTH32245 96
mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SN74ABTH32245 128
mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, I
IK
(V
I
< 0)
18 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, I
OK
(V
O
< 0)
50 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance,
JA
(see Note 2): PZ package
50
C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
stg
65
C to 150
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES:
1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. The package thermal impedance is calculated in accordance with EIA/JEDEC Std JESD51.
recommended operating conditions (see Note 3)
SN54ABTH32245
SN74ABTH32245
UNIT
MIN
MAX
MIN
MAX
UNIT
VCC
Supply voltage
4.5
5.5
4.5
5.5
V
VIH
High-level input voltage
2
2
V
VIL
Low-level input voltage
0.8
0.8
V
VI
Input voltage
0
VCC
0
VCC
V
IOH
High-level output current
24
32
mA
IOL
Low-level output current
48
64
mA
t/
v
Input transition rise or fall rate
Outputs enabled
10
10
ns/V
t/
VCC
Power-up ramp rate
200
200
s/V
TA
Operating free-air temperature
55
125
40
85
C
NOTE 3: Unused control pins must be held high or low to prevent them from floating.
SN54ABTH32245, SN74ABTH32245
36-BIT BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS228G JUNE 1992 REVISED MAY 1997
5
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
SN54ABTH32245
SN74ABTH32245
UNIT
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
MIN
TYP
MAX
UNIT
VIK
VCC = 4.5 V,
II = 18 mA
1.2
1.2
V
VCC = 4.5 V,
IOH = 3 mA
2.5
2.5
VOH
VCC = 5 V,
IOH = 3 mA
3
3
V
VOH
VCC = 4 5 V
IOH = 24 mA
2
V
VCC = 4.5 V
IOH = 32 mA
2
VOL
VCC = 4 5 V
IOL = 48 mA
0.55
0.55
V
VOL
VCC = 4.5 V
IOL = 64 mA
0.55
V
Vhys
100
100
mV
Control inputs
VCC = 0 to 5.5 V,
VI = VCC or GND
1
A
II
A or B ports
VCC = 2.1 V to 5.5 V,
VI = VCC or GND
20
A
II
Control inputs
VCC = 5 5 V
VI = VCC or GND
1
A
A or B ports
VCC = 5.5 V,
VI = VCC or GND
20
A
II(h ld) A or B ports
VCC = 4 5 V
VI = 0.8 V
100
100
A
II(hold) A or B ports
VCC = 4.5 V
VI = 2 V
100
100
A
IOZPU
VCC = 0 to 2.1 V, VO = 0.5 V to 2.7 V, OE = X
50
50
A
IOZPD
VCC = 2.1 V to 0, VO = 0.5 V to 2.7 V, OE = X
50
50
A
Ioff
VCC = 0,
VI or VO
4.5 V
100
A
ICEX
VCC = 5.5 V, VO = 5.5 V
Outputs high
50
50
A
IO
VCC = 5.5 V,
VO = 2.5 V
50
100
180
50
100
180
mA
VCC = 5.5 V,
Outputs high
3
3
ICC
VCC = 5.5 V,
IO = 0,
Outputs low
20
20
mA
VI = VCC or GND
Outputs disabled
2
2
ICC
VCC = 5.5 V, One input at 3.4 V,
Other inputs at VCC or GND
1
1
mA
Ci
Control inputs
VI = 2.5 V or 0.5 V
3.5
3.5
pF
Cio
A or B ports
VO = 2.5 V or 0.5 V
9.5
9.5
pF
All typical values are at VCC = 5 V, TA = 25
C.
This parameter is specified by characterization.
Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND.
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature, C
L
= 50 pF (unless otherwise noted) (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
VCC = 5 V,
TA = 25
C#
SN54ABTH32245
SN74ABTH32245
UNIT
(INPUT)
(OUTPUT)
MIN
TYP
MAX
MIN
MAX
MIN
MAX
tPLH
A or B
B or A
1.7
3.2
4.4
1
5.3
1.7
5
ns
tPHL
A or B
B or A
1.7
3.3
4.6
1
5.3
1.7
5.2
ns
tPZH
OE
B or A
1.6
4.2
6.1
1
7.6
1.6
7.3
ns
tPZL
OE
B or A
2.7
5.2
7
1.5
8.2
2.7
8.1
ns
tPHZ
OE
B or A
1.3
3.9
6.1
0.8
6.7
1.3
6.5
ns
tPLZ
OE
B or A
2
4.4
6.6
1
7.2
2
6.9
ns
# These limits apply only to the SN74ABTH32245
PDF 
ZIP