SN54LVC373A, SN74LVC373A
OCTAL TRANSPARENT D TYPE LATCHES
WITH 3 STATE OUTPUTS
SCAS295R - JANUARY 1993 - REVISED AUGUST 2003
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
D
Operate From 1.65 V to 3.6 V
D
Inputs Accept Voltages to 5.5 V
D
Max t
pd
of 6.8 ns at 3.3 V
D
Typical V
OLP
(Output Ground Bounce)
<0.8 V at V
CC
= 3.3 V, T
A
= 25
C
D
Typical V
OHV
(Output V
OH
Undershoot)
>2 V at V
CC
= 3.3 V, T
A
= 25
C
D
Support Mixed-Mode Signal Operation on
All Ports (5-V Input/Output Voltage With
3.3-V V
CC
)
D
I
off
Supports Partial-Power-Down Mode
Operation
D
Latch-Up Performance Exceeds 250 mA Per
JESD 17
D
ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
SN74LVC373A . . . RGY PACKAGE
(TOP VIEW)
1
20
10
11
2
3
4
5
6
7
8
9
19
18
17
16
15
14
13
12
8Q
8D
7D
7Q
6Q
6D
5D
5Q
1Q
1D
2D
2Q
3Q
3D
4D
4Q
LE
V
G
ND
CC
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
OE
1Q
1D
2D
2Q
3Q
3D
4D
4Q
GND
V
CC
8Q
8D
7D
7Q
6Q
6D
5D
5Q
LE
SN54LVC373A . . . J OR W PACKAGE
SN74LVC373A . . . DB, DGV, DW, N,
NS, OR PW PACKAGE
(TOP VIEW)
SN54LVC373A . . . FK PACKAGE
(TOP VIEW)
3
2
1 20 19
9 10 11 12 13
4
5
6
7
8
18
17
16
15
14
2D
2Q
3Q
3D
4D
1D
1Q
OE
5Q
5D
8Q
4Q
GND
LE
V
CC
8D
7D
7Q
6Q
6D
OE
description/ordering information
The SN54LVC373A octal transparent D-type latch is designed for 2.7-V to 3.6-V V
CC
operation, and the
SN74LVC373A octal transparent D-type latch is designed for 1.65-V to 3.6-V V
CC
operation.
While the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is taken low, the
Q outputs are latched at the logic levels set up at the D inputs.
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high
or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive
the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus
lines without interface or pullup components.
OE does not affect the internal operations of the latches. Old data can be retained or new data can be entered
while the outputs are in the high-impedance state.
These devices are fully specified for partial-power-down applications using I
off
. The I
off
circuitry disables the
outputs, preventing damaging current backflow through the devices when they are powered down.
To ensure the high-impedance state during power up or power down, OE should be tied to V
CC
through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators
in a mixed 3.3-V/5-V system environment.
Copyright
2003, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
On products compliant to MIL PRF 38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
SN54LVC373A, SN74LVC373A
OCTAL TRANSPARENT D TYPE LATCHES
WITH 3 STATE OUTPUTS
SCAS295R - JANUARY 1993 - REVISED AUGUST 2003
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
description/ordering information (continued)
terminal assignments
1
2
3
4
A
1Q
OE
VCC
8Q
B
2D
7D
1D
8D
C
3Q
2Q
6Q
7Q
D
4D
5D
3D
6D
E
GND
4Q
LE
5Q
ORDERING INFORMATION
TA
PACKAGE
ORDERABLE
PART NUMBER
TOP-SIDE MARKING
PDIP - N
Tube of 20
SN74LVC373AN
SN74LVC373AN
QFN - RGY
Reel of 1000
SN74LVC373ARGYR
LC373A
SOIC - DW
Tube of 25
SN74LVC373ADW
LVC373A
SOIC - DW
Reel of 2000
SN74LVC373ADWR
LVC373A
SOP - NS
Reel of 2000
SN74LVC373ANSR
LVC373A
-40
C to 85
C
SSOP - DB
Reel of 2000
SN74LVC373ADBR
LC373A
-40
C to 85
C
Tube of 70
SN74LVC373APW
TSSOP - PW
Reel of 2000
SN74LVC373APWR
LC373A
TSSOP - PW
Reel of 250
SN74LVC373APWT
LC373A
TVSOP - DGV
Reel of 2000
SN74LVC373ADGVR
LC373A
VFBGA - GQN
Reel of 1000
SN74LVC373AGQNR
LC373A
VFBGA - ZQN (Pb-free)
Reel of 1000
SN74LVC373AZQNR
LC373A
CDIP - J
Tube of 20
SNJ54LVC373AJ
SNJ54LVC373AJ
-55
C to 125
C
CFP - W
Tube of 85
SNJ54LVC373AW
SNJ54LVC373AW
-55 C to 125 C
LCCC - FK
Tube of 55
SNJ54LVC373AFK
SNJ54LVC373AFK
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available
at www.ti.com/sc/package.
FUNCTION TABLE
(each latch)
INPUTS
OUTPUT
OE
LE
D
OUTPUT
Q
L
H
H
H
L
H
L
L
L
L
X
Q0
H
X
X
Z
GQN OR ZQN PACKAGE
(TOP VIEW)
1
2
3
4
A
B
C
D
E
SN54LVC373A, SN74LVC373A
OCTAL TRANSPARENT D TYPE LATCHES
WITH 3 STATE OUTPUTS
SCAS295R - JANUARY 1993 - REVISED AUGUST 2003
3
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
logic diagram (positive logic)
OE
To Seven Other Channels
1
11
3
2
LE
1D
C1
1D
1Q
Pin numbers shown are for the DB, DGV, DW, FK, J, N, NS, PW, RGY, and W packages.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
CC
-0.5 V to 6.5 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, V
I
(see Note 1)
-0.5 V to 6.5 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage range applied to any output in the high-impedance or power-off state, V
O
(see Note 1)
-0.5 V to 6.5 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage range applied to any output in the high or low state, V
O
(see Notes 1 and 2)
-0.5 V to V
CC
+ 0.5 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, I
IK
(V
I
< 0)
-50 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, I
OK
(V
O
< 0)
-50 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous output current, I
O
50 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous current through V
CC
or GND
100 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance,
JA
(see Note 3): DB package
70
C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(see Note 3): DGV package
92
C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(see Note 3): DW package
58
C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(see Note 3): GQN/ZQN package
76
C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . .
(see Note 3): N package
69
C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(see Note 3): NS package
60
C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(see Note 3): PW package
83
C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(see Note 4): RGY package
37
C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
stg
-65
C to 150
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES:
1. The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The value of VCC is provided in the recommended operating conditions table.
3. The package thermal impedance is calculated in accordance with JESD 51-7.
4. The package thermal impedance is calculated in accordance with JESD 51-5.
SN54LVC373A, SN74LVC373A
OCTAL TRANSPARENT D TYPE LATCHES
WITH 3 STATE OUTPUTS
SCAS295R - JANUARY 1993 - REVISED AUGUST 2003
4
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
recommended operating conditions (see Note 5)
SN54LVC373A
SN74LVC373A
UNIT
MIN
MAX
MIN
MAX
UNIT
VCC
Supply voltage
Operating
2
3.6
1.65
3.6
V
VCC
Supply voltage
Data retention only
1.5
1.5
V
VCC = 1.65 V to 1.95 V
0.65
VCC
VIH
High-level input voltage
VCC = 2.3 V to 2.7 V
1.7
V
VIH
High-level input voltage
VCC = 2.7 V to 3.6 V
2
2
V
VCC = 1.65 V to 1.95 V
0.35
VCC
VIL
Low-level input voltage
VCC = 2.3 V to 2.7 V
0.7
V
VIL
Low-level input voltage
VCC = 2.7 V to 3.6 V
0.8
0.8
V
VI
Input voltage
0
5.5
0
5.5
V
VO
Output voltage
High or low state
0
VCC
0
VCC
V
VO
Output voltage
3-state
0
5.5
0
5.5
V
VCC = 1.65 V
-4
IOH
High-level output current
VCC = 2.3 V
-8
mA
IOH
High-level output current
VCC = 2.7 V
-12
-12
mA
VCC = 3 V
-24
-24
VCC = 1.65 V
4
IOL
Low-level output current
VCC = 2.3 V
8
mA
IOL
Low-level output current
VCC = 2.7 V
12
12
mA
VCC = 3 V
24
24
t/
v
Input transition rise or fall rate
10
10
ns/V
TA
Operating free-air temperature
-55
125
-40
85
C
NOTE 5: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
SN54LVC373A, SN74LVC373A
OCTAL TRANSPARENT D TYPE LATCHES
WITH 3 STATE OUTPUTS
SCAS295R - JANUARY 1993 - REVISED AUGUST 2003
5
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
SN54LVC373A
SN74LVC373A
UNIT
PARAMETER
TEST CONDITIONS
VCC
MIN
TYP
MAX
MIN
TYP
MAX
UNIT
IOH = -100 A
1.65 V to 3.6 V
VCC-0.2
IOH = -100
A
2.7 V to 3.6 V
VCC-0.2
IOH = -4 mA
1.65 V
1.2
VOH
IOH = -8 mA
2.3 V
1.7
V
VOH
IOH = -12 mA
2.7 V
2.2
2.2
V
IOH = -12 mA
3 V
2.4
2.4
IOH = -24 mA
3 V
2.2
2.2
IOL = 100 A
1.65 V to 3.6 V
0.2
IOL = 100
A
2.7 V to 3.6 V
0.2
VOL
IOL = 4 mA
1.65 V
0.45
V
VOL
IOL = 8 mA
2.3 V
0.7
V
IOL = 12 mA
2.7 V
0.4
0.4
IOL = 24 mA
3 V
0.55
0.55
II
VI = 0 to 5.5 V
3.6 V
5
5
A
Ioff
VI or VO = 5.5 V
0
10
A
IOZ
VO = 0 to 5.5 V
3.6 V
15
10
A
ICC
VI = VCC or GND
IO = 0
3.6 V
10
10
A
ICC
3.6 V
VI
5.5 V
IO = 0
3.6 V
10
10
A
ICC
One input at VCC - 0.6 V,
Other inputs at VCC or GND
2.7 V to 3.6 V
500
500
A
Ci
VI = VCC or GND
3.3 V
4
12
4
pF
Co
VO = VCC or GND
3.3 V
5.5
12
5.5
pF
All typical values are at VCC = 3.3 V, TA = 25
C.
This applies in the disabled state only.
timing requirements over recommended operating free-air temperature range (unless otherwise
noted) (see Figure 1)
SN54LVC373A
VCC = 2.7 V
VCC = 3.3 V
0.3 V
UNIT
MIN
MAX
MIN
MAX
tw
Pulse duration, LE high
3.3
3.3
ns
tsu
Setup time, data before LE
2
2
ns
th
Hold time, data after LE
2
2
ns
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