THS4031, THS4032
100-MHz LOW-NOISE HIGH-SPEED AMPLIFIERS
SLOS224C JULY 1999 REVISED APRIL 2000
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
D
Ultra-low 1.6 nV/
Hz Voltage Noise
D
High Speed
100 MHz Bandwidth (G = 2 (1), 3 dB)
100 V/
s Slew Rate
D
Stable in Gains of 2 (1) or Greater
D
Very Low Distortion
THD = 72 dBc (f = 1 MHz, R
L
= 150
)
THD = 90 dBc (f = 1 MHz, R
L
= 1 k
)
D
Low 0.5 mV (Typ) Input Offset Voltage
D
90 mA Output Current Drive (Typical)
D
5 V to
15 V Typical Operation
D
Available in Standard SOIC, MSOP
PowerPAD
TM
, JG, or FK Package
D
Evaluation Module Available
description
The THS4031 and THS4032 are ultralow-voltage
noise, high-speed voltage feedback amplifiers
that are ideal for applications requiring low voltage
noise, including communication and imaging. The
single-amplifier THS4031 and the dual-amplifier
THS4032 offer very good ac performance with
100-MHz bandwidth, 100-V/
s slew rate, and
60-ns settling time (0.1%). The THS4031 and
THS4032 are stable at gains of 2 (1) or greater.
These amplifiers have a high drive capability of
90 mA and draw only 8.5-mA supply current per
channel. With total harmonic distortion (THD) of
72 dBc at f = 1 MHz, the THS4031 and THS4032
are ideally suited for applications requiring low
distortion.
Related Devices
DEVICE
DESCRIPTION
THS4011/12
240-MHz Low Distortion High-Speed Amplifiers
THS4021/2
350-MHz Low Noise High-Speed Amplifiers
THS4081/2
175-MHz Low Power High-Speed Amplifiers
Copyright
2000, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
THS4032
D AND DGN PACKAGE
(TOP VIEW)
1
2
3
4
8
7
6
5
1OUT
1IN
1IN +
V
CC
V
CC+
2OUT
2IN
2IN+
1
2
3
4
8
7
6
5
NULL
IN
IN +
V
CC
NULL
V
CC+
OUT
NC
THS4031
D, DGN, AND JG PACKAGE
(TOP VIEW)
NC No internal connection
Cross-Section View Showing
PowerPAD
TM
Option (DGN)
19
20
1
3
2
17
18
16
15
14
13
12
11
9
10
5
4
6
7
8
NC
V
CC+
NC
OUT
NC
NC
IN
NC
IN+
NC
NC
NULL
NC
NULL
NC
V
NC
NC
NC
NC
THS4031
FK PACKAGE
(TOP VIEW)
CC
PowerPAD is a trademark of Texas Instruments.
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
CAUTION: The THS4031 and THS4032 provide ESD protection circuitry. However, permanent damage can still occur if this device
is subjected to high-energy electrostatic discharges. Proper ESD precautions are recommended to avoid any performance
degradation or loss of functionality.
THS4031, THS4032
100-MHz LOW-NOISE HIGH-SPEED AMPLIFIERS
SLOS224C JULY 1999 REVISED APRIL 2000
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Vn
In
1
10
100
1 k
V
oltage Noise
10
f Frequency Hz
VOLTAGE NOISE AND CURRENT NOISE
vs
FREQUENCY
20
10 k
100 k
V
n
nV/
Hz
VCC =
15 V AND
5 V
TA = 25
C
Current Noise
I n
pA/
Hz
AVAILABLE OPTIONS
PACKAGED DEVICES
TA
NUMBER
OF
PLASTIC
SMALL
PLASTIC MSOP (DGN)
CERAMIC DIP
CHIP
CARRIER
EVALUATION
MODULE
CHANNELS
OUTLINE
(D)
DEVICE
SYMBOL
(JG)
CARRIER
(FK)
MODULE
0
C to 70
C
1
THS4031CD
THS4031CDGN
TIACM
--
--
THS4031EVM
0
C to 70
C
2
THS4032CD
THS4032CDGN
TIABD
--
--
THS4032EVM
40
C to 85
C
1
THS4031ID
THS4031IDGN
TIACN
--
--
--
40
C to 85
C
2
THS4032ID
THS4032IDGN
TIABG
--
--
--
55
C to 125
C
1
--
--
--
THS4031MJG
THS4031MFK
--
The D and DGN packages are available taped and reeled. Add an R suffix to the device type (i.e., THS4031CDGNR).
THS4031, THS4032
100-MHz LOW-NOISE HIGH-SPEED AMPLIFIERS
SLOS224C JULY 1999 REVISED APRIL 2000
3
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
functional block diagram
OUT
8
6
1
IN
IN+
2
3
Null
+
1OUT
1IN
1IN+
VCC
2OUT
2IN
2IN+
VCC
8
6
1
2
3
5
7
4
+
+
Figure 1. THS4031 Single Channel
Figure 2. THS4032 Dual Channel
absolute maximum ratings over operating free-air temperature (unless otherwise noted)
Supply voltage, V
CC+
to V
CC
33
V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage, V
I
V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output current, I
O
150 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Differential input voltage, V
IO
4 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous total power dissipation
See Dissipation Rating Table
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature, T
A
:
C-suffix 0
C to 70
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I-suffix 40
C to 85
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
M-suffix 55
C to 125
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum junction temperature, T
J
150
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature, T
stg
65
C to 150
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds
300
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds, JG package
300
C
. . . . . . . . . . . . . . . . . . . .
Case temperature for 60 seconds, FK package
260
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only and
functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
DISSIPATION RATING TABLE
PACKAGE
JA
JC
TA = 25
C
PACKAGE
JA
(
C/W)
JC
(
C/W)
A
POWER RATING
D
167
38.3
740 mW
DGN
58.4
4.7
2.14 W
JG
119
28
1050 mW
FK
87.7
20
1375 mW
This data was taken using the JEDEC standard Low-K test PCB. For the JEDEC Proposed
High-K test PCB, the
JA is 95
C/W with a power rating at TA = 25
C of 1.32 W.
This data was taken using 2 oz. trace and copper pad that is soldered directly to a 3-in.
3-in.
PC. For further information, refer to
Application Information section of this data sheet.
THS4031, THS4032
100-MHz LOW-NOISE HIGH-SPEED AMPLIFIERS
SLOS224C JULY 1999 REVISED APRIL 2000
4
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
recommended operating conditions
MIN
NOM
MAX
UNIT
Supply voltage VCC and VCC
Dual supply
4.5
16
V
Supply voltage, VCC+ and VCC
Single supply
9
32
V
C-suffix
0
70
Operating free-air temperature, TA
I-suffix
40
85
C
M-suffix
55
125
electrical characteristics at T
A
= 25
C, V
CC
=
15 V, R
L
= 150
(unless otherwise noted)
dynamic performance
PARAMETER
TEST CONDITIONS
THS403xC, THS403xI
UNIT
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Small signal bandwidth ( 3 dB)
VCC =
15 V
Gain = 1 or 2
100
MHz
Small-signal bandwidth (3 dB)
VCC =
5 V
Gain = 1 or 2
90
MHz
BW
Bandwidth for 0 1 dB flatness
VCC =
15 V
Gain = 1 or 2
50
MHz
BW
Bandwidth for 0.1 dB flatness
VCC =
5 V
Gain = 1 or 2
45
MHz
Full power bandwidth
VO(pp) = 20 V,
VCC =
15 V
RL = 1 k
1.6
MHz
Full power bandwidth
VO(pp) = 5 V,
VCC =
5 V
RL = 1 k
5
MHz
SR
Slew rate
VCC =
15 V,
20-V step
Gain = 1
100
V/
s
SR
Slew rate
VCC =
5 V,
5-V step
Gain = 1
80
V/
s
Settling time to 0 1%
VCC =
15 V,
5-V step
Gain = 1
60
ns
t
Settling time to 0.1%
VCC =
5 V,
2.5-V step
Gain = 1
45
ns
ts
Settling time to 0 01%
VCC =
15 V,
5-V step
Gain = 1
90
ns
Settling time to 0.01%
VCC =
5 V,
2.5-V step
Gain = 1
80
ns
Full range = 0
C to 70
C for the THS403xC and 40
C to 85
C for the THS403xI.
Slew rate is measured from an output level range of 25% to 75%.
Full power bandwidth = slew rate/2
VO(Peak).
noise/distortion performance
PARAMETER
TEST CONDITIONS
THS403xC, THS403xI
UNIT
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
THS4031
RL = 150
81
THD
Total harmonic
THS4031
VCC =
5 V or
15 V, VO(pp) = 2 V,
RL = 1 k
96
dBc
THD
distortion
THS4032
CC
,
O(
)
,
f = 1 MHz, Gain = 2
RL = 150
72
dBc
THS4032
RL = 1 k
90
Vn
Input voltage noise
VCC =
5 V or
15 V,
f = 10 kHz
1.6
nV/
Hz
In
Input current noise
VCC =
5 V or
15 V,
f = 10 kHz
1.2
pA/
Hz
Differential gain error
VCC =
15 V
0.015%
Differential gain error
Gain = 2,
NTSC and PAL,
VCC =
5 V
0.02%
Differential phase error
,
40 IRE modulation,
,
100 IRE ramp
VCC =
15 V
0.025
Differential phase error
VCC =
5 V
0.03
Channel-to-channel crosstalk
(THS4032 only)
VCC =
5 V or
15 V,
f = 1 MHz
61
dBc
Full range = 0
C to 70
C for the THS403xC and 40
C to 85
C for the THS403xI.
THS4031, THS4032
100-MHz LOW-NOISE HIGH-SPEED AMPLIFIERS
SLOS224C JULY 1999 REVISED APRIL 2000
5
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
electrical characteristics at T
A
= 25
C, V
CC
=
15 V, R
L
= 150
(unless otherwise noted) (continued)
dc performance
PARAMETER
TEST CONDITIONS
THS403xC, THS403xI
UNIT
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VCC =
15 V RL = 1 k
VO =
10 V
TA = 25
C
45
75
Open loop gain
VCC =
15 V, RL = 1 k
VO =
10 V
TA = full range
40
V/mV
Open loop gain
VCC =
5 V RL = 1 k
VO =
2 5 V
TA = 25
C
35
55
V/mV
VCC =
5 V, RL = 1 k
VO =
2.5 V
TA = full range
30
VOS
Input offset voltage
VCC =
5 V or
15 V
TA = 25
C
0.5
2
mV
VOS
Input offset voltage
VCC =
5 V or
15 V
TA = full range
3
mV
IIB
Input bias current
VCC =
5 V or
15 V
TA = 25
C
3
6
A
IIB
Input bias current
VCC =
5 V or
15 V
TA = full range
8
A
IOS
Input offset current
VCC =
5 V or
15 V
TA = 25
C
30
250
nA
IOS
Input offset current
VCC =
5 V or
15 V
TA = full range
400
nA
Offset voltage drift
VCC =
5 V or
15 V
TA = full range
10
V/
C
Input offset current drift
VCC =
5 V or
15 V
TA = full range
0.2
nA/
C
Full range = 0
C to 70
C for the THS403xC and 40
C to 85
C for the THS403xI.
input characteristics
PARAMETER
TEST CONDITIONS
THS403xC, THS403xI
UNIT
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VICR
Common mode input voltage range
VCC =
15 V
13.5
14.3
V
VICR
Common-mode input voltage range
VCC =
5 V
3.8
4.3
V
VCC =
15 V
VICR =
12 V
TA = 25
C
85
95
CMRR
Common mode rejection ratio
VCC =
15 V,
VICR =
12 V
TA = full range
80
dB
CMRR
Common mode rejection ratio
VCC =
5 V
VICR =
2 5 V
TA = 25
C
90
100
dB
VCC =
5 V,
VICR =
2.5 V
TA = full range
85
ri
Input resistance
2
M
Ci
Input capacitance
1.5
pF
Full range = 0
C to 70
C for the THS403xC and 40
C to 85
C for the THS403xI.
output characteristics
PARAMETER
TEST CONDITIONS
THS403xC, THS403xI
UNIT
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VCC =
15 V
RL = 1 k
13
13.6
VO
Output voltage swing
VCC =
5 V
RL = 1 k
3.4
3.8
V
VO
Output voltage swing
VCC =
15 V
RL = 250
12
12.9
V
VCC =
5 V
RL = 150
3
3.5
IO
Output current
VCC =
15 V
RL = 20
60
90
mA
IO
Output current
VCC =
5 V
RL = 20
50
70
mA
ISC
Short-circuit current
VCC =
15 V
150
mA
RO
Output resistance
Open loop
13
Full range = 0
C to 70
C for the THS403xC and 40
C to 85
C for the THS403xI.
Observe power dissipation ratings to keep the junction temperature below the absolute maximum rating when the output is heavily loaded or
shorted. See the absolute maximum ratings section of this data sheet for more information.
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