1
Data sheet acquired from Harris Semiconductor
SCHS166A
Features
Overriding RESET Terminates Output Pulse
Triggering from the Leading or Trailing Edge
Q and Q Buffered Outputs
Separate Resets
Wide Range of Output-Pulse Widths
Schmitt Trigger on B Inputs
Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
Wide Operating Temperature Range . . . -55
o
C to 125
o
C
Balanced Propagation Delay and Transition Times
Significant Power Reduction Compared to LSTTL
Logic ICs
HC Types
- 2V to 6V Operation
- High Noise Immunity: N
IL
= 30%, N
IH
= 30% of V
CC
at V
CC
= 5V
HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
V
IL
= 0.8V (Max), V
IH
= 2V (Min)
- CMOS Input Compatibility, I
l
1
A at V
OL
, V
OH
Description
The CD74HC221, and CH74HCT221 are dual monostable
multivibrators with reset. An external resistor (R
X
) and an
external capacitor (C
X
) control the timing and the accuracy
for the circuit. Adjustment of R
X
and C
X
provides a wide
range of output pulse widths from the Q and Q terminals.
Pulse triggering on the B input occurs at a particular voltage
level and is not related to the rise and fall time of the trigger
pulse.
Once triggered, the outputs are independent of further trigger
inputs on A and B. The output pulse can be terminated by a
LOW level on the Reset (R) pin. Trailing Edge triggering (A)
and leading-edge-triggering (B) inputs are provided for
triggering from either edge of the input pulse. On power up,
the IC is reset. If either Mono is not used each input (on the
unused device) must be terminated either high or low.
The minimum value of external resistance, R
X
, is typically 500
.
The minimum value of external capacitance, C
X
, is 0pF. The
calculation for the pulse width is t
W
= 0.7 R
X
C
X
at V
CC
= 4.5V.
Pinout
CD74HC221, CD74HCT221
(PDIP, SOIC)
TOP VIEW
Ordering Information
PART NUMBER
TEMP. RANGE (
o
C)
PACKAGE
PKG.
NO.
CD74HC221E
-55 to 125
16 Ld PDIP
E16.3
CD74HCT221E
-55 to 125
16 Ld PDIP
E16.3
CD74HC221M
-55 to 125
16 Ld SOIC
M16.15
CD74HCT221M
-55 to 125
16 Ld SOIC
M16.15
NOTES:
1. When ordering, use the entire part number. Add the suffix 96 to
obtain the variant in the tape and reel.
2. Wafer or die are available which meets all electrical
specifications. Please contact your local sales office or Harris
customer service for ordering information.
14
15
16
9
13
12
11
10
1
2
3
4
5
7
6
8
1A
1B
1R
1Q
2Q
2C
X
GND
2C
X
R
X
V
CC
1C
X
1Q
2Q
2R
2B
2A
1C
X
R
X
November 1997 - Revised April 1999
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright
Harris Corporation 1997
CD74HC221,
CD74HCT221
High Speed CMOS Logic
Dual Monostable Multivibrator with Reset
File Number
1670.1
[ /Title
(CD74
HC221
,
CD74
HCT22
1)
/Sub-
ject
(High
Speed
CMOS
Logic
Dual
Monos
table
Multi-
2
Functional Diagram
TRUTH TABLE
INPUTS
OUTPUTS
A
B
R
Q
Q
H
X
H
L
H
X
L
H
L
H
L
H
H
H
X
X
L
L
H
L
H
(Note 3)
(Note 3)
NOTE:
H = High Voltage Level, L = Low Voltage Level, X = Irrelevant,
= Transition from Low
to High Level,
= Transition from High to Low Level,
= One High Level Pulse,
= One Low Level Pulse
3. For this combination the reset input must be low and the following sequence must
be used: pin 1 (or 9) must be set high or pin 2 (or 10) set low; then pin 1 (or 9)
must be low and pin 2 (or 10) set high. Now the reset input goes from low-to-high
and the device will be triggered.
2R
11
2A
9
10
5
12
2Q
2Q
2B
MONO 2
V
CC
6
7
2C
X
2C
X
R
X
1R
3
1A
2
1
13
4
1Q
1Q
1B
MONO 1
V
CC
14
15
1C
X
1C
X
R
X
1C
X
1R
X
2C
X
2R
X
CD74HC221, CD74HCT221
3
Logic Diagram
1 (9)
A
2 (10)
B
S
QM
QM
R
S
MASK
FF
MAIN
FF
Q
Q
R
3 (11)
4 (12)
(13) 5
Q
Q
C
P
Q
R
Q
D
C
C
V
CC
R
D
C
Q
C
RESET
FF
V
CC
P P
R1
PULLDOWN
FF
N
-
+
MIRROR VOLTAGE
V
CC
+
-
P
OP
AMP
R3
P
R2
R4
N
GND
8
15 (7)
R
X
C
X
V
CC
16
C
X
C
X
14 (6)
OP AMP
R
R
X
N
CD74HC221, CD74HCT221
4
Absolute Maximum Ratings
Thermal Information
DC Supply Voltage, V
CC
. . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 7V
DC Input Diode Current, I
IK
For V
I
< -0.5V or V
I
> V
CC
+ 0.5V
. . . . . . . . . . . . . . . . . . . . . .
20mA
DC Output Diode Current, I
OK
For V
O
< -0.5V or V
O
> V
CC
+ 0.5V
. . . . . . . . . . . . . . . . . . . .
20mA
DC Drain Current, per Output, I
O
For -0.5V < V
O
< V
CC
+ 0.5V
. . . . . . . . . . . . . . . . . . . . . . . . . .
25mA
DC Output Source or Sink Current per Output Pin, I
O
For V
O
> -0.5V or V
O
< V
CC
+ 0.5V
. . . . . . . . . . . . . . . . . . . .
25mA
DC V
CC
or Ground Current, I
CC
. . . . . . . . . . . . . . . . . . . . . . . . .
50mA
Operating Conditions
Temperature Range, T
A
. . . . . . . . . . . . . . . . . . . . . . -55
o
C to 125
o
C
Supply Voltage Range, V
CC
HC Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2V to 6V
HCT Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.5V to 5.5V
DC Input or Output Voltage, V
I
, V
O
. . . . . . . . . . . . . . . . . 0V to V
CC
Input Rise and Fall Time, t
r
, t
f
on Inputs A and R
2V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1000ns (Max)
4.5V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500ns (Max)
6V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 400ns (Max)
Input Rise and Fall Time, t
r
, t
f
on Input B
2V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Unlimited ns (Max)
4.5V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Unlimited ns (Max)
6V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Unlimited ns (Max)
Thermal Resistance (Typical, Note 4)
JA
(
o
C/W)
JC
(
o
C/W)
PDIP Package . . . . . . . . . . . . . . . . . . .
100
N/A
SOIC Package . . . . . . . . . . . . . . . . . . .
180
N/A
Maximum Junction Temperature (Plastic Package) . . . . . . . . 150
o
C
Maximum Storage Temperature Range . . . . . . . . . .-65
o
C to 150
o
C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300
o
C
(SOIC - Lead Tips Only)
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
4.
JA
is measured with the component mounted on an evaluation PC board in free air.
DC Electrical Specifications
PARAMETER
SYMBOL
TEST
CONDITIONS
V
CC
(V)
25
o
C
-40
o
C TO 85
o
C -55
o
C TO 125
o
C
UNITS
V
I
(V)
I
O
(mA)
MIN
TYP
MAX
MIN
MAX
MIN
MAX
HC TYPES
High Level Input
Voltage
V
IH
-
-
2
1.5
-
-
1.5
-
1.5
-
V
4.5
3.15
-
-
3.15
-
3.15
-
V
6
4.2
-
-
4.2
-
4.2
-
V
Low Level Input
Voltage
V
IL
-
-
2
-
-
0.5
-
0.5
-
0.5
V
4.5
-
-
1.35
-
1.35
-
1.35
V
6
-
-
1.8
-
1.8
-
1.8
V
High Level Output
Voltage
CMOS Loads
V
OH
V
IH
or V
IL
-0.02
2
1.9
-
-
1.9
-
1.9
-
V
-0.02
4.5
4.4
-
-
4.4
-
4.4
-
V
-0.02
6
5.9
-
-
5.9
-
5.9
-
V
High Level Output
Voltage
TTL Loads
-
-
-
-
-
-
-
-
-
V
-4
4.5
3.98
-
-
3.84
-
3.7
-
V
-5.2
6
5.48
-
-
5.34
-
5.2
-
V
Low Level Output
Voltage
CMOS Loads
V
OL
V
IH
or V
IL
0.02
2
-
-
0.1
-
0.1
-
0.1
V
0.02
4.5
-
-
0.1
-
0.1
-
0.1
V
0.02
6
-
-
0.1
-
0.1
-
0.1
V
Low Level Output
Voltage
TTL Loads
-
-
-
-
-
-
-
-
-
V
4
4.5
-
-
0.26
-
0.33
-
0.4
V
5.2
6
-
-
0.26
-
0.33
-
0.4
V
CD74HC221, CD74HCT221
5
Input Leakage
Current
I
I
V
CC
or
GND
-
6
-
-
0.1
-
1
-
1
A
Quiescent Device
Current
I
CC
V
CC
or
GND
0
6
-
-
8
-
80
-
160
A
HCT TYPES
High Level Input
Voltage
V
IH
-
-
4.5 to
5.5
2
-
-
2
-
2
-
V
Low Level Input
Voltage
V
IL
-
-
4.5 to
5.5
-
-
0.8
-
0.8
-
0.8
V
High Level Output
Voltage
CMOS Loads
V
OH
V
IH
or V
IL
-0.02
4.5
4.4
-
-
4.4
-
4.4
-
V
High Level Output
Voltage
TTL Loads
-4
4.5
3.98
-
-
3.84
-
3.7
-
V
Low Level Output
Voltage
CMOS Loads
V
OL
V
IH
or V
IL
0.02
4.5
-
-
0.1
-
0.1
-
0.1
V
Low Level Output
Voltage
TTL Loads
4
4.5
-
-
0.26
-
0.33
-
0.4
V
Input Leakage
Current
I
I
V
CC
and
GND
0
5.5
-
0.1
-
1
-
1
A
Quiescent Device
Current
I
CC
V
CC
or
GND
0
5.5
-
-
8
-
80
-
160
A
Additional Quiescent
Device Current Per
Input Pin: 1 Unit Load
I
CC
V
CC
-2.1
-
4.5 to
5.5
-
100
360
-
450
-
490
A
NOTE: For dual-supply systems theoretical worst case (V
I
= 2.4V, V
CC
= 5.5V) specification is 1.8mA.
DC Electrical Specifications
(Continued)
PARAMETER
SYMBOL
TEST
CONDITIONS
V
CC
(V)
25
o
C
-40
o
C TO 85
o
C -55
o
C TO 125
o
C
UNITS
V
I
(V)
I
O
(mA)
MIN
TYP
MAX
MIN
MAX
MIN
MAX
HCT Input Loading Table
INPUT
UNIT LOADS
All Inputs
0.3
NOTE: Unit Load is
I
CC
limit specified in DC Electrical Table, e.g.,
360
A max at 25
o
C.
Prerequisite For Switching Function
PARAMETER
SYMBOL
V
CC
(V)
25
o
C
-40
o
C TO 85
o
C
-55
o
C TO 125
o
C
UNITS
MIN
TYP
MAX
MIN
MAX
MIN
MAX
HC TYPES
Input Pulse Width
A
t
WL
2
70
-
-
90
-
105
-
ns
4.5
14
-
-
18
-
21
-
ns
6
12
-
-
15
-
18
-
ns
Input Pulse Width
B
t
WH
2
70
-
-
90
-
105
-
ns
4.5
14
-
-
18
-
21
-
ns
6
12
-
-
15
-
18
-
ns
CD74HC221, CD74HCT221
6
Input Pulse Width
Reset
t
WL
2
70
-
-
90
-
105
-
ns
4.5
14
-
-
18
-
21
-
ns
6
12
-
-
15
-
18
-
ns
Recovery Time
R to A or B
t
SU
2
0
-
-
0
-
0
-
ns
4.5
0
-
-
0
-
0
-
ns
6
0
-
-
0
-
0
-
ns
Output Pulse Width Q or Q
C
X
= 0.1
F R
X
= 10k
t
W
5
630
-
770
602
798
595
805
s
Output Pulse Width Q or Q
C
X
= 28pF, R
X
= 2k
t
W
4.5
-
140
-
-
-
-
-
ns
C
X
= 1000pF, R
X
= 2k
t
W
4.5
-
1.5
-
-
-
-
-
s
C
X
= 1000pF, R
X
= 10k
t
W
4.5
-
7
-
-
-
-
-
s
HCT TYPES
Input Pulse Width
A
t
WL
4.5
14
-
-
18
-
21
-
ns
Input Pulse Width
B
t
WH
4.5
14
-
-
18
-
21
-
ns
Input Pulse Width
Reset
t
WL
4.5
18
-
-
23
-
27
-
ns
Recovery Time
R to A or B
t
SU
4.5
0
-
-
0
-
0
-
ns
Output Pulse Width Q or Q
C
X
= 0.1
F R
X
= 10k
t
W
5
630
-
770
602
798
595
805
s
Output Pulse Width Q or Q
C
X
= 28pF, R
X
= 2k
t
W
4.5
-
140
-
-
-
-
-
ns
C
X
= 1000pF, R
X
= 2k
t
W
4.5
-
1.5
-
-
-
-
-
s
C
X
= 1000pF, R
X
= 10k
t
W
4.5
-
7
-
-
-
-
-
s
Switching Specifications
Input t
r
, t
f
= 6ns
PARAMETER
SYMBOL
TEST
CONDITIONS
V
CC
(V)
25
o
C
-40
o
C TO
85
o
C
-55
o
C TO
125
o
C
UNITS
MIN
TYP
MAX
MIN
MAX
MIN
MAX
HC TYPES
Propagation Delay,
Trigger A, B, R to Q
t
PLH
C
L
= 50pF
2
-
-
210
-
265
-
315
ns
C
L
= 50pF
4.5
-
-
42
-
53
-
63
ns
C
L
= 50pF
6
-
-
36
-
45
-
54
ns
C
L
= 15pF
5
-
18
-
-
-
-
-
ns
Propagation Delay,
Trigger A, B, R to Q
t
PHL
C
L
= 50pF
2
-
-
170
-
215
-
255
ns
C
L
= 50pF
4.5
-
-
34
-
43
-
51
ns
C
L
= 50pF
6
-
-
29
-
37
-
43
ns
C
L
= 15pF
5
-
14
-
-
-
-
-
ns
Prerequisite For Switching Function
(Continued)
PARAMETER
SYMBOL
V
CC
(V)
25
o
C
-40
o
C TO 85
o
C
-55
o
C TO 125
o
C
UNITS
MIN
TYP
MAX
MIN
MAX
MIN
MAX
CD74HC221, CD74HCT221
7
Propagation Delay,
R to Q
t
PLH
C
L
= 50pF
2
-
-
160
-
200
-
240
ns
4.5
-
-
32
-
40
-
48
ns
6
-
-
27
-
34
-
41
ns
Propagation Delay,
R to Q
t
PHL
C
L
= 50pF
2
-
-
180
-
225
-
270
ns
4.5
-
-
36
-
45
-
54
ns
6
-
-
31
-
38
-
46
ns
Output Transition Time
t
TLH
, t
THL
C
L
= 50pF
2
-
-
75
-
95
-
110
ns
4.5
-
-
15
-
19
-
22
ns
6
-
-
13
-
16
-
19
ns
Input Capacitance
C
IN
-
-
-
-
10
-
10
-
10
pF
Pulse Width Match Between
Circuits in the Same Package
C
X
= 1000pF, R
X
= 10k
-
4.5 to
5.5
-
2
-
-
-
-
-
%
Power Dissipation Capacitance
(Notes 5, 6)
CPD
-
5
-
166
-
-
-
-
-
pF
HCT TYPES
Propagation Delay,
Trigger A, B, R to Q
t
PLH
C
L
= 50pF
4.5
-
-
42
-
-
-
63
ns
C
L
= 15pF
5
-
18
-
-
-
-
-
ns
Propagation Delay,
Trigger A, B, R to Q
t
PHL
C
L
= 50pF
4.5
-
-
34
-
43
-
51
ns
C
L
= 15pF
5
-
14
-
-
-
-
-
ns
Propagation Delay,
R to Q
t
PLH
C
L
= 50pF
4.5
-
-
38
-
-
-
57
ns
Propagation Delay,
R to Q
t
PHL
C
L
= 50pF
4.5
-
-
37
-
-
-
56
ns
Output Transition Time
t
TLH
, t
THL
C
L
= 50pF
2
-
-
75
-
95
-
110
ns
4.5
-
-
15
-
19
-
22
ns
6
-
-
13
-
16
-
19
ns
Input Capacitance
C
IN
-
-
-
-
10
-
10
-
10
pF
Pulse Width Match Between
Circuits in the Same Package
C
X
= 1000pF, R
X
= 10k
-
4.5 to
5.5
-
2
-
-
-
-
-
%
Power Dissipation Capacitance
(Notes 5, 6)
CPD
-
5
-
166
-
-
-
-
-
pF
NOTES:
5. C
PD
is used to determine the dynamic power consumption, per multivibrator.
6. P
D
= (C
PD
+ C
L
) V
CC
2
f
i
+
where f
i
= input frequency, f
o
= output frequency, C
L
= output load capacitance, V
CC
= supply voltage.
Switching Specifications
Input t
r
, t
f
= 6ns (Continued)
PARAMETER
SYMBOL
TEST
CONDITIONS
V
CC
(V)
25
o
C
-40
o
C TO
85
o
C
-55
o
C TO
125
o
C
UNITS
MIN
TYP
MAX
MIN
MAX
MIN
MAX
CD74HC221, CD74HCT221
8
Test Circuits and Waveforms
NOTE: Outputs should be switching from 10% V
CC
to 90% V
CC
in
accordance with device truth table. For f
MAX
, input duty cycle = 50%.
FIGURE 1. HC CLOCK PULSE RISE AND FALL TIMES AND
PULSE WIDTH
NOTE: Outputs should be switching from 10% V
CC
to 90% V
CC
in
accordance with device truth table. For f
MAX
, input duty cycle = 50%.
FIGURE 2. HCT CLOCK PULSE RISE AND FALL TIMES AND
PULSE WIDTH
FIGURE 3. HC TRANSITION TIMES AND PROPAGATION
DELAY TIMES, COMBINATION LOGIC
FIGURE 4. HCT TRANSITION TIMES AND PROPAGATION
DELAY TIMES, COMBINATION LOGIC
CLOCK
90%
50%
10%
GND
V
CC
t
r
C
L
t
f
C
L
50%
50%
t
WL
t
WH
10%
t
WL
+ t
WH
=
fC
L
I
CLOCK
2.7V
1.3V
0.3V
GND
3V
t
r
C
L
= 6ns
t
f
C
L
= 6ns
1.3V
1.3V
t
WL
t
WH
0.3V
t
WL
+ t
WH
=
fC
L
I
t
PHL
t
PLH
t
THL
t
TLH
90%
50%
10%
50%
10%
INVERTING
OUTPUT
INPUT
GND
V
CC
t
r
= 6ns
t
f
= 6ns
90%
t
PHL
t
PLH
t
THL
t
TLH
2.7V
1.3V
0.3V
1.3V
10%
INVERTING
OUTPUT
INPUT
GND
3V
t
r
= 6ns
t
f
= 6ns
90%
CD74HC221, CD74HCT221
9
Typical Performance Curves
FIGURE 5. HC/HCT221 OUTPUT PULSE WIDTH vs
TEMPERATURE
FIGURE 6. HC/HCT221 K FACTOR vs SUPPLY VOLTAGE
FIGURE 7. HC221 OUTPUT PULSE WIDTH vs C
X
FIGURE 8. HC/HCT221 OUTPUT PULSE WIDTH vs C
X
685
680
675
670
665
t
W
, PULSE WIDTH (
s)
-75
-50
-25
0
25
50
75
100
125
150
175
T
A
, AMBIENT TEMPERATURE (
o
C)
C
X
= 1
F
R
X
= 10K
V
CC
= 5V
0.9
0.8
0.7
0.6
0
2
4
6
8
10
V
CC
, SUPPLY VOLTAGE (V)
K F
A
CT
OR
R
X
= 10K
T
A
= 25
o
C
HCT
10
6
10
5
10
4
10
3
10
2
10
1
0.1
10
10
2
10
3
10
4
10
5
10
6
10
7
10
8
t
W
, PULSE WIDTH (
s)
C
X
, TIMING CAPACITANCE (pF)
R
X
= 100K
R
X
= 50K
R
X
= 10K
R
X
= 2K
V
CC
= 2V
10
6
10
5
10
4
10
3
10
2
10
1
0.1
10
10
2
10
3
10
4
10
5
10
6
10
7
10
8
t
W
, PULSE WIDTH (
s)
C
X
, TIMING CAPACITANCE (pF)
V
CC
= 4.5V
R
X
= 100K
R
X
= 50K
R
X
= 10K
R
X
= 2K
CD74HC221, CD74HCT221
10
FIGURE 9. HC221 OUTPUT PULSE WIDTH vs C
X
Typical Performance Curves
(Continued)
FIGURE 5. HC/HCT221 OUTPUT PULSE WIDTH vs
TEMPERATURE
FIGURE 6. HC/HCT221 K FACTOR vs SUPPLY VOLTAGE
685
680
675
670
665
t
W
, PULSE WIDTH (
s)
-75
-50
-25
0
25
50
75
100
125
150
175
T
A
, AMBIENT TEMPERATURE (
o
C)
C
X
= 1
F
R
X
= 10K
V
CC
= 5V
0.9
0.8
0.7
0.6
0
2
4
6
8
10
V
CC
, SUPPLY VOLTAGE (V)
K F
A
CT
OR
R
X
= 10K
T
A
= 25
o
C
HCT
10
6
10
5
10
4
10
3
10
2
10
1
0.1
10
10
2
10
3
10
4
10
5
10
6
10
7
10
8
t
W
, PULSE WIDTH (
s)
C
X
, TIMING CAPACITANCE (pF)
R
X
= 100K
R
X
= 50K
R
X
= 10K
R
X
= 2K
V
CC
= 6V
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