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74AC11643
OCTAL BUS TRANSCEIVER
WITH 3STATE OUTPUTS
SCAS057A JULY 1987 REVISED APRIL 1993
Copyright
1993, Texas Instruments Incorporated
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Bidirectional Bus Transceivers in
High-Density 24-Pin Packages
Flow-Through Architecture Optimizes PCB
Layout
Center-Pin V
CC
and GND Configurations
Minimize High-Speed Switching Noise
EPIC
TM
(Enhanced-Performance Implanted
CMOS) 1-
m Process
500-mA Typical Latch-Up Immunity at
125
C
Package Options Include Plastic
Small-Outline Packages and Standard
Plastic 300-mil DIPs
description
These octal bus transceivers are designed for asynchronous communication between data buses. These
devices transmit data from the A bus to the B bus or from the B bus to the A bus depending upon the level at
the direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so that the
buses are effectively isolated.
The 74AC11643 is characterized for operation from 40
C to 85
C.
FUNCTION TABLE
INPUTS
OPERATION
OE
DIR
OPERATION
L
L
B data to A bus
L
H
A data to B bus
H
X
Isolation
logic symbol
logic diagram (positive logic)
1
2
A1
B1
3 EN1 [BA]
24
DIR
3 EN2 [AB]
1
A1
2
A2
B1
23
3
A3
4
A4
9
A5
10
A6
11
A7
12
A8
B2
22
B3
21
B5
17
B4
20
B6
16
B8
14
B7
15
OE
1
13
24
23
1
G3
13
OE
DIR
1
To 7 Other Channels
This symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
DW OR NT PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
A1
A2
A3
A4
GND
GND
GND
GND
A5
A6
A7
A8
DIR
B1
B2
B3
B4
V
CC
V
CC
B5
B6
B7
B8
OE
EPIC is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
74AC11643
OCTAL BUS TRANSCEIVER
WITH 3STATE OUTPUTS
SCAS057A JULY 1987 REVISED APRIL 1993
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
CC
0.5 V to 7 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, V
I
(see Note 1)
0.5 V to V
CC
+ 0.5 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output voltage range, V
O
(see Note 1)
0.5 V to V
CC
+ 0.5 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, I
IK
(V
I
< 0 or V
I
> V
CC
)
20 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, I
OK
(V
O
< 0 or V
O
> V
CC
)
50 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous output current, I
O
(V
O
= 0 to V
CC
)
50 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous current through V
CC
or GND pins
200 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range
65
C to 150
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
recommended operating conditions
MIN
NOM
MAX
UNIT
VCC
Supply voltage
3
5
5.5
V
VCC = 3 V
2.1
VIH
High-level input voltage
VCC = 4.5 V
3.15
V
VCC = 5.5 V
3.85
VCC = 3 V
0.9
VIL
Low-level input voltage
VCC = 4.5 V
1.35
V
VCC = 5.5 V
1.65
VI
Input voltage
0
VCC
V
VO
Output voltage
0
VCC
V
VCC = 3 V
4
IOH
High-level output current
VCC = 4.5 V
24
mA
VCC = 5.5 V
24
VCC = 3 V
12
IOL
Low-level output current
VCC = 4.5 V
24
mA
VCC = 5.5 V
24
t/
v
Input transition rise or fall rate
0
10
ns/V
TA
Operating free-air temperature
40
85
C
74AC11643
OCTAL BUS TRANSCEIVER
WITH 3STATE OUTPUTS
SCAS057A JULY 1987 REVISED APRIL 1993
3
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
TA = 25
C
MIN
MAX
UNIT
PARAMETER
TEST CONDITIONS
VCC
MIN
TYP
MAX
MIN
MAX
UNIT
3 V
2.9
2.9
IOH = 50
A
4.5 V
4.4
4.4
5.5 V
5.4
5.4
VOH
IOH = 4 mA
3 V
2.58
2.48
V
I
24
A
4.5 V
3.94
3.8
IOH = 24 mA
5.5 V
4.94
4.8
IOH = 75 mA
5.5 V
3.85
3 V
0.1
0.1
IOL = 50
A
4.5 V
0.1
0.1
5.5 V
0.1
0.1
VOL
IOL = 12 mA
3 V
0.36
0.44
V
IOL = 24 mA
4.5 V
0.36
0.44
IOL = 24 mA
5.5 V
0.36
0.44
IOL = 75 mA
5.5 V
1.65
II
OE or DIR
VI = VCC or GND
5.5 V
0.1
1
A
IOZ
A or B ports
VO = VCC or GND
5.5 V
0.5
5
A
ICC
VI = VCC or GND,
IO = 0
5.5 V
8
80
A
Ci
OE or DIR
VI = VCC or GND
5 V
4
pF
Cio
A or B ports
VO = VCC or GND
5 V
12
pF
Not more than one output should be tested at a time, and the duration of the test should not exceed 10 ms.
For I/O ports, the parameter IOZ includes the input leakage current.
switching characteristics over recommended operating free-air temperature range,
V
CC
= 3.3 V
0.3 V (unless otherwise noted) (see Figure 1)
PARAMETER
FROM
TO
TA = 25
C
MIN
MAX
UNIT
PARAMETER
(INPUT)
(OUTPUT)
MIN
TYP
MAX
MIN
MAX
UNIT
tPLH
A or B
B or A
1.5
7.4
10.1
1.5
11.3
ns
tPHL
A or B
B or A
1.5
6.6
8.7
1.5
10
ns
tPZH
OE
A or B
1.5
9.4
11.8
1.5
13.3
ns
tPZL
OE
A or B
1.5
8.9
11.4
1.5
13
ns
tPHZ
OE
A or B
1.5
8.3
10.1
1.5
10.9
ns
tPLZ
OE
A or B
1.5
8.9
10.9
1.5
12
ns
74AC11643
OCTAL BUS TRANSCEIVER
WITH 3STATE OUTPUTS
SCAS057A JULY 1987 REVISED APRIL 1993
4
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
switching characteristics over recommended operating free-air temperature range,
V
CC
= 5 V
0.5 V (unless otherwise noted) (see Figure 1)
PARAMETER
FROM
TO
TA = 25
C
MIN
MAX
UNIT
PARAMETER
(INPUT)
(OUTPUT)
MIN
TYP
MAX
MIN
MAX
UNIT
tPLH
A or B
B or A
1.5
5.4
7.7
1.5
8.6
ns
tPHL
A or B
B or A
1.5
5
6.8
1.5
7.9
ns
tPZH
OE
A or B
1.5
7
9.2
1.5
10.4
ns
tPZL
OE
A or B
1.5
6.6
8.7
1.5
10
ns
tPHZ
OE
A or B
1.5
7.1
8.8
1.5
9.4
ns
tPLZ
OE
A or B
1.5
7.2
9
1.5
9.8
ns
operating characteristics, V
CC
= 5 V, T
A
= 25
C
PARAMETER
TEST CONDITIONS
TYP
UNIT
C d
Power dissipation capacitance per transceiver
Outputs enabled
CL = 50 pF
f = 1 MHz
46
pF
Cpd
Power dissipation capacitance per transceiver
Outputs disabled
CL = 50 pF,
f = 1 MHz
9
pF
PARAMETER MEASUREMENT INFORMATION
From Output
Under Test
CL = 50 pF
LOAD CIRCUIT FOR OUTPUTS
S1
2
VCC
Open
GND
500
500
TEST
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
S1
Open
2
VCC
GND
Output
Control
(low-level
enabling)
Output
Waveform 1
S1 at 2
VCC
(see Note C)
Output
Waveform 2
S1 at GND
(see Note C)
VOL
VOH
tPZL
tPZH
tPLZ
tPHZ
50%
50%

VCC
0 V
50% VCC
0 V
VCC
(see Note A)
50% VCC
20% VCC
80% VCC
tPLH
tPHL
50%
50%
0 V
50% VCC
50% VCC
VOH
VOL
Input
(see Note B)
Output
(see Note D)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
VCC
NOTES: A. CL includes probe and jig capacitance.
B. All input pulses are supplied by generators having the following characteristics: PRR
10 MHz, Zo = 50
, tr
3 ns, tf
3 ns.
For testing pulse duration: tr = tf = 1 to 3 ns. Pulse polarity can be either high-to-low-to-high or low-to-high-to-low.
C. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
D. The outputs are measured one at a time with one transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
IMPORTANT NOTICE
Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue
any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI's standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE ("CRITICAL
APPLICATIONS"). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER
CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO
BE FULLY AT THE CUSTOMER'S RISK.
In order to minimize risks associated with the customer's applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used. TI's publication of information regarding any third
party's products or services does not constitute TI's approval, warranty or endorsement thereof.
Copyright
1998, Texas Instruments Incorporated