SN74AUCH16244
16-BIT BUFFER/DRIVER
WITH 3-STATE OUTPUTS
SCES391E MARCH 2002 REVISED DECEMBER 2002
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
D
Member of the Texas Instruments
Widebus
Family
D
Optimized for 1.8-V Operation and is 3.6-V
I/O Tolerant to Support Mixed-Mode Signal
Operation
D
I
off
Supports Partial-Power-Down Mode
Operation
D
Sub 1-V Operable
D
Max t
pd
of 1.8 ns at 1.8 V
D
Low Power Consumption, 20-
A Max I
CC
D
8-mA Output Drive at 1.8 V
D
Bus Hold on Data Inputs Eliminates the
Need for External Pullup/Pulldown
Resistors
D
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
D
ESD Protection Exceeds JESD 22
2000-V Human-Body Model (A114-A)
200-V Machine Model (A115-A)
1000-V Charged-Device Model (C101)
description/ordering information
This 16-bit buffer/driver is operational at 0.8-V to
2.7-V V
CC
, but is designed specifically for 1.65-V
to 1.95-V V
CC
operation.
The SN74AUCH16244 is designed specifically to
improve the performance and density of 3-state
memory address drivers, clock drivers, and
bus-oriented receivers and transmitters.
The device can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. It provides true outputs and
symmetrical active-low output-enable (OE) inputs.
To ensure the high-impedance state during power up or power down, OE should be tied to V
CC
through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
ORDERING INFORMATION
TA
PACKAGE
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
TSSOP DGG
Tape and reel
SN74AUCH16244DGGR
AUCH16244
40
C to 85
C
TVSOP DGV
Tape and reel
SN74AUCH16244DGVR
MJ244
VFBGA GQL
Tape and reel
SN74AUCH16244GQLR
MJ244
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design
guidelines are available at www.ti.com/sc/package.
Copyright
2002, Texas Instruments Incorporated
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Widebus is a trademark of Texas Instruments.
DGG OR DGV PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
1OE
1Y1
1Y2
GND
1Y3
1Y4
V
CC
2Y1
2Y2
GND
2Y3
2Y4
3Y1
3Y2
GND
3Y3
3Y4
V
CC
4Y1
4Y2
GND
4Y3
4Y4
4OE
2OE
1A1
1A2
GND
1A3
1A4
V
CC
2A1
2A2
GND
2A3
2A4
3A1
3A2
GND
3A3
3A4
V
CC
4A1
4A2
GND
4A3
4A4
3OE
SN74AUCH16244
16-BIT BUFFER/DRIVER
WITH 3-STATE OUTPUTS
SCES391E MARCH 2002 REVISED DECEMBER 2002
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
description/ordering information (continued)
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors
with the bus-hold circuitry is not recommended.
This device is fully specified for partial-power-down applications using I
off
. The I
off
circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
terminal assignments
1
2
3
4
5
6
A
1OE
NC
NC
NC
NC
2OE
B
1Y2
1Y1
GND
GND
1A1
1A2
C
1Y4
1Y3
VCC
VCC
1A3
1A4
D
2Y2
2Y1
GND
GND
2A1
2A2
E
2Y4
2Y3
2A3
2A4
F
3Y1
3Y2
3A2
3A1
G
3Y3
3Y4
GND
GND
3A4
3A3
H
4Y1
4Y2
VCC
VCC
4A2
4A1
J
4Y3
4Y4
GND
GND
4A4
4A3
K
4OE
NC
NC
NC
NC
3OE
NC No internal connection
FUNCTION TABLE
(each 4-bit buffer)
INPUTS
OUTPUT
OE
A
Y
L
H
H
L
L
L
H
X
Z
GQL PACKAGE
(TOP VIEW)
J
H
G
F
E
D
C
B
A
2
1
3
4
6
5
K
SN74AUCH16244
16-BIT BUFFER/DRIVER
WITH 3-STATE OUTPUTS
SCES391E MARCH 2002 REVISED DECEMBER 2002
3
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
logic diagram (positive logic)
1OE
1A1
1A2
1A3
1A4
1Y1
1Y2
1Y3
1Y4
1
47
46
44
43
2
3
5
6
2OE
2A1
2A2
2A3
2A4
2Y1
2Y2
2Y3
2Y4
48
41
40
38
37
8
9
11
12
3OE
3A1
3A2
3A3
3A4
3Y1
3Y2
3Y3
3Y4
25
36
35
33
32
13
14
16
17
4OE
4A1
4A2
4A3
4A4
4Y1
4Y2
4Y3
4Y4
24
30
29
27
26
19
20
22
23
Pin numbers shown are for the DGG and DGV packages.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
CC
0.5 V to 3.6 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, V
I
(see Note 1)
0.5 V to 3.6 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage range applied to any output in the high-impedance or power-off state, V
O
(see Note 1)
0.5 V to 3.6 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output voltage range, V
O
(see Note 1)
0.5 V to V
CC
+ 0.5 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, I
IK
(V
I
< 0)
50 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, I
OK
(V
O
< 0)
50 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous output current, I
O
20 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous current through V
CC
or GND
100 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance,
JA
(see Note 2): DGG package
70
C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DGV package
58
C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
GQL package
42
C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
stg
65
C to 150
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES:
1. The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
SN74AUCH16244
16-BIT BUFFER/DRIVER
WITH 3-STATE OUTPUTS
SCES391E MARCH 2002 REVISED DECEMBER 2002
4
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
recommended operating conditions (see Note 3)
MIN
MAX
UNIT
VCC
Supply voltage
0.8
2.7
V
VCC = 0.8 V
VCC
VIH
High-level input voltage
VCC = 1.1 V to 1.95 V
0.65
VCC
V
VCC = 2.3 V to 2.7 V
1.7
VCC = 0.8 V
0
VIL
Low-level input voltage
VCC = 1.1 V to 1.95 V
0.35
VCC
V
VCC = 2.3 V to 2.7 V
0.7
VI
Input voltage
0
3.6
V
VO
Output voltage
0
VCC
V
VCC = 0.8 V
0.7
VCC = 1.1 V
3
IOH
High-level output current
VCC = 1.4 V
5
mA
VCC = 1.65 V
8
VCC = 2.3 V
9
VCC = 0.8 V
0.7
VCC = 1.1 V
3
IOL
Low-level output current
VCC = 1.4 V
5
mA
VCC = 1.65 V
8
VCC = 2.3 V
9
VCC = 0.8 V
20
t/
v
Input transition rise or fall rate
VCC = 1.3 V
15
ns/V
VCC = 1.6 V, 1.95 V, and 2.7 V
10
TA
Operating free-air temperature
40
85
C
NOTE 3: All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
SN74AUCH16244
16-BIT BUFFER/DRIVER
WITH 3-STATE OUTPUTS
SCES391E MARCH 2002 REVISED DECEMBER 2002
5
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
MIN
TYP
MAX
UNIT
IOH = 100
A
0.8 V to 2.7 V
VCC0.1
IOH = 0.7 mA
0.8 V
0.55
VOH
IOH = 3 mA
1.1 V
0.8
V
VOH
IOH = 5 mA
1.4 V
1
V
IOH = 8 mA
1.65 V
1.2
IOH = 9 mA
2.3 V
1.8
IOL = 100
A
0.8 V to 2.7 V
0.2
IOL = 0.7 mA
0.8 V
0.25
VOL
IOL = 3 mA
1.1 V
0.3
V
VOL
IOL = 5 mA
1.4 V
0.4
V
IOL = 8 mA
1.65 V
0.45
IOL = 9 mA
2.3 V
0.6
II
A or OE inputs
VI = VCC or GND
0 to 2.7 V
5
A
VI = 0.35 V
1.1 V
10
IBHL
VI = 0.47 V
1.4 V
15
A
IBHL
VI = 0.57 V
1.65 V
20
A
VI = 0.7 V
2.3 V
40
VI = 0.8 V
1.1 V
10
IBHH
VI = 0.9 V
1.4 V
15
A
IBHH
VI = 1.07 V
1.65 V
20
A
VI = 1.7 V
2.3 V
40
1.3 V
75
IBHLO
VI = 0 to VCC
1.6 V
125
A
IBHLO
VI = 0 to VCC
1.95 V
175
A
2.7 V
275
#
1.3 V
75
IBHHO#
VI = 0 to VCC
1.6 V
125
A
IBHHO#
VI = 0 to VCC
1.95 V
175
A
2.7 V
275
Ioff
VI or VO = 2.7 V
0
10
A
IOZ
VO = VCC or GND
2.7 V
10
A
ICC
VI = VCC or GND,
IO = 0
0.8 V to 2.7 V
20
A
Ci
VI = VCC or GND
2.5 V
3
4.5
pF
Co
VO = VCC or GND
2.5 V
4
7
pF
All typical values are at TA = 25
C.
The bus-hold circuit can sink at least the minimum low sustaining current at VIL max. IBHL should be measured after lowering VIN to GND and
then raising it to VIL max.
The bus-hold circuit can source at least the minimum high sustaining current at VIH min. IBHH should be measured after raising VIN to VCC and
then lowering it to VIH min.
An external driver must source at least IBHLO to switch this node from low to high.
# An external driver must sink at least IBHHO to switch this node from high to low.
SN74AUCH16244
16-BIT BUFFER/DRIVER
WITH 3-STATE OUTPUTS
SCES391E MARCH 2002 REVISED DECEMBER 2002
6
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
switching characteristics over recommended operating free-air temperature range (unless
otherwise noted) (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
VCC = 0.8 V
VCC = 1.2 V
0.1 V
VCC = 1.5 V
0.1 V
VCC = 1.8 V
0.15 V
VCC = 2.5 V
0.2 V
UNIT
(INPUT)
(OUTPUT)
TYP
MIN
MAX
MIN
MAX
MIN
TYP
MAX
MIN
MAX
tpd
A
Y
5.4
0.8
2.8
0.6
1.9
0.7
1.3
1.8
0.5
1.8
ns
ten
OE
Y
8
1
4.4
0.7
2.6
0.8
1.4
2.5
0.6
1.9
ns
tdis
OE
Y
12
1.9
4.9
1
4.6
1.5
2.6
4
0.5
2
ns
operating characteristics, T
A
= 25
C
PARAMETER
TEST
VCC = 0.8 V VCC = 1.2 V VCC = 1.5 V VCC = 1.8 V VCC = 2.5 V
UNIT
PARAMETER
CONDITIONS
TYP
TYP
TYP
TYP
TYP
UNIT
Cpd
Power
dissipation
Outputs
enabled
f = 10 MHz
21
22
23
25
30
pF
Cpd
dissipation
capacitance
Outputs
disabled
f = 10 MHz
1
1
1
1
1
pF
SN74AUCH16244
16-BIT BUFFER/DRIVER
WITH 3-STATE OUTPUTS
SCES391E MARCH 2002 REVISED DECEMBER 2002
7
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
VCC/2
th
tsu
From Output
Under Test
CL
(see Note A)
LOAD CIRCUIT
S1
2
VCC
Open
GND
RL
RL
Data Input
Timing Input
VCC
0 V
VCC
0 V
0 V
tw
Input
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS
PULSE DURATION
tPLH
tPHL
tPHL
tPLH
VOH
VOH
VOL
VOL
VCC
0 V
Input
Output
Waveform 1
S1 at 2
VCC
(see Note B)
Output
Waveform 2
S1 at GND
(see Note B)
VOL
VOH
tPZL
tPZH
tPLZ
tPHZ
VCC
0 V
VOL + V
VOH V
0 V
VCC
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
Output
Output
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open
2
VCC
GND
TEST
S1
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR
10 MHz, ZO = 50
, slew rate
1 V/ns.
D. The outputs are measured one at a time with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPLH and tPHL are the same as tpd.
H. All parameters and waveforms are not applicable to all devices.
Output
Control
VCC/2
VCC/2
VCC/2
VCC/2
VCC/2
VCC/2
VCC/2
VCC/2
VCC/2
VCC/2
VCC/2
VCC/2
VCC
VCC/2
VCC/2
0.8 V
1.2 V
0.1 V
1.5 V
0.1 V
1.8 V
0.15 V
2.5 V
0.2 V
2 k
2 k
2 k
1 k
500
VCC
RL
0.1 V
0.1 V
0.1 V
0.15 V
0.15 V
V
CL
15 pF
15 pF
15 pF
30 pF
30 pF
Figure 1. Load Circuit and Voltage Waveforms
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package
Type
Package
Drawing
Pins Package
Qty
Eco Plan
(2)
Lead/Ball Finish
MSL Peak Temp
(3)
74AUCH16244DGGRE4
ACTIVE
TSSOP
DGG
48
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
74AUCH16244DGVRE4
ACTIVE
TVSOP
DGV
48
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74AUCH16244DGGR
ACTIVE
TSSOP
DGG
48
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74AUCH16244DGVR
ACTIVE
TVSOP
DGV
48
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74AUCH16244GQLR
ACTIVE
VFBGA
GQL
56
1000
TBD
SNPB
Level-1-240C-UNLIM
SN74AUCH16244ZQLR
ACTIVE
VFBGA
ZQL
56
1000 Green (RoHS &
no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco
Plan
-
The
planned
eco-friendly
classification:
Pb-Free
(RoHS)
or
Green
(RoHS
&
no
Sb/Br)
-
please
check
http://www.ti.com/productcontent
for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
PACKAGE OPTION ADDENDUM
www.ti.com
4-Oct-2005
Addendum-Page 1
MECHANICAL DATA
MPDS006C FEBRUARY 1996 REVISED AUGUST 2000
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
DGV (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
24 PINS SHOWN
14
3,70
3,50
4,90
5,10
20
DIM
PINS **
4073251/E 08/00
1,20 MAX
Seating Plane
0,05
0,15
0,25
0,50
0,75
0,23
0,13
1
12
24
13
4,30
4,50
0,16 NOM
Gage Plane
A
7,90
7,70
38
24
16
4,90
5,10
3,70
3,50
A MAX
A MIN
6,60
6,20
11,20
11,40
56
9,60
9,80
48
0,08
M
0,07
0,40
0
8
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side.
D. Falls within JEDEC: 24/48 Pins MO-153
14/16/20/56 Pins MO-194
MECHANICAL DATA
MTSS003D JANUARY 1995 REVISED JANUARY 1998
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
DGG (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
4040078 / F 12/97
48 PINS SHOWN
0,25
0,15 NOM
Gage Plane
6,00
6,20
8,30
7,90
0,75
0,50
Seating Plane
25
0,27
0,17
24
A
48
1
1,20 MAX
M
0,08
0,10
0,50
0
8
56
14,10
13,90
48
DIM
A MAX
A MIN
PINS **
12,40
12,60
64
17,10
16,90
0,15
0,05
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications,
enhancements, improvements, and other changes to its products and services at any time and to discontinue
any product or service without notice. Customers should obtain the latest relevant information before placing
orders and should verify that such information is current and complete. All products are sold subject to TI's terms
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Following are URLs where you can obtain information on other Texas Instruments products and application
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Products
Applications
Amplifiers
amplifier.ti.com
Audio
www.ti.com/audio
Data Converters
dataconverter.ti.com
Automotive
www.ti.com/automotive
DSP
dsp.ti.com
Broadband
www.ti.com/broadband
Interface
interface.ti.com
Digital Control
www.ti.com/digitalcontrol
Logic
logic.ti.com
Military
www.ti.com/military
Power Mgmt
power.ti.com
Optical Networking
www.ti.com/opticalnetwork
Microcontrollers
microcontroller.ti.com
Security
www.ti.com/security
Telephony
www.ti.com/telephony
Video & Imaging
www.ti.com/video
Wireless
www.ti.com/wireless
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2005, Texas Instruments Incorporated
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