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SN54ALS576B, SN54AS576
SN74ALS576B, SN74ALS577A, SN74AS576
OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS
SDAS065B DECEMBER 1982 REVISED JANUARY 1995
Copyright
1995, Texas Instruments Incorporated
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
3-State Buffer-Type Inverting Outputs Drive
Bus Lines Directly
Bus-Structured Pinout
Buffered Control Inputs
SN74ALS577A Has Synchronous Clear
Package Options Include Plastic
Small-Outline (DW) Packages, Ceramic
Chip Carriers (FK), Standard Plastic (N, NT)
and Ceramic (J) 300-mil DIPs, and Ceramic
Flat (W) Packages
description
These octal D-type edge-triggered flip-flops
feature 3-state outputs designed specifically for
bus driving. They are particularly suitable for
implementing buffer registers, I/O ports,
bidirectional bus drivers, and working registers.
These flip-flops enter data on the low-to-high
transition of the clock (CLK) input.
The output-enable (OE) input does not affect
internal operations of the flip-flops. Old data can
be retained or new data can be entered while the
outputs are disabled.
The SN54ALS576B and SN54AS576 are
characterized for operation over the full military
temperature range of 55
C to 125
C. The
SN74ALS576B, SN74ALS577A, and
SN74AS576 are characterized for operation from
0
C to 70
C.
SN54ALS576B, SN54AS576 . . . J OR W PACKAGE
SN74ALS576B, SN74AS576 . . . DW OR N PACKAGE
(TOP VIEW)
SN54ALS576B, SN54AS576 . . . FK PACKAGE
(TOP VIEW)
SN74ALS577A . . . DW OR NT PACKAGE
(TOP VIEW)
NC No internal connection
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
OE
1D
2D
3D
4D
5D
6D
7D
8D
GND
V
CC
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
CLK
3
2
1 20 19
9 10 11 12 13
4
5
6
7
8
18
17
16
15
14
2Q
3Q
4Q
5Q
6Q
3D
4D
5D
6D
7D
2D
1D
OE
8Q
7Q
1Q
8D
GND
CLK
V
CC
CLR
OE
1D
2D
3D
4D
5D
6D
7D
8D
NC
GND
V
CC
NC
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
CLK
NC
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
SN54ALS576B, SN54AS576
SN74ALS576B, SN74ALS577A, SN74AS576
OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS
SDAS065B DECEMBER 1982 REVISED JANUARY 1995
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Function Tables
ALS576B,
AS576
(each flip-flop)
INPUTS
OUTPUT
OE
CLK
D
Q
L
H
L
L
L
H
L
L
X
Q0
H
X
X
Z
SN74ALS577A
(each flip-flop)
INPUTS
OUTPUT
OE
CLR
CLK
D
Q
L
L
X
H
L
H
H
L
L
H
L
H
L
H
L
X
Q0
H
X
X
X
Z
logic symbols
OE
1D
2
1D
3
2D
4
3D
5
4D
6
5D
11
CLK
19
18
17
16
15
14
13
12
7
6D
8
7D
9
8D
EN
1
C1
OE
1D
3
1D
4
2D
5
3D
6
4D
7
5D
14
CLK
22
21
20
19
18
17
16
15
8
6D
9
7D
10
8D
EN
2
C1
CLR
1R
1
ALS576B,
AS576
SN74ALS577A
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
These symbols are in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
Pin numbers shown for the
ALS576B and
AS576 are for the DW,
J, N, and W packages.
Pin numbers shown for the SN74ALS577A are for the DW and NT
packages.
SN54ALS576B, SN54AS576
SN74ALS576B, SN74ALS577A, SN74AS576
OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS
SDAS065B DECEMBER 1982 REVISED JANUARY 1995
3
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
logic diagrams (positive logic)
OE
CLK
1D
1Q
1
11
2
19
To Seven Other Channels
1D
C1
OE
CLK
1D
1Q
2
14
3
22
To Seven Other Channels
1D
C1
1
CLR
ALS576B,
AS576
SN74ALS577A
Pin numbers shown are for the DW, J, N, and W packages.
Pin numbers shown are for the DW and NT packages.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
CC
7 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage, V
I
7 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage applied to a disabled 3-state output
5.5 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range, T
A
: SN54ALS576B
55
C to 125
C
. . . . . . . . . . . . . . . . . . . . . . . . . . .
SN74ALS576B, SN74ALS577A
0
C to 70
C
. . . . . . . . . . . . . . . . .
Storage temperature range
65
C to 150
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
recommended operating conditions
SN54ALS576B
SN74ALS576B
SN74ALS577A
UNIT
MIN
NOM
MAX
MIN
NOM
MAX
VCC
Supply voltage
4.5
5
5.5
4.5
5
5.5
V
VIH
High-level input voltage
2
2
V
VIL
Low-level input voltage
0.7
0.8
V
IOH
High-level output current
1
2.6
mA
IOL
Low-level output current
12
24
mA
f l k
Clock frequency
ALS576B
0
22
0
30
MHz
fclock
Clock frequency
SN74ALS577A
0
30
MHz
t
Pulse duration
ALS576B, CLK high or low
25
16.5
ns
tw
Pulse duration
SN74ALS577A, CLK high or low
16.5
ns
t
Set p time before CLK
Data
15
15
ns
tsu
Setup time before CLK
SN74ALS577A CLR
15
ns
th
Hold time after CLK
Data
4
0
ns
th
Hold time after CLK
SN74ALS577A CLR
0
ns
TA
Operating free-air temperature
55
125
0
70
C
SN54ALS576B, SN54AS576
SN74ALS576B, SN74ALS577A, SN74AS576
OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS
SDAS065B DECEMBER 1982 REVISED JANUARY 1995
4
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
SN54ALS576B
SN74ALS576B
SN74ALS577A
UNIT
MIN
TYP
MAX
MIN
TYP
MAX
VIK
VCC = 4.5 V,
II = 18 mA
1.2
1.2
V
VCC = 4.5 V to 5.5 V,
IOH = 0.4 mA
VCC 2
VCC 2
VOH
VCC = 4 5 V
IOH = 1 mA
2.4
3.3
V
VCC = 4.5 V
IOH = 2.6 mA
2.4
3.2
VOL
VCC = 4 5 V
IOL = 12 mA
0.25
0.4
0.25
0.4
V
VOL
VCC = 4.5 V
IOL = 24 mA
0.35
0.5
V
IOZH
VCC = 5.5 V,
VO = 2.7 V
20
20
A
IOZL
VCC = 5.5 V,
VO = 0.4 V
20
20
A
II
VCC = 5.5 V,
VI = 7 V
0.1
0.1
mA
IIH
VCC = 5.5 V,
VI = 2.7 V
20
20
A
IIL
VCC = 5.5 V,
VI = 0.4 V
0.2
0.2
mA
IO
VCC = 5.5 V,
VO = 2.25 V
20
112
30
112
mA
Outputs high
10
18
10
18
ICC
VCC = 5.5 V
Outputs low
15
24
15
24
mA
Outputs disabled
16
30
16
30
All typical values are at VCC = 5 V, TA = 25
C.
The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS.
switching characteristics (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
VCC = 4.5 V to 5.5 V,
CL = 50 pF,
R1 = 500
,
R2 = 500
,
TA = MIN to MAX
UNIT
SN54ALS576B
SN74ALS576B
SN74ALS577A
MIN
MAX
MIN
MAX
MIN
MAX
fmax
22
30
30
MHz
tPLH
CLK
An Q
4
24
3
14
4
14
ns
tPHL
CLK
Any Q
4
20
4
14
4
14
ns
tPZH
OE
An Q
4
24
3
18
4
18
ns
tPZL
OE
Any Q
3
23
4
18
4
18
ns
tPHZ
OE
Any Q
2
14
1
10
2
10
ns
tPLZ
OE
Any Q
3
29
2
15
3
15
ns
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
SN54ALS576B, SN54AS576
SN74ALS576B, SN74ALS577A, SN74AS576
OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS
SDAS065B DECEMBER 1982 REVISED JANUARY 1995
5
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
CC
7 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage, V
I
7 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage applied to a disabled 3-state output
5.5 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range, T
A
: SN54AS576
55
C to 125
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SN74AS576
0
C to 70
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range
65
C to 150
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
recommended operating conditions
SN54AS576
SN74AS576
UNIT
MIN
NOM
MAX
MIN
NOM
MAX
UNIT
VCC
Supply voltage
4.5
5
5.5
4.5
5
5.5
V
VIH
High-level input voltage
2
2
V
VIL
Low-level input voltage
0.8
0.8
V
IOH
High-level output current
12
15
mA
IOL
Low-level output current
32
48
mA
fclock*
Clock frequency
0
100
0
125
MHz
t *
Pulse duration
CLK high
5
4
ns
tw*
Pulse duration
CLK low
4
2
ns
tsu*
Setup time, data before CLK
3
2
ns
th*
Hold time, data after CLK
3
2
ns
TA
Operating free-air temperature
55
125
0
70
C
* On products compliant to MIL-STD-883, Class B, this parameter is based on characterization data but is not production tested.
SN54ALS576B, SN54AS576
SN74ALS576B, SN74ALS577A, SN74AS576
OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS
SDAS065B DECEMBER 1982 REVISED JANUARY 1995
6
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
SN54AS576
SN74AS576
UNIT
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
MIN
TYP
MAX
UNIT
VIK
VCC = 4.5 V,
II = 18 mA
1.2
1.2
V
VCC = 4.5 V to 5.5 V,
IOH = 2 mA
VCC 2
VCC 2
VOH
VCC = 4 5 V
IOH = 12 mA
2.4
3.2
V
VCC = 4.5 V
IOH = 15 mA
2.4
3.3
VOL
VCC = 4 5 V
IOL = 32 mA
0.29
0.5
V
VOL
VCC = 4.5 V
IOL = 48 mA
0.33
0.5
V
IOZH
VCC = 5.5 V,
VO = 2.7 V
50
50
A
IOZL
VCC = 5.5 V,
VO = 0.4 V
50
50
A
II
VCC = 5.5 V,
VI = 7 V
0.1
0.1
mA
IIH
VCC = 5.5 V,
VI = 2.7 V
20
20
A
IIL
D
VCC = 5 5 V
VI = 0 4 V
3
2
mA
IIL
All others
VCC = 5.5 V,
VI = 0.4 V
0.5
0.5
mA
IO
VCC = 5.5 V,
VO = 2.25 V
30
112
30
112
mA
Outputs high
77
125
77
125
ICC
VCC = 5.5 V
Outputs low
84
135
84
135
mA
Outputs disabled
84
135
84
135
All typical values are at VCC = 5 V, TA = 25
C.
The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS.
switching characteristics (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
VCC = 4.5 V to 5.5 V,
CL = 50 pF,
R1 = 500
,
R2 = 500
,
TA = MIN to MAX
UNIT
SN54AS576
SN74AS576
MIN
MAX
MIN
MAX
fmax*
100
125
MHz
tPLH
CLK
An Q
3
11
3
8
ns
tPHL
CLK
Any Q
4
11
4
9
ns
tPZH
OE
An Q
2
7
2
6
ns
tPZL
OE
Any Q
3
11
3
10
ns
tPHZ
OE
Any Q
2
7
2
6
ns
tPLZ
OE
Any Q
2
7
2
6
ns
* On products compliant to MIL-STD-883, Class B, this parameter is based on characterization data but is not production tested.
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
SN54ALS576B, SN54AS576
SN74ALS576B, SN74ALS577A, SN74AS576
OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS
SDAS065B DECEMBER 1982 REVISED JANUARY 1995
7
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
SERIES 54ALS/ 74ALS AND 54AS/ 74AS DEVICES
tPHZ
tPLZ
tPHL
tPLH
0.3 V
tPZL
tPZH
tPLH
tPHL
LOAD CIRCUIT
FOR 3-STATE OUTPUTS
From Output
Under Test
Test
Point
R1
S1
CL
(see Note A)
7 V
1.3 V
1.3 V
1.3 V
3.5 V
3.5 V
0.3 V
0.3 V
th
tsu
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
Timing
Input
Data
Input
1.3 V
1.3 V
3.5 V
3.5 V
0.3 V
0.3 V
High-Level
Pulse
Low-Level
Pulse
tw
VOLTAGE WAVEFORMS
PULSE DURATIONS
Input
Out-of-Phase
Output
(see Note C)
1.3 V
1.3 V
1.3 V
1.3 V
1.3 V
1.3 V
1.3 V
1.3 V
1.3 V
1.3 V
3.5 V
3.5 V
0.3 V
0.3 V
VOL
VOH
VOH
VOL
Output
Control
(low-level
enabling)
Waveform 1
S1 Closed
(see Note B)
Waveform 2
S1 Open
(see Note B)
[
0 V
VOH
VOL
[
3.5 V
In-Phase
Output
0.3 V
1.3 V
1.3 V
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS
R2
VCC
RL
Test
Point
From Output
Under Test
CL
(see Note A)
LOAD CIRCUIT
FOR OPEN-COLLECTOR OUTPUTS
LOAD CIRCUIT FOR
BI-STATE
TOTEM-POLE OUTPUTS
From Output
Under Test
Test
Point
CL
(see Note A)
RL
RL = R1 = R2
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. When measuring propagation delay items of 3-state outputs, switch S1 is open.
D. All input pulses have the following characteristics: PRR
1 MHz, tr = tf = 2 ns, duty cycle = 50%.
E. The outputs are measured one at a time with one transition per measurement.
Figure 1. Load Circuits and Voltage Waveforms
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package
Type
Package
Drawing
Pins Package
Qty
Eco Plan
(2)
Lead/Ball Finish
MSL Peak Temp
(3)
84001022A
ACTIVE
LCCC
FK
20
1
TBD
Call TI
Level-NC-NC-NC
8400102RA
ACTIVE
CDIP
J
20
1
TBD
Call TI
Level-NC-NC-NC
8400102SA
ACTIVE
CFP
W
20
1
TBD
Call TI
Level-NC-NC-NC
SN54ALS576BJ
ACTIVE
CDIP
J
20
1
TBD
Call TI
Level-NC-NC-NC
SN54AS576J
ACTIVE
CDIP
J
20
1
TBD
Call TI
Level-NC-NC-NC
SN74ALS576BDW
ACTIVE
SOIC
DW
20
25
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74ALS576BDWE4
ACTIVE
SOIC
DW
20
25
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74ALS576BDWR
ACTIVE
SOIC
DW
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74ALS576BDWRE4
ACTIVE
SOIC
DW
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74ALS576BN
ACTIVE
PDIP
N
20
20
Pb-Free
(RoHS)
CU NIPDAU
Level-NC-NC-NC
SN74ALS576BN3
OBSOLETE
PDIP
N
20
TBD
Call TI
Call TI
SN74ALS576BNE4
ACTIVE
PDIP
N
20
20
Pb-Free
(RoHS)
CU NIPDAU
Level-NC-NC-NC
SN74ALS576BNSR
ACTIVE
SO
NS
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74ALS576BNSRE4
ACTIVE
SO
NS
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74ALS577ADW
ACTIVE
SOIC
DW
24
25
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74ALS577ADWE4
ACTIVE
SOIC
DW
24
25
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74ALS577ADWR
ACTIVE
SOIC
DW
24
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74ALS577ADWRE4
ACTIVE
SOIC
DW
24
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74ALS577ANSR
ACTIVE
SO
NS
24
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74ALS577ANSRE4
ACTIVE
SO
NS
24
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74ALS577ANT
ACTIVE
PDIP
NT
24
15
Pb-Free
(RoHS)
CU NIPDAU
Level-NC-NC-NC
SN74ALS577ANT3
OBSOLETE
PDIP
NT
24
TBD
Call TI
Call TI
SN74ALS577ANTE4
ACTIVE
PDIP
NT
24
15
Pb-Free
(RoHS)
CU NIPDAU
Level-NC-NC-NC
SN74AS576DW
ACTIVE
SOIC
DW
20
25
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74AS576DWE4
ACTIVE
SOIC
DW
20
25
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74AS576DWR
ACTIVE
SOIC
DW
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74AS576DWRE4
ACTIVE
SOIC
DW
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74AS576N
ACTIVE
PDIP
N
20
20
Pb-Free
CU NIPDAU
Level-NC-NC-NC
PACKAGE OPTION ADDENDUM
www.ti.com
26-Sep-2005
Addendum-Page 1
Orderable Device
Status
(1)
Package
Type
Package
Drawing
Pins Package
Qty
Eco Plan
(2)
Lead/Ball Finish
MSL Peak Temp
(3)
(RoHS)
SN74AS576NE4
ACTIVE
PDIP
N
20
20
Pb-Free
(RoHS)
CU NIPDAU
Level-NC-NC-NC
SNJ54ALS576BFK
ACTIVE
LCCC
FK
20
1
TBD
Call TI
Level-NC-NC-NC
SNJ54ALS576BJ
ACTIVE
CDIP
J
20
1
TBD
Call TI
Level-NC-NC-NC
SNJ54ALS576BW
ACTIVE
CFP
W
20
1
TBD
Call TI
Level-NC-NC-NC
SNJ54AS576FK
ACTIVE
LCCC
FK
20
1
TBD
Call TI
Level-NC-NC-NC
SNJ54AS576J
ACTIVE
CDIP
J
20
1
TBD
Call TI
Level-NC-NC-NC
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco
Plan
-
The
planned
eco-friendly
classification:
Pb-Free
(RoHS)
or
Green
(RoHS
&
no
Sb/Br)
-
please
check
http://www.ti.com/productcontent
for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
PACKAGE OPTION ADDENDUM
www.ti.com
26-Sep-2005
Addendum-Page 2
MECHANICAL DATA

MLCC006B OCTOBER 1996
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
FK (S-CQCC-N**)
LEADLESS CERAMIC CHIP CARRIER
4040140 / D 10/96
28 TERMINAL SHOWN
B
0.358
(9,09)
MAX
(11,63)
0.560
(14,22)
0.560
0.458
0.858
(21,8)
1.063
(27,0)
(14,22)
A
NO. OF
MIN
MAX
0.358
0.660
0.761
0.458
0.342
(8,69)
MIN
(11,23)
(16,26)
0.640
0.739
0.442
(9,09)
(11,63)
(16,76)
0.962
1.165
(23,83)
0.938
(28,99)
1.141
(24,43)
(29,59)
(19,32)
(18,78)
**
20
28
52
44
68
84
0.020 (0,51)
TERMINALS
0.080 (2,03)
0.064 (1,63)
(7,80)
0.307
(10,31)
0.406
(12,58)
0.495
(12,58)
0.495
(21,6)
0.850
(26,6)
1.047
0.045 (1,14)
0.045 (1,14)
0.035 (0,89)
0.035 (0,89)
0.010 (0,25)
12
13
14
15
16
18
17
11
10
8
9
7
5
4
3
2
0.020 (0,51)
0.010 (0,25)
6
1
28
26
27
19
21
B SQ
A SQ
22
23
24
25
20
0.055 (1,40)
0.045 (1,14)
0.028 (0,71)
0.022 (0,54)
0.050 (1,27)
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a metal lid.
D. The terminals are gold plated.
E. Falls within JEDEC MS-004
MECHANICAL DATA

MPDI004 OCTOBER 1994
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
NT (R-PDIP-T**)
PLASTIC DUAL-IN-LINE PACKAGE
4040050 / B 04/95
24 PINS SHOWN
1.425
(36,20)
1.385
0.295
(7,49)
(8,00)
0.315
(35,18)
28
PINS **
A MIN
A MAX
B MAX
B MIN
13
0.250 (6,35)
0.280 (7,11)
12
0.200 (5,08) MAX
DIM
24
1.230
(31,24)
(32,04)
1.260
0.310
(7,87)
(7,37)
0.290
B
0.125 (3,18) MIN
Seating Plane
0.010 (0,25) NOM
A
0.070 (1,78) MAX
24
1
0.015 (0,38)
0.021 (0,53)
0.020 (0,51) MIN
0.100 (2,54)
M
0.010 (0,25)
0
15
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
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www.ti.com/digitalcontrol
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2005, Texas Instruments Incorporated