SBAS312A - JANUARY 2005 - REVISED APRIL 2005
Two 1 Bit, 10MHz, 2nd Order
Delta Sigma Modulators
ADS1205
FEATURES
D
16-Bit Resolution
D
14-Bit Linearity
D
2.5V Input Range at 2.5V
D
Internal Reference Voltage: 2%
D
Gain Error: 0.5%
D
Two Independent Delta-Sigma Modulators
D
Two Input Reference Buffers
D
On-Chip 20MHz Oscillator
D
Selectable Internal or External Clock
D
Operating Temperature Range:
-40
C to +85
C
D
QFN-24 (4x4) Package
APPLICATIONS
D
Motor Control
D
Current Measurement
D
Industrial Process Control
D
Instrumentation
D
Resolver
DESCRIPTION
The ADS1205 is a two-channel, high-performance,
delta-sigma (
) modulator with more than 98dB dynamic
range, operating from a single +5V supply. The differential
inputs are ideal for direct connection to transducers in an
industrial environment. With the appropriate digital filter
and modulator rate, the device can be used to achieve
16-bit analog-to-digital (A/D) conversion with no missing
codes. Effective resolution of 14 bits can be obtained with
a digital filter bandwidth of 40kHz at a modulator rate of
10MHz. The ADS1205 is designed for use in
high-resolution measurement applications including
current measurements, smart transmitters, industrial
process control, and resolvers. It is available in a QFN-24
(4x4) package.
2nd-Order
Modulator
CH A+
AV
DD
CH A
-
Output
Interface
Circuit
RC
Oscillator
20MHz
Out
EN
Clock
Select
Divider
REFIN A
Reference
Voltage
2.5V
REFOUT
OUT A
OUT B
CLKIN
AGND
BGND
BV
DD
CLKOUT
CLKSEL
2nd-Order
Modulator
CH B+
CH B
-
REFIN B
www.ti.com
Copyright
2005, Texas Instruments Incorporated
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments
semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date. Products
conform to specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all parameters.
All trademarks are the property of their respective owners.
ADS1205
SBAS312A - JANUARY 2005 - REVISED APRIL 2005
www.ti.com
2
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate
precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to
damage because very small parametric changes could cause the device not to meet its published specifications.
Package/Ordering Information
For the most current package and ordering information, see the Package Option Addendum at the end of this document,
or see the TI web site at www.ti.com.
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range unless otherwise noted(1)
ADS1205
UNIT
Supply voltage, AGND to AVDD
-0.3 to 6
V
Supply voltage, BGND to BVDD
-0.3 to 6
V
Analog input voltage with respect to AGND
AGND - 0.3 to AVDD + 0.3
V
Reference input voltage with respect to AGND
AGND - 0.3 to AVDD + 0.3
V
Digital input voltage with respect to BGND
BGND - 0.3 to BVDD + 0.3
V
Ground voltage difference, AGND to BGND
0.3
V
Voltage differences, BVDD to AGND
-0.3 to 6
V
Input current to any pin except supply
10
mA
Power dissipation
See Dissipation Rating table
Operating virtual junction temperature range, TJ
-40 to +150
C
Operating free-air temperature range, TA
-40 to +85
C
Storage temperature range, TSTG
-65 to +150
C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
DISSIPATION RATINGS
PACKAGE
TA
25
C
POWER RATING
DERATING FACTOR
ABOVE TA = 25
C(1)
TA = 70
C
POWER RATING
TA = 85
C
POWER RATING
QFN-24 (4x4)
2193mW
21.929mW/
C
1206mW
877.2mW
(1) This is the inverse of the traditional junction-to-ambient thermal resistance (R
q
JA). Thermal resistances are not production tested and are for
informational purposes only.
RECOMMENDED OPERATING CONDITIONS
PARAMETER
MIN
NOM
MAX
UNIT
Supply voltage, AGND to AVDD
4.5
5
5.5
V
Supply voltage, BGND to BVDD
Low-Voltage Levels
2.7
3.6
V
Supply voltage, BGND to BVDD
5V Logic Levels
4.5
5
5.5
V
Reference input voltage
0.5
2.5
2.6
V
Operating common-mode signal
-IN
2.5
V
Analog inputs
+IN - (-IN)
0.8
REFIN
V
External clock(1)
16
20
24
MHz
Operating junction temperature range, TJ
-40
105
C
(1) With reduced accuracy, clock can go from 1MHz up to 33MHz; see Typical Characteristics.
ADS1205
SBAS312A - JANUARY 2005 - REVISED APRIL 2005
www.ti.com
3
ELECTRICAL CHARACTERISTICS
Over recommended operating free-air temperature range at -40
C to +85
C, AVDD = 5V, BVDD = 3V, CH x+ = 0.5V to 4.5V, CH x- = 2.5V,
REFIN = REFOUT = internal +2.5V, CLKIN = 20MHz, and 16-bit Sinc3 filter with decimation by 256, unless otherwise noted.
ADS1205I
PARAMETER
TEST CONDITIONS
MIN
TYP(1)
MAX
UNITS
Resolution
16
Bits
DC Accuracy
INL
Integral linearity error(2)
-1.4
3
LSB
INL
Integral linearity error(2)
-0.002
0.005
% FSR
Integral linearity match
6
LSB
Integral linearity match
0.009
% FSR
DNL
Differential nonlinearity(3)
1
LSB
VOS
Input offset error(4)
-1.2
3
mV
Input offset error match
0.1
2
mV
TCVOS
Input offset error drift
1.1
8
V/
C
GERR
Gain error(4)
Referenced to VREF
-0.01
0.5
% FSR
Gain error match
0.09
0.5
% FSR
TCGERR
Gain error drift
1.3
ppm/
C
PSRR
Power-supply rejection ratio
4.75V < AVDD < 5.25V
78
dB
Analog Input
FSR
Full-scale differential range
(CH x+) - (CH x-); CH x- = 2.5V
2.5
V
Specified differential range
(CH x+) - (CH x-); CH x- = 2.5V
2
V
Maximum operating input range(3)
0
AVDD
V
Input capacitance
Common-mode
3
pF
Input leakage current
CLK turned off
1
nA
Differential input resistance
100
k
Differential input capacitance
2.5
pF
CMRR
Common-mode rejection ratio
At DC
108
dB
CMRR
Common-mode rejection ratio
VIN =
1.25VPP at 40kHz
117
dB
BW
Bandwidth
FS sine wave, -3dB
50
MHz
Sampling Dynamics
Internal clock frequency
CLKSEL = 1
8
9.8
12
MHz
CLKIN
External clock frequency(5)
CLKSEL = 0
1
20
24
MHz
AC Accuracy
THD
Total harmonic distortion
VIN =
2VPP at 5kHz
-96.6
-88
dB
SFDR
Spurious-free dynamic range
VIN =
2VPP at 5kHz
92
98
dB
SNR
Signal-to-noise ratio
VIN =
2VPP at 5kHz
86
88.9
dB
SINAD
Signal-to-noise + distortion
VIN =
2VPP at 5kHz
85
88.2
dB
Channel-to-channel isolation(3)
VIN =
2VPP at 50kHz
100
dB
ENOB
Effective number of bits
14
14.5
Bits
(1) All typical values are at TA = +25
C.
(2) Integral nonlinearity is defined as the maximum deviation of the line through the end points of the specified input range of the transfer curve
for CH x+ = -2V to +2V at 2.5V, expressed either as the number of LSBs or as a percent of measured input range (4V).
(3) Ensured by design.
(4) Maximum values, including temperature drift, are ensured over the full specified temperature range.
(5) With reduced accuracy, the clock frequency can go from 1MHz to 33MHz.
(6) Applicable for 5.0V nominal supply: BVDD (min) = 4.5V and BVDD (max) = 5.5V.
(7) Applicable for 3.0V nominal supply: BVDD (min) = 2.7V and BVDD (max) = 3.6V.
ADS1205
SBAS312A - JANUARY 2005 - REVISED APRIL 2005
www.ti.com
4
ELECTRICAL CHARACTERISTICS (continued)
Over recommended operating free-air temperature range at -40
C to +85
C, AVDD = 5V, BVDD = 3V, CH x+ = 0.5V to 4.5V, CH x- = 2.5V,
REFIN = REFOUT = internal +2.5V, CLKIN = 20MHz, and 16-bit Sinc3 filter with decimation by 256, unless otherwise noted.
PARAMETER
UNITS
ADS1205I
TEST CONDITIONS
PARAMETER
UNITS
MAX
TYP(1)
MIN
TEST CONDITIONS
Voltage Reference Output
VREFOUT
Reference voltage output
-40
C to +85
C
2.450
2.5
2.550
V
dVREFOUT/dT Output voltage temperature drift
20
ppm/
C
Output voltage noise
f = 0.1Hz to 10Hz, CL = 10
F
10
Vrms
Output voltage noise
f =10Hz to 10kHz, CL = 10
F
12
Vrms
PSRR
Power-supply rejection ratio
60
dB
IOUT
Output current
10
A
ISC
Short-circuit current
0.5
mA
Turn-on settling time
to 0.1% at CL = 0
100
s
Voltage Reference Input
VIN
Reference voltage input
0.5
2.5
2.6
V
Reference input resistance
100
M
Reference input capacitance
5
pF
Reference input current
1
A
Digital Inputs(6)
Logic family
CMOS with Schmitt Trigger
VIH
High-level input voltage
0.7
BVDD
BVDD+0.3
V
VIL
Low-level input voltage
-0.3
0.3
BVDD
V
IIN
Input current
VI = BVDD or GND
50
nA
CI
Input capacitance
5
pF
Digital Outputs(6)
Logic family
CMOS
VOH
High-level output voltage
BVDD = 4.5V, IOH = -100
A
4.44
V
VOL
Low-level output voltage
BVDD = 4.5V, IOL = +100
A
0.5
V
CO
Output capacitance
5
pF
CL
Load capacitance
30
pF
Data format
Bit Stream
(1) All typical values are at TA = +25
C.
(2) Integral nonlinearity is defined as the maximum deviation of the line through the end points of the specified input range of the transfer curve
for CH x+ = -2V to +2V at 2.5V, expressed either as the number of LSBs or as a percent of measured input range (4V).
(3) Ensured by design.
(4) Maximum values, including temperature drift, are ensured over the full specified temperature range.
(5) With reduced accuracy, the clock frequency can go from 1MHz to 33MHz.
(6) Applicable for 5.0V nominal supply: BVDD (min) = 4.5V and BVDD (max) = 5.5V.
(7) Applicable for 3.0V nominal supply: BVDD (min) = 2.7V and BVDD (max) = 3.6V.
ADS1205
SBAS312A - JANUARY 2005 - REVISED APRIL 2005
www.ti.com
5
ELECTRICAL CHARACTERISTICS (continued)
Over recommended operating free-air temperature range at -40
C to +85
C, AVDD = 5V, BVDD = 3V, CH x+ = 0.5V to 4.5V, CH x- = 2.5V,
REFIN = REFOUT = internal +2.5V, CLKIN = 20MHz, and 16-bit Sinc3 filter with decimation by 256, unless otherwise noted.
PARAMETER
UNITS
ADS1205I
TEST CONDITIONS
PARAMETER
UNITS
MAX
TYP(1)
MIN
TEST CONDITIONS
Digital Inputs(7)
Logic family
LVCMOS
VIH
High-level input voltage
BVDD = 3.6V
2
BVDD+0.3
V
VIL
Low-level input voltage
BVDD = 2.7V
-0.3
0.8
V
IIN
Input current
VI = BVDD or GND
50
nA
CI
Input capacitance
5
pF
Digital Outputs(7)
Logic family
LVCMOS
VOH
High-level output voltage
BVDD = 2.7V, IOH = -100
A
BVDD-0.2
V
VOL
Low-level output voltage
BVDD = 2.7V, IOL = +100
A
0.2
V
CO
Output capacitance
5
pF
CL
Load capacitance
30
pF
Data format
Bit Stream
Power Supply
AVDD
Analog supply voltage
4.5
5.5
V
BVDD
Buffer I/O supply voltage
Low-voltage levels
2.7
3.6
V
BVDD
Buffer I/O supply voltage
5V logic levels
4.5
5.5
V
AIDD
Analog operating supply current
CLKSEL = 1
11.8
16
mA
AIDD
Analog operating supply current
CLKSEL = 0
11.4
15.5
mA
BIDD
Buffer I/O operating supply current
BVDD = 3V, CLKOUT = 10MHz
2
mA
BIDD
Buffer I/O operating supply current
BVDD = 5V, CLKOUT = 10MHz
2
mA
Power dissipation
CLKSEL = 0
57
77.5
mW
Power dissipation
CLKSEL = 1
59
80
mW
(1) All typical values are at TA = +25
C.
(2) Integral nonlinearity is defined as the maximum deviation of the line through the end points of the specified input range of the transfer curve
for CH x+ = -2V to +2V at 2.5V, expressed either as the number of LSBs or as a percent of measured input range (4V).
(3) Ensured by design.
(4) Maximum values, including temperature drift, are ensured over the full specified temperature range.
(5) With reduced accuracy, the clock frequency can go from 1MHz to 33MHz.
(6) Applicable for 5.0V nominal supply: BVDD (min) = 4.5V and BVDD (max) = 5.5V.
(7) Applicable for 3.0V nominal supply: BVDD (min) = 2.7V and BVDD (max) = 3.6V.
EQUIVALENT INPUT CIRCUIT
R
ON
650
C
(SAMPLE)
1pF
BV
DD
D
IN
BGND
AV
DD
A
IN
AGND
Diode Turn-On Voltage: 0.35V
Equivalent Digital Input Circuit
Equivalent Analog Input Circuit
PDF 
ZIP