DRV593
DRV594
SLOS401A - SEPTEMBER 2002 REVISED - OCTOBER 2002
3-A HIGH-EFFICIENCY PWM POWER DRIVER
FEATURES
D
Operation Reduces Output Filter Size and
Cost by 50% Compared to DRV591
D
3-A Maximum Output Current
D
Low Supply Voltage Operation: 2.8 V to 5.5 V
D
High Efficiency Generates Less Heat
D
Overcurrent and Thermal Protection
D
Fault Indicators for Overcurrent, Thermal and
Undervoltage Conditions
D
Two Selectable Switching Frequencies
D
Internal or External Clock Sync
D
PWM Scheme Optimized for EMI
D
9
9 mm PowerPAD
Quad Flatpack Package
APPLICATIONS
D
Thermoelectric Cooler (TEC) Driver
D
Laser Diode Biasing
DESCRIPTION
The DRV593 and DRV594 are high-efficiency,
high-current power amplifiers ideal for driving a wide
variety of thermoelectric cooler elements in systems
powered from 2.8 V to 5.5 V. The operation of the device
requires only one inductor and capacitor for the output
filter, saving significant printed-circuit board area.
Pulse-width modulation (PWM) operation and low output
stage on-resistance significantly decrease power
dissipation in the amplifier.
The DRV593 and DRV594 are internally protected against
thermal and current overloads. Logic-level fault indicators
signal when the junction temperature has reached
approximately 115
C to allow for system-level shutdown
before the amplifier's internal thermal shutdown circuitry
activates. The fault indicators also signal when an
overcurrent event has occurred. If the overcurrent circuitry
is tripped, the devices automatically reset (see application
information section for more details).
The PWM switching frequency may be set to 500 kHz or
100 kHz depending on system requirements. To eliminate
external components, the gain is fixed at 2.3 V/V for the
DRV593. For the DRV594, the gain is fixed at 14.5 V/V.
1
F
AVDD
AGND (Connect to PowerPAD)
ROSC
COSC
AREF
IN+
IN-
IN-
F
AUL
T1
F
AUL
T0
PVDD
PVDD
PVDD
H/C
H/C
H/C
H/C
PGND
PGND
PGND
PGND
PGND
PGND
PWM
PWM
PWM
PWM
PVDD
PVDD
PVDD
FREQ
120 k
220 pF
1
F
Shutdown Control
1 k
1 k
DC Control
Voltage
10
F
V
DD
10
H
1
F
FAULT1
FAULT0
To TEC or Laser
Diode Anode
To TEC or Laser
Diode Cathode
1
F
SHUTDOWN
INT/EXT
DRV593
DRV594
10
F
PowerPAD is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date. Products
conform to specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments
semiconductor products and disclaimers thereto appears at the end of this data sheet.
www.ti.com
Copyright
2002, Texas Instruments Incorporated
DRV593
DRV594
SLOS401A - SEPTEMBER 2002 REVISED - OCTOBER 2002
www.ti.com
2
This integrated circuit can be damaged by ESD. Texas
Instruments recommends that all integrated circuits be
handled with appropriate precautions. Failure to observe
proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to
complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could
cause the device not to meet its published specifications.
ORDERING INFORMATION
T
A
PowerPAD QUAD FLATPACK
(VFP)
40
C to 85
C
DRV593VFP
(1)
-40
C to 85
C
DRV594VFP
(1)
(1)
This package is available taped and reeled. To order this
packaging option, add an R suffix to the part number (e.g.,
DRV593VFPR or DRV594VFPR).
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range unless otherwise noted
(1)
DRV593, DRV594
Supply voltage, AVDD, PVDD
-0.3 V to 5.5 V
Input voltage, V
I
-0.3 V to V
DD
+ 0.3 V
Output current, I
O
(FAULT0, FAULT1)
1 mA
Continuous total power dissipation
See Dissipation Rating Table
Operating free-air temperature range, T
A
-40
C to 85
C
Operating junction temperature range, T
J
-40
C to 150
C
Storage temperature range, T
stg
-65
C to 165
C
(1)
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING CONDITIONS
MIN MAX UNIT
Supply voltage, AVDD
,
PVDD
2.8
5.5
V
High-level input voltage, V
IH
FREQ, INT/EXT, SHUTDOWN, COSC
2
V
Low-level input voltage, V
IL
FREQ, INT/EXT, SHUTDOWN, COSC
0.8
V
Operating free-air temperature, T
A
- 40
85
C
PACKAGE DISSIPATION RATINGS
PACKAGE
JA
(1)
(
C/W)
JC
(
C/W)
T
A
=
25
C
POWER RATING
VFP
29.4
1.2
4.1 W
(1)
This data was taken using 2 oz trace and copper pad that is
soldered directly to a JEDEC standard 4-layer 3 in
3 in PCB.
DRV593
DRV594
SLOS401A - SEPTEMBER 2002 REVISED - OCTOBER 2002
www.ti.com
3
ELECTRICAL CHARACTERISTICS
over operating free-air temperature range unless otherwise noted
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
|V
OO
|
Output offset voltage (measured differentially)
V
I
= V
DD
/2,
I
O
= 0 A
14
100
mV
|I
IH
|
High-level input current
V
DD
= 5.5V,
V
I
= V
DD
1
A
|I
IL
|
Low-level input current
V
DD
= 5.5V,
V
I
= 0 V
1
A
V
n
Integrated output noise voltage
f = <1 Hz to 10 kHz
40
V
V
Common mode voltage range
V
DD
= 5 V
1.2
3.8
V
V
ICM
Common-mode voltage range
V
DD
= 3.3 V
1.2
2.1
V
A
Closed loop voltage gain
DRV593
2.1
2.3
2.6
V/V
A
v
Closed-loop voltage gain
DRV594
13.7
14.5
15.3
V/V
Full power bandwidth
60
kHz
V
Voltage output (measured differentially)
I
O
=
1 A, r
ds(on)
= 65 m
, V
DD
= 5 V
4.87
V
V
O
Voltage output (measured differentially)
I
O
=
3 A, r
ds(on)
= 65 m
, V
DD
= 5 V
4.61
V
V
DD
= 5 V, I
O
= 4 A,
High side
25
60
95
m
r
Drain source on state resistance
V
DD
= 5 V, I
O
= 4 A,
T
A
= 25
C
Low side
25
65
95
m
r
DS(on)
Drain-source on-state resistance
V
DD
= 3.3 V, I
O
= 4 A,
High side
25
80
140
m
V
DD
= 3.3 V, I
O
= 4 A,
T
A
= 25
C
Low side
25
90
140
m
Maximum continuous current output
3
A
Status flag output pins (FAULT0, FAULT1)
Fault active (open drain output)
Sinking 200
A
0.1
V
E t
al l k f
a
For 500 kHz operation
225
250
300
kH
External clock frequency range
For 100 kHz operation
45
50
55
kHz
I
Q i
t t
V
DD
= 5 V, No load or filter
4
12
A
I
q
Quiescent current
V
DD
= 3.3 V, No load or filter
2.5
8
mA
I
q(SD)
Quiescent current in shutdown mode
V
DD
= 5 V, SHUTDOWN = 0.8 V
0
40
80
A
Output resistance in shutdown
SHUTDOWN = 0.8 V
1
2
k
Power-on threshold
1.7
2.8
V
Power-off threshold
1.6
2.6
V
Thermal trip point
FAULT0 active
115
C
Thermal shutdown
Power off
150
C
Z
I
Input impedance (IN+, IN-)
100
k
DRV593
DRV594
SLOS401A - SEPTEMBER 2002 REVISED - OCTOBER 2002
www.ti.com
4
PIN ASSIGNMENTS
VFP PACKAGE
(TOP VIEW)
31 30 29 28 27
9 10
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
PWM
PGND
PGND
PGND
PGND
PGND
PGND
H/C
AVDD
AGND
ROSC
COSC
AREF
IN+
IN-
SHUTDOWN
32
26
11 12 13 14 15
F
AUL
T1
F
AUL
T0
PVDD
PVDD
H/C
FREQ
INT/EXT
PVDD
PVDD
PWM
16
PWM
25
H/C
PVDD
H/C
PowerPAD
PVDD
PWM
Terminal Functions
TERMINAL
I/O
DESCRIPTION
NAME
NO.
I/O
DESCRIPTION
AGND
2
Analog ground
AREF
5
O
Connect 1
F capacitor to ground for AREF voltage filtering
AVDD
1
I
Analog power supply
COSC
4
I
Connect capacitor to ground to set oscillation frequency (220 pF for 500 kHz, 1 nF for 100 kHz) when the internal
oscillator is selected; connect clock signal when an external oscillator is used
FAULT0
10
O
Fault flag 0, low when active open drain output (see application information)
FAULT1
9
O
Fault flag 1, low when active open drain output (see application information)
FREQ
32
I
Selects 500 kHz switching frequency when a TTL logic low is applied to this terminal; selects 100 kHz switching
frequency when a TTL logic high is applied
IN-
7
I
Negative differential input
IN+
6
I
Positive differential input
INT/EXT
31
I
Selects the internal oscillator when a TTL logic high is applied to this terminal; selects the use of an external oscil-
lator when a TTL logic low is applied to this terminal
H/C
14, 15,
16, 17
O
Direction control output for heat and cool modes (4 pins)
PWM
24, 25,
26, 27
O
PWM output for voltage magnitude (4 pins)
PGND
18, 19,
20, 21,
22, 23
High-current ground (6 pins)
PVDD
11, 12,
13, 28,
29, 30
I
High-current power supply (6 pins)
ROSC
3
I
Connect 120-k
resistor to AGND to set oscillation frequency (either 500 kHz or 100 kHz). Not needed if an
external clock is used.
SHUTDOWN
8
I
Places the amplifier in shutdown mode when a TTL logic low is applied to this terminal; places the amplifier
in normal operation when a TTL logic high is applied
DRV593
DRV594
SLOS401A - SEPTEMBER 2002 REVISED - OCTOBER 2002
www.ti.com
5
FUNCTIONAL BLOCK DIAGRAM
2.3
R (DRV593)
14.5 x R (DRV594)
_
+
_
+
_
+
_
+
2.3
R (DRV593)
14.5 x R (DRV594)
_
+
_
+
Gate
Drive
Gate
Drive
AVDD
OC
Detect
Start-Up
Protection
Logic
Thermal
VDDok
Ramp
Generator
Biases
and
References
TTL
Input
Buffer
IN-
IN+
SHUTDOWN
R
R
AGND
AVDD
PVDD
H/C
PGND
PVDD
PWM
PGND
FAULT0
FAULT1
INT/EXT
FREQ
COSC
ROSC
AREF
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