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FEATURES
APPLICATIONS
DESCRIPTION
ONET4201LD
SLLS677 NOVEMBER 2005
155 Mbps to 4.25 Gbps LASER DRIVER
SONET/SDH Transmission Systems
Multi-Rate Operation From 155 Mbps up to
4.25 Gbps
Fibre Channel Optical Modules
Fiber Optic Data Links
Bias Current Programmable From 1 mA
to 100 mA
Digital Cross-Connects
Optical Transmitters
Modulation Current Programmable From 5 mA
to 85 mA
APC and Fault Detection
Fault Mode Selection
The ONET4201LD is a laser driver for multiple fiber
optic applications up to 4.25 Gbps. The device
Bias and Photodiode Current Monitors
accepts CML input data and provides bias and
CML Data Inputs
modulation currents for driving a laser diode. Also
Temperature Compensation of Modulation
provided
are
automatic
power
control
(APC),
temperature compensation of modulation current,
Current
fault detection, and current monitor features.
Single 3.3-V Supply
The device is available in a small footprint 4 mm
4
Active Back-Termination at the Output
mm 24-pin QFN package. The circuit requires a
Surface Mount Small Footprint 4 mm
4 mm
single 3.3-V supply.
24-Lead QFN Package
This power efficient laser driver is characterized for
operation from 40
C to 85
C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright 2005, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
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DETAILED DESCRIPTION
BLOCK DIAGRAM
VCC
GND
DIN+
DIN
MOD+
MOD
MODSET
current modulator
OUTPOL
MODTC
BIAS
MONB
IBMAX
MONP
PD
APCSET
SDOWN
DISABLE
CAPC
FLTMODE
active termination
OUT+
OUT
input buffer stage
modulation current generator
MODCTRL
MODSET
IMODEN
MODTC
IMODMON
reference
voltage
and bias
generation
VCC
GND
4
3
bias current generator
BIAS
IBMAX
IBEN
IBMON IBSET
MONB
control
IMODEN
IMODMON
IBEN
IBMON
DISABLE
SDOWN
APCCTRL
APCMON
FLTMODE
automatic power control
(APC)
IBSET
APCMON
APCCTRL
MONP
APCSET
PD
CAPC
HIGH SPEED DATA PATH
ONET4201LD
SLLS677 NOVEMBER 2005
These devices have limited built-in ESD protection. The leads should be shorted together or the device
placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.
A simplified block diagram of the ONET4201LD is shown in
Figure 1
.
This compact, low power 4.25-Gbps laser driver circuit consists of a high-speed data path and a bias and control
block.
The function of the data path is to buffer the input data and then modulate the laser diode current according to
the input data stream.
The bias and control block generates the laser diode bias current, contains automatic power control (APC) to
maintain constant optical output power, generates a modulation current that can be temperature compensated
and controls power-on during start-up and shutdown after failure detection. The circuit design is optimized for
high-speed and low voltage operation (3.3 V).
The main circuit blocks are described in detail below.
Figure 1. Simplified Block Diagram of the ONET4201LD
The high-speed data path consists of an input buffer stage and a current modulator.
The input buffer stage takes CML compatible differential signals. It provides on-chip 50-
termination to VCC.
AC-coupling may be used at the DIN+ and DIN- inputs.
The laser diode current modulator mainly consists of two common-emitter output-transistors and the required
driver circuitry. According to the input data stream, the modulation current is sunk at the MOD+ or the MOD pin,
respectively.
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BIAS AND CONTROL
BANDGAP VOLTAGE AND BIAS GENERATION
AUTOMATIC POWER CONTROL
I
PD
[A]
+
P
AVG
[W]
MON
[A W]
(1)
R
APCSET
[
W
]
+
4.69 V
I
PD
[A]
+
4.69 V
P
AVG
[W]
MON
[A W]
(2)
I
BIASMAX
[A]
+
343 V
R
BIASMAX
[
W
]
(3)
V
MONB
[V]
+
R
MONB
[
W
]
I
BIAS
[A]
68
(4)
V
MONP
[V]
+
R
MONP
[
W
]
I
PD
[A]
(5)
ONET4201LD
SLLS677 NOVEMBER 2005
DETAILED DESCRIPTION (continued)
Modulation current setting is performed by means of the modulation current generator block, which is supervised
by the control circuit block.
The laser diode can be either ac or dc coupled. In both cases, the maximum modulation current is 85 mA. The
modulation output is optimized for driving a 20-
load.
For optimum performance when driving a laser diode over a 20-
transmission line, the ONET4201LD provides
active 20-
back-termination, which minimizes jitter caused by reflections.
The bias and control circuitry consists of the bandgap voltage and bias generation block, the bias current
generator, the automatic power control block and the supervising control circuitry.
The bandgap voltage reference provides process and temperature independent reference voltages needed to set
bias current, modulation current, and photodiode reference current. Additionally, this block provides the biasing
for all internal circuits.
The ONET4201LD laser driver incorporates an APC loop to compensate for the changes in laser threshold
current over temperature and lifetime. The internal APC is enabled when resistors are connected to the IBMAX
and APCSET pins. A back-facet photodiode mounted in the laser package is used to detect the average laser
output power. The photodiode current I
PD
that is proportional to the average laser power, can be calculated by
using the laser to monitor transfer ratio,
MON
and the average power, P
AVG
:
In closed loop operation, the APC modifies the laser diode bias current by comparing I
PD
with a reference current
I
APCSET
and generates a bias compensation current. I
PD
can be programmed by selecting the external resistor
R
APCSET
according to:
The bias compensation current subtracts from the maximum bias current to maintain the monitor photodiode
current. The maximum bias current is programmed by the resistor connected to IBMAX:
this current limit establishes the maximum bias current available in closed loop mode, as well as in transient fault
conditions such as shorts at the PD pin to ground or delayed laser power up.
An external pin MONB is provided as a bias current monitor output. A fraction of the bias current (1/68) is
mirrored and develops a voltage drop across an external resistor to ground, R
MONB
. The voltage at MONB is
given as:
If the voltage at MONB is greater than the programmed threshold, a fault mode occurs.
The MONP is also provided as a photocurrent monitor output. The photodiode current, I
PD
, is mirrored and
develops a voltage across an external resistor to ground, R
MONP
. The voltage at MONP is given as:
If the voltage at MONP is greater than the programmed threshold, a fault mode occurs.
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MODULATION CURRENT GENERATOR
I
MOD
[A]
+
265 V
R
MODSET
[
W
]
1
)
24
W
R
MODTC
[
W
]
)
630 ppm
T[
o
C]
*
T
0
[
o
C]
(6)
CONTROL
FAULT DETECTION
ONET4201LD
SLLS677 NOVEMBER 2005
DETAILED DESCRIPTION (continued)
As with any negative feedback system design, care must be taken to assure stability of the loop. The loop
bandwidth must not be too high in order to minimize pattern-dependent jitter. The dominant pole is determined by
the capacitor C
APC
. The recommended value for C
APC
is 200 nF. The capacitance of the monitor photodiode C
PD
adds another pole to the system and thus it must be small enough to maintain stability. The recommended value
for this capacitance is C
PD
50 pF.
The internal APC loop can be disabled by connecting a 100-k
resistor from APCSET to VCC and leaving PD
open. In open loop operation, the laser diode current is set by I
BIASMAX
and I
MODSET
.
The modulation current generator defines the tail current of the modulator, which is sunk from either MOD+ or
MOD- depending upon the data pattern. The modulation current consists of a modulation current I
MOD0
at a
reference temperature T
0
= 60
C (set by the resistor R
MODSET
) and a temperature dependent modulation current
defined by the resistor R
MODTC
. The modulation current can be estimated as follows:
Note that the reference temperature, T
0
, and the temperature compensation set by R
MODTC
varies from
part-to-part. To reduce the variation, I
MOD
can be calibrated over temperature and set with a microcontroller DAC
or digital potentiometer.
The function of this block is to control the start-up sequence, detect faults, detect tracking failure of the APC loop
and provide disable control. The laser driver has a controlled start-up sequence which helps prevent transient
glitches from being applied to the laser during power on. At start-up, the laser diode is off, SDOWN is low, and
the APC loop is open. Once V
CC
reaches ~2.8 V, the laser diode bias generator and modulation current
generator circuitry are activated (if DISABLE is low). The slow start circuitry gradually brings up the current
delivered to the laser diode. From the time that V
CC
reaches ~2.8 V to when the modulation current and bias
current reach 95% of their steady state value, is considered the initialization time. If DISABLE is asserted during
power on, the slow start circuitry will not activate until DISABLE is negated.
The fault detection circuitry monitors the operation of the ONET4201LD. If FLTMODE is set to a low level,
(hard-fault mode) this circuitry will disable the bias and modulation circuits and latch the SDOWN output upon
detection of a fault. The fault mode is reset by toggling DISABLE (for a minimum time of T
RES
) or by toggling V
CC
.
Once DISABLE is toggled, SDOWN is set low and the circuit is re-initialized.
If FLTMODE is set to a high level (soft-fault mode), a fault will be indicated at the SDOWN output, however the
bias and modulation circuits are not disabled. The SDOWN output is reset once the fault causing condition
disappears. Toggling DISABLE or VCC is not required.
A functional representation of the fault detection circuitry is shown in
Figure 2
.
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MODTC
IBMAX
IBEN
SDOWN
IMODEN
VCC
2.8 V
MONB
MONP
IPD
IBIAS/68
MODSET
APCSET
DISABLE
R
Q
S
flipflop
START
TREScounter
RES
comparator
1.25 V
short circuit
to VCC or
GND detect
MODTC
IBMAX
APCSET
MODSET
SHORT
MUX
I0
I1
Q
CMOS buffer
FLTMODE
MUX
I1
I0
Q
inverter
inverter
ONET4201LD
SLLS677 NOVEMBER 2005
DETAILED DESCRIPTION (continued)
Figure 2. Functional Representation of the Fault Detection Circuitry
A fault mode will be produced if the laser cathode is grounded and the photocurrent causes MONP to exceed its
programmed threshold. Another fault mode can be produced if the laser diode end of life conditions causes
excessive bias current and photocurrent that results in monitor voltages (MONP, MONB) being greater than their
programmed threshold. Other fault modes can occur if there are any I/O pin single point failures (short to V
CC
or
GND) and the monitor voltages exceed their programmed threshold (see
Table 1
).
Table 1. Response to I/O-Pin Shorts to VCC or GND
FLTMODE = LOW
FLTMODE = HIGH
PIN
Response to Short to GND
Response to Short to V
CC
Response to Short to GND
Response to Short to V
CC
DIN+
No fault, I
MOD
disabled
No fault
No fault, I
MOD
disabled
No fault
DIN
No fault, I
MOD
disabled
No fault
No fault, I
MOD
disabled
No fault
MONP
No fault
SDOWN latched high, I
BIAS
No fault
SDOWN high, I
BIAS
and I
MOD
and I
MOD
disabled
unaffected
MONB
No fault
SDOWN latched high, I
BIAS
No fault
SDOWN high, I
BIAS
and I
MOD
and I
MOD
disabled
unaffected
DISABLE
Normal circuit operation
Normal circuit operation
Normal circuit operation
Normal circuit operation
SDOWN
No fault
No fault
No fault
No fault
OUTPOL
No fault, polarity reverses
No fault
No fault, polarity reverses
No fault
BIAS
SDOWN latched high, I
MOD
No fault, I
BIAS
goes to zero
SDOWN high, I
MOD
No fault, I
MOD
unaffected
disabled
unaffected
MOD+
SDOWN latched high, I
BIAS
and
No fault
SDOWN high, I
BIAS
No fault
I
MOD
disabled
unaffected
MOD
SDOWN latched high, I
BIAS
and
No fault
SDOWN high, I
BIAS
No fault
I
MOD
disabled
unaffected
PD
No fault, I
MOD
unaffected
No fault, I
BIAS
goes to zero
No fault, I
MOD
unaffected
No fault, I
BIAS
goes to zero
CAPC
No fault
No fault, I
BIAS
goes to zero
No fault, I
MOD
unaffected
No fault, I
BIAS
goes to zero
MODTC
SDOWN latched high, I
BIAS
and
No fault
SDOWN high, I
BIAS
and I
MOD
No fault
I
MOD
disabled
unaffected
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PACKAGE
GND
VCC
DIN+
DIN
GND
VCC
VCC
GND
MOD
MOD+
VCC
BIAS
ONET4201LD
24 Lead QFN
APCSET
DISABLE
OUTPOL
IBMAX
CAPC
PD
MONB
MONP
SDOWN
MODSET
MODTC
FL
TMODE
2
1
3
4
5
6
17
18
16
15
14
13
8
7
9
10 11 12
23
24
22 21 20 19
ONET4201LD
SLLS677 NOVEMBER 2005
DETAILED DESCRIPTION (continued)
Table 1. Response to I/O-Pin Shorts to VCC or GND (continued)
FLTMODE = LOW
FLTMODE = HIGH
PIN
Response to Short to GND
Response to Short to V
CC
Response to Short to GND
Response to Short to V
CC
APCSET
SDOWN latched high, I
BIAS
and
No fault, I
MOD
unaffected
SDOWN high, I
BIAS
and I
MOD
No fault
I
MOD
disabled
unaffected
MODSET
SDOWN latched high, I
BIAS
and
No fault, disables I
MOD
SDOWN high, I
BIAS
No fault, disables I
MOD
I
MOD
disabled
unaffected
IBMAX
SDOWN latched high, I
BIAS
and
SDOWN latched high, I
BIAS
SDOWN high, I
MOD
SDOWN high, I
MOD
unaffected
I
MOD
disabled
and I
MOD
disabled
unaffected
For the ONET4201LD, a small footprint 4 mm
4 mm 24-lead QFN package is used, with a lead pitch of 0,5
mm. The pin out is shown in
Figure 3
.
In order to achieve the required low thermal resistance of about 38 K/W, which keeps the maximum junction
temperature below 115
C, a good thermal connection of the exposed die pad is mandatory.
Figure 3. Pinout of the ONET4201LD in a 4 mm
4 mm 24-Lead QFN Package (Top View)
TERMINAL FUNCTIONS
TERMINAL
I/O
DESCRIPTION
NO.
NAME
1, 6, 18, EP
GND
Supply
Circuit ground. The exposed die pad (EP) must be grounded.
2, 5, 14, 17
VCC
Supply
3.3 V
10% supply voltage
3
DIN+
CML-in
Non-inverted data input. On-chip 50-
terminated to VCC.
4
DIN
CML-in
Inverted data input. On-chip 50-
terminated to VCC.
7
MONP
Analog-out
Photodiode current monitor sources a current identical to the photodiode current
8
MONB
Analog-out
Bias current monitor sources 1/68 of the bias current
9
SDOWN
LVTTL-out
Fault detection flag
10
FLTMODE
CMOS-in
Fault mode selection input. If a low level is applied to this pin, any fault event is latched and the
bias and modulation currents are disabled in a fault condition. Toggling of DISABLE or VCC
resets the fault condition. If pin is set to a high level, fault events are flagged at the SDOWN
output but not latched. The bias and modulation currents are not disabled. SDOWN is reset
once the fault condition disappears.
11
MODSET
Analog-in
Set temperature independent modulation current with resistor to GND.
12
MODTC
Analog-in
Set modulation current temperature compensation with resistor to GND.
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ABSOLUTE MAXIMUM RATINGS
ONET4201LD
SLLS677 NOVEMBER 2005
TERMINAL FUNCTIONS (continued)
TERMINAL
I/O
DESCRIPTION
NO.
NAME
13
BIAS
Analog-out
Laser diode bias current sink. Connect to laser cathode.
15
MOD+
Analog-out
Laser modulation current output. Connect to laser cathode. Avoid usage of vias on board.
16
MOD
Analog-out
Complementary laser modulation current output. Connect to VCC adjacent to anode of laser
diode. Avoid usage of vias on board.
19
PD
Analog-in
Monitor photodiode input. Connect to photodiode anode for APC. Sinks the photodiode current
to GND.
20
CAPC
Analog
APC loop capacitor
21
IBMAX
Analog-in
Set maximum laser diode current with resistor to GND.
22
OUTPOL
LVTTL-in
Alters modulation current output polarity. Open or high: normal polarity, low: inverted polarity.
OUTPOL is pulled up internally. Normal polarity: when DIN+ is high current is sunk into MOD+.
23
APCSET
Analog-in
Set photodiode reference current with resistor to GND.
24
DISABLE
LVTTL-in
Disable modulation and bias current outputs.
over operating free-air temperature range (unless otherwise noted)
(1)
VALUE
UNIT
V
CC
Supply voltage
(2)
0.3 to 4
V
I
IBIAS
Current into BIAS
20 to 120
mA
I
IMOD+
, I
IMOD
Current into MOD+, MOD
20 to 120
mA
I
PD
Current into PD
5 to 5
mA
V
DIN+
, V
DIN,
V
DISABLE
,
Voltage at DIN+, DIN, DISABLE, MONB, MONP, FLTMODE, SDOWN
(2)
0.3 to 4
V
V
MONB
, V
MONP
, V
FLTMODE
,
V
SDOWN
V
CAPC
, V
IBMAX
, V
MODSET
,
Voltage at CAPC, IBMAX, MODSET, APCSET, MODTC
(2)
0.3 to 3
V
V
APCSET
, V
MODTC
V
MOD+
, V
MOD-
Voltage at MOD+, MOD
(2)
0.6 to VCC+1.5
V
V
BIAS
Voltage at BIAS
(2)
1 to 3.5
V
ESD rating at all pins except MOD+, MOD
2
ESD
kV (HBM)
ESD rating at MOD+, MOD-
1
T
J,max
Maximum junction temperature
150
C
T
STG
Storage temperature range
65 to 150
C
T
A
Characterized free-air operating temperature range
40 to 85
C
T
LEAD
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds
260
C
(1)
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolutemaximumrated conditions for extended periods may affect device reliability.
(2)
All voltage values are with respect to network ground terminal.
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RECOMMENDED OPERATING CONDITIONS
DC ELECTRICAL CHARACTERISTICS
AC ELECTRICAL CHARACTERISTICS
ONET4201LD
SLLS677 NOVEMBER 2005
over operating free-air temperature range (unless otherwise noted)
MIN
NOM
MAX
UNIT
V
CC
Supply voltage
3
3.3
3.6
V
T
A
Operating free-air temperature
40
85
C
over recommended operating conditions (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
V
CC
Supply voltage
3
3.3
3.6
V
I
MOD
= 30 mA, I
BIAS
= 20 mA (excluding I
MOD
, I
BIAS
)
32
mA
I
VCC
Supply current
I
MOD
= 60 mA, I
BIAS
= 100 mA (excluding I
MOD
, I
BIAS
)
55
mA
I
BIAS
Bias current range
100
mA
I
BIAS-OFF
Bias off-current
DISABLE = high or hard-fault mode; V
BIAS
3.5 V
25
A
Bias overshoot
During module hot plugging. V
CC
turn on time must be
10%
0.8 s
Bias current temperature
APC open loop
480
480
ppm/
C
stability
Bias current absolute
I
BIAS
1 mA
15%
15%
accuracy
(1)
I
BIAS
= 1 mA, T
A
= 25
C
15%
Bias current monitor gain
I
BIAS
/I
MONB
68
mA/ mA
MONB and MONP threshold
A fault is never detected for V
MONB/P
1 V and a fault
1
1.25
1.35
V
range
always occurs for V
MONB/P
1.35 V
PD current monitor gain
I
PD
/I
MONP
1
mA/mA
V
ID
Differential input signal
200
1600
mVp-p
SDOWN output high voltage
I
OH
= 100
A sourcing
2.4
V
SDOWN output low voltage
I
OL
= 1 mA sinking
0.4
V
DISABLE input impedance
4.7
7.4
10
k
DISABLE input high voltage
2
V
DISABLE input low voltage
0.8
V
V
PD
Monitor diode voltage
1.6
V
Monitor diode dc current range
18
1500
A
(1)
Absolute accuracy refers to part-to-part variation.
Typical operating condition is at V
CC
= 3.3 V, I
MOD
= 30 mA, I
BIAS
= 20 mA and T
A
= 25
C,
over recommended operating conditions (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Data Rate
4.25
Gbps
I
MOD
Modulation current range
Current into MOD+/MOD pin;
5
85
mA
V
MOD+
, V
MOD
0.6 V
I
MOD-
Modulation off-current
DISABLE = high or hard-fault occurred
25
A
OFF
Modulation current stability
600
600
ppm/
C
I
MOD
= 10 mA
40%
Modulation current absolute
I
MOD
= 50 mA
25%
accuracy
(1)
I
MOD
= 80 mA
20%
(1)
Absolute accuracy refers to part-to-part variation.
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www.ti.com
V
HIGH
t
V
LOW
DISABLE
I
MOD
I
MOD-OFF
I
MOD
I
BIAS
I
BIAS-OFF
I
BIAS
t
t
T
OFF
t
V
HIGH
V
LOW
SDOWN
V
HIGH
t
V
LOW
DISABLE
I
MOD
I
MOD-OFF
I
MOD
I
BIAS
I
BIAS-OFF
I
BIAS
t
t
T
ON
t
V
HIGH
V
LOW
SDOWN
V
HIGH
t
V
LOW
DISABLE
I
MOD
I
MOD-OFF
I
MOD
I
BIAS
I
BIAS-OFF
I
BIAS
t
t
T
ON
t
V
HIGH
V
LOW
SDOWN
T
RESET
T
RESET
ONET4201LD
SLLS677 NOVEMBER 2005
AC ELECTRICAL CHARACTERISTICS (continued)
Typical operating condition is at V
CC
= 3.3 V, I
MOD
= 30 mA, I
BIAS
= 20 mA and T
A
= 25
C,
over recommended operating conditions (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
R
MODTC
= 3.125 k
8300
Modulation current
ppm/
C
temperature compensation
(2)
R
MODTC
= Open
630
t
r
Output rise time (20% to 80%)
V
MOD+
1 V, V
MOD
1 V, I
MOD
= 30 mA
55
75
ps
t
f
Output fall time (20% to 80%)
V
MOD+
1 V, V
MOD
1 V, I
MOD
= 30 mA
55
75
ps
T
OFF
Disable assert time (see
Figure 4
)
Time from rising edge of DISABLE to when output
0.06
5
s
currents fall below the max limits of I
MOD-OFF
and
I
BIAS-OFF
T
ON
Disable negate time (see
Figure 5
)
Time from falling edge of DISABLE to when output
200
s
is 90% of nominal
T
INIT
Time to initialize
From power on or negation of SDOWN using
200
s
DISABLE
T
FAULT
Fault assert time
Time from fault to SDOWN rising edge
3.3
50
s
Maximum spike pulse length at DISABLE being
10
s
ignored
T
RESET
DISABLE reset (see
Figure 6
)
Time DISABLE needs to be high to reset SDOWN
20
s
Output overshoot/undershoot
13.5%
13.5%
Random jitter
I
MOD
= 60 mA
0.6
0.9
ps
RMS
10 mA
I
MOD
60 mA, with K28.5 pattern
15
30
ps
p-p
at 4.25 Gbps
10 mA
I
MOD
60 mA, with 2
23
1 PRBS or
13
32
ps
p-p
DJ
Deterministic jitter
(3)
equivalent pattern at 2.67 Gbps
K28.5 pattern at 1.06 Gbps
5
ps
p-p
2
23
1 PRBS or equivalent pattern at 155 Mbps
10
ps
p-p
(2)
For a given external resistor connected to the MODTC pin, the modulation current temperature compensation will vary due to
part-to-part variations.
(3)
Jitter measured at positive edge and negative edge crossing of eye diagram.
Figure 4. DISABLE Assert Time
Figure 5. DISABLE Negate Time
Figure 6. SDOWN Reset Time
TOFF
TON
TRESET
9
www.ti.com
TYPICAL CHARACTERISTICS
Time [50ps/Div]
Single-Ended Output V
oltage
[50mV/Div]
Time [100ps/Div]
Single-Ended Output V
oltage
[50mV/Div]
Time [100ps/Div]
Single-Ended Output V
oltage
[50mV/Div]
Time [200ps/Div]
Single-Ended Output V
oltage
[50mV/Div]
Time [200ps/Div]
Single-Ended Output V
oltage
[50mV/Div]
Deterministic Jitter including PWD [ps
p-p
]
0
30
60
50
40
20
10
55
60
10
15
20
25
30
40
45
50
55
Modulation Current [mA]
0
1.5
3.0
2.5
2.0
1.0
0.5
10
90
-40
-30
-20
-10
0
50
60
70
80
40
30
20
Random Jitter [ps
RMS
]
0
1.5
3.0
2.5
2.0
1.0
0.5
10
90
-40
-30
-20
-10
0
50
60
70
80
40
30
20
Temperature [
5
C]
0
1.5
3.0
2.5
2.0
1.0
0.5
55
60
10
15
20
25
30
40
45
50
55
Random Jitter [ps
RMS
]
0
1.5
3.0
2.5
2.0
1.0
0.5
55
60
10
15
20
25
30
40
45
50
55
Modulation Current [mA]
ONET4201LD
SLLS677 NOVEMBER 2005
Typical operating condition is at V
CC
= 3.3 V, I
MOD
= 30 mA, I
BIAS
= 20 mA and T
A
= 25
C (unless otherwise noted)
ELECTRICAL EYE-DIAGRAM AT 4.25 Gbps
ELECTRICAL EYE-DIAGRAM AT 2.125 Gbps
WITH K28.5 PATTERN, I
MOD
= 30 mA
WITH K28.5 PATTERN, I
MOD
= 30 mA
Figure 7.
Figure 8.
ELECTRICAL EYE-DIAGRAM AT 1.0625 Gbps
DETERMINISTIC JITTER
WITH K28.5 PATTERN, I
MOD
= 30 mA
vs
MODULATION CURRENT
Figure 9.
Figure 10.
RANDOM JITTER
RANDOM JITTER
vs
vs
MODULATION CURRENT
TEMPERATURE
Figure 11.
Figure 12.
10
www.ti.com
20
50
80
70
60
40
30
55
60
10
15
20
25
30
40
45
50
55
Rise Time
Fall Time
Rise Time and Fall Time [ps]
20
50
80
70
60
40
30
55
60
10
15
20
25
30
40
45
50
55
Modulation Current [mA]
Rise Time
Fall Time
10
13
20
15
14
12
11
16
17
18
19
55
60
10
15
20
25
30
40
45
50
55
Bias Monitor Current Gain [mA/A]
10
13
20
15
14
12
11
16
17
18
19
55
60
10
15
20
25
30
40
45
50
55
Bias Current [mA]
0
60
120
100
80
40
20
50
100
0
10
20
30
40
60
70
80
90
I
BIAS
[mA]
0
60
120
100
80
40
20
50
100
0
10
20
30
40
60
70
80
90
R
BIASMAX
[k
]
0
60
100
90
80
40
20
50
70
30
10
50
100
0
10
20
30
40
60
70
80
90
I
MOD
[mA]
0
60
100
90
80
40
20
50
70
30
10
50
100
0
10
20
30
40
60
70
80
90
R
MODSET
[k
]
ONET4201LD
SLLS677 NOVEMBER 2005
TYPICAL CHARACTERISTICS (continued)
Typical operating condition is at V
CC
= 3.3 V, I
MOD
= 30 mA, I
BIAS
= 20 mA and T
A
= 25
C (unless otherwise noted)
RISE TIME AND FALL TIME
BIAS-MONITOR CURRENT GAIN I
MONB
/I
BIAS
vs
vs
MODULATION CURRENT
BIAS CURRENT I
BIAS
Figure 13.
Figure 14.
BIAS CURRENT I
BIAS
IN OPEN LOOP MODE
MODULATION CURRENT I
MOD
vs
vs
EXTERNAL RESISTOR R
BIASMAX
EXTERNAL RESISTOR R
MODSET
Figure 15.
Figure 16.
11
www.ti.com
Photodiode Monitor Gain [mA/mA]
0
1.5
3.0
2.5
2.0
1.0
0.5
10
90
-40
-30
-20
-10
0
50
60
70
80
40
30
20
Temperature [
5
C]
I
PD
[mA]
0.0
1.2
1.8
1.6
1.4
0.8
0.4
1.0
0.6
0.2
50
100
0
10
20
30
40
60
70
80
90
R
APCSET
[k
]
Bias Current Monitor Gain [mA/A]
10
14
20
18
16
12
10
90
-40
-30
-20
-10
0
50
60
70
80
40
30
20
Temperature [
5
C]
Supply Current [mA]
10
30
80
70
50
20
60
40
10
90
-40
-30
-20
-10
0
50
60
70
80
40
30
20
Temperature [
5
C]
Time [500ns/Div]
V
SDOWN
V
DISABLE
I
MOD+
I
BIAS
t = 2.21
s
Time [100
m
s/Div]
V
SDOWN
V
DISABLE
I
MOD+
I
BIAS
t = 240
s
Time [100
m
s/Div]
V
SDOWN
V
DISABLE
I
MOD+
I
BIAS
t = 240
s
ONET4201LD
SLLS677 NOVEMBER 2005
TYPICAL CHARACTERISTICS (continued)
Typical operating condition is at V
CC
= 3.3 V, I
MOD
= 30 mA, I
BIAS
= 20 mA and T
A
= 25
C (unless otherwise noted)
MONITOR DIODE CURRENT I
PD
PHOTO DIODE MONITOR GAIN I
MONP
/I
PD
vs
vs
EXTERNAL RESISTOR R
APCSET
TEMPERATURE
Figure 17.
Figure 18.
BIAS CURRENT MONITOR GAIN I
MONB
/I
BIAS
SUPPLY CURRENT (excl. I
MOD
and I
BIAS
)
vs
vs
TEMPERATURE
TEMPERATURE
Figure 19.
Figure 20.
DISABLE ASSERT TIME T
OFF
DISABLE NEGATE TIME T
ON
Figure 21.
Figure 22.
12
www.ti.com
Time [5
m
s/Div]
V
SDOWN
V
DISABLE
I
MOD+
I
BIAS
t = 12.8
s
ONET4201LD
SLLS677 NOVEMBER 2005
TYPICAL CHARACTERISTICS (continued)
Typical operating condition is at V
CC
= 3.3 V, I
MOD
= 30 mA, I
BIAS
= 20 mA and T
A
= 25
C (unless otherwise noted)
SHUTDOWN RESET TIME T
RESET
Figure 23.
13
www.ti.com
APPLICATION INFORMATION
VCC
DIN+
DIN
OUTPOL
MONP
FLTMODE
DISABLE
SDOWN
MONB
R
MONP
R
MONB
R
MODSET
R
MONTC
R
APCSET
R
BIASMAX
20
W
R
D
Laser-
diode
Monitor
Photodiode
C
APC
MONB
DIN+
DIN
MONP
MOD+
MOD
BIAS
PD
CAPC
OUTPOL
APCSET
DISABLE
VCC
GND
VCC
VCC
GND
VCC
GND
IBMAX
MODTC
MODSET
FL
TMODE
SDOWN
ONET4201LD
24 Lead QFN
SELECT A LASER
SELECT APCSET RESISTOR
I
PD
[A]
+
P
AVG
[W]
MON
[A W]
(7)
R
APCSET
[
W
]
+
4.69 V
I
PD
[A]
+
4.69 V
P
AVG
[W]
MON
[A W]
(8)
ONET4201LD
SLLS677 NOVEMBER 2005
Figure 24
shows the ONET4201LD connected with a dc-coupled interface to the laser diode, alternatively the
ONET4201LD laser driver can be ac-coupled.
Figure 24. Basic Application Circuit With DC-Coupled Interface Between
the ONET4201LD and the Laser Diode
APC loop instability may occur with large inductive loading on the BIAS pin. To ensure loop stability in this case,
it is recommended to connect a 1-nF capacitor to ground at the BIAS pin.
In the design example according to
Figure 24
, the ONET4201LD is dc coupled to a typical communication-grade
laser diode capable of operating at 4.25 Gb/s with the following specifications shown in
Table 2
.
Table 2. Laser Diode Specifications
PARAMETER
VALUE
UNITS
Wavelength
1310
nm
P
AVG
Average Optical Output Power
5
mW
I
TH
Threshold current
10
mA
MON
Laser to Monitor Transfer
0.05
mA/mW
Laser Slope Efficiency
0.2
mW/mA
When the APC loop is activated, the desired average optical output power P
AVG
is defined by characteristics of
the monitor diode and by the APCSET resistor R
APCSET
. The relation between the monitor photodiode current IPD
and the average optical output power P
AVG
is given by
Equation 7
:
The R
APCSET
resistor is calculated by
Equation 8
:
14
www.ti.com
R
APCSET
[
W
]
+
4.69 V
P
AVG
[W]
MON
[A W]
+
4.69 V
5 mW
0.05 mA mW
+
18.75 k
W
(9)
SELECT MODSET RESISTOR
I
MOD
[A]
+
Pp
*
p[W]
h
[W A]
+
2
P
AVG
[W]
re
*
1
re
)
1
h
[W A]
(10)
I
MOD
+
2
5 mW
6.3
*
1
6.3
)
1
0.2 mW mA
+
36.3 mA
(11)
I
MOD
[A]
+
I
MOD0
[A]
1
)
TC
T[
o
C]
*
T
0
[
o
C]
(12)
R
MODSET
[
W
]
+
265 V
I
MOD
[A]
1
)
TC
T[
o
C]
*
T
0
[
o
C]
(13)
R
MODSET
[
W
]
+
265 V
36.3 mA
1
)
4000 ppm
o
C
(25
o
C
*
60
o
C)
+
6.3 k
W
(14)
SELECT MODTC RESISTOR
TC
LD
1
o
C
+
h
2
[W A]
* h
1
[W A]
h
1
[W A]
T
2
[
o
C]
*
T
1
[
o
C]
10
6
(15)
ONET4201LD
SLLS677 NOVEMBER 2005
For the laser diode specified in
Table 2
and the desired average optical output power of 5 mW, R
APCSET
is
calculated as seen in
Equation 9
:
Note that the monitor photodiode current I
PD
must not exceed 1.5 mA corresponding to a minimum APCSET
resistor R
APCSET,MIN
= 3.1 k
.
In dependence of the required optical output peak-to-peak power P
p-p
, or the average optical power P
AVG
the
necessary modulation current I
MOD
can be calculated using the laser slope efficiency
and the desired extinction
ratio r
e
:
Using the laser diode parameters from
Table 2
and assuming an extinction ratio r
e
= 8 dB (
6.3) for an average
optical power P
AVG
= 5 mW the required modulation current results as:
The modulation current is adjustable with a selectable temperature coefficient TC according to the relation:
Where T is the ambient temperature in
C and T
0
is the reference temperature (T
0
= 60
C).
The temperature coefficient of the modulation current TC is typically adjustable between 630 ppm/
C and 8300
ppm/
C.
For calculation of the required external resistor R
MODSET
for a given modulation current and a given temperature,
the formula can be modified as follows:
If 4000 ppm/
C is the desired temperature coefficient and the modulation current from the example above, 36.3
mA, is required at a temperature of 25
C, the MODSET resistor R
MODSET
is given by
Equation 14
.
Note that the modulation current I
MOD
must not exceed 85 mA over the complete temperature range
corresponding to a minimum MODSET resistor R
MODSET,MIN
= 3.1 k
.
The R
MODTC
resistor is used to program a modulation temperature coefficient that can be used to compensate for
the decreased slope efficiency of the laser at a higher temperature. The temperature coefficient TC
LD
of the laser
can be calculated using the slope efficiency
1
at temperature T
1
and
2
at temperature T
2
as shown in
Equation 15
:
As an example, for the laser in
Table 2
, the slope efficiency at temperature T
1
= 25
C is
1
= 0.2 mW/mA. At
temperature T
2
= 85
C the slope efficiency is
2
= 0.15 mW/mA. The corresponding temperature coefficient TC
LD
laser can be calculated:
15
www.ti.com
TC
LD
+
0.15 mW mA
*
0.2 mW mA
0.2 mW mA
(85
o
C
*
25
o
C)
10
6
+ *
4167 1
o
C
(16)
R
MODTC
+
24
W
(TC
*
630 ppm) 1
o
C
o
C
(17)
R
MODTC
+
24
W
4167 ppm
*
630 ppm
o
C
o
C
+
6.8 k
W
(18)
SELECT BIASMAX RESISTOR
I
BIASMAX
[A]
+
I
THMAX
[A]
(19)
R
BIASMAX
[
W
]
+
343 V
I
BIASMAX
[A]
+
343 V
I
THMAX
[A]
(20)
R
BIASMAX
+
343 V
40 mA
+
8.6 k
W
(21)
SELECT V
MONB
AND V
MONP
RANGE
V
MONB
[V]
+
R
MONB
[
W
]
I
BIAS
[A]
68
+
768
W
I
BIAS
[A]
68
+
11.29
W
I
BIAS
[A]
(22)
V
MONP
[V]
+
R
MONP
[
W
]
I
PD
[A]
+
200
W
I
PD
[A]
(23)
LASER DIODE INTERFACE
ONET4201LD
SLLS677 NOVEMBER 2005
The MODTC resistor R
MODTC
can be used to compensate the laser temperature coefficient TC
LD
in order to
maintain the same optical output swing within a range of 630 ppm up to 8300 ppm. For this, R
MODTC
may be
programmed as follows:
To compensate for the decreased slope efficiency of the laser in
Table 2
, T
C
needs to be 4167 ppm/
C.
This leads to the following MODTC resistor R
MODTC
:
The BIASMAX resistor R
BIASMAX
is used to limit the bias current applied to the laser diode.
To calculate R
BIASMAX
, the maximum threshold current at 85
C and end of life must be determined. The
maximum bias current for the dc-coupled interface can be approximated by
Equation 19
.
R
BIASMAX
can be set by the
Equation 20
.
For the example laser diode, the maximum threshold current is 40 mA at 85
C. Therefore, R
BIASMAX
can be
approximated by
Equation 21
.
Monitoring the bias current is achieved by taking the fractional (1/68) bias current and developing a voltage
across an external resistor to ground.
Equation 22
provides the value for V
MONB
for a resistor value equal to
768
.
Monitoring of the photo current is achieved by taking a mirror of I
PD
and developing a voltage across an external
resistor to ground.
Equation 23
provides the value for V
MONP
for a resistor equal to 200
.
The output stage of the ONET4201LD is optimized for driving a 20-
load. The combination of a dampening
resistor, R
D
, along with the resistance of the laser diode needs to be 20
for impedance matching. The
suggested typical values for R
D
is 6
to 15
. A bypass capacitor of 10 nF placed close to the laser anode will
also help to optimize performance.
16
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package
Type
Package
Drawing
Pins Package
Qty
Eco Plan
(2)
Lead/Ball Finish
MSL Peak Temp
(3)
ONET4201LDRGER
ACTIVE
QFN
RGE
24
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
ONET4201LDRGET
ACTIVE
QFN
RGE
24
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco
Plan
-
The
planned
eco-friendly
classification:
Pb-Free
(RoHS)
or
Green
(RoHS
&
no
Sb/Br)
-
please
check
http://www.ti.com/productcontent
for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
PACKAGE OPTION ADDENDUM
www.ti.com
21-Nov-2005
Addendum-Page 1
IMPORTANT NOTICE
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