FEATURES
D
SUPERIOR SOUND QUALITY
D
ULTRA LOW DISTORTION: 0.000022%
D
LOW NOISE: 1.3nV/
Hz
D
HIGH SPEED:
- Slew Rate: 50V/
s
- Gain Bandwidth: 180MHz
D
FULLY DIFFERENTIAL ARCHITECTURE:
- Balanced Input and Output Converts
Single-Ended Input to
Balanced
Differential Output
D
WIDE SUPPLY RANGE:
2.5V to
16V
D
SHUTDOWN TO CONSERVE POWER
APPLICATIONS
D
AUDIO ADC DRIVER
D
BALANCED LINE DRIVER
D
BALANCED RECEIVER
D
ACTIVE FILTER
D
PREAMPLIFIER
DESCRIPTION
The OPA1632 is a fully-differential amplifier designed
for driving high-performance audio analog-to-digital
converters (ADCs). It provides the highest audio quality,
with very low noise and output drive characteristics
optimized for this application. The OPA1632's excellent
gain bandwidth of 180MHz and very fast slew rate of
50V/
s produce exceptionally low distortion. Very low
input noise of 1.3nV/
Hz further ensures maximum
signal-to-noise ratio and dynamic range.
The flexibility of the fully differential architecture allows
for easy implementation of a single-ended to
fully-differential output conversion. Differential output
reduces even-order harmonics and minimizes
common-mode noise interference. The OPA1632
provides excellent performance when used to drive
high-performance audio ADCs such as the PCM1804.
A shutdown feature also enhances the flexibility of this
amplifier.
The OPA1632 is available in an SO-8 package and a
thermally-enhanced MSOP-8 PowerPAD package.
RELATED DEVICES
OPAx134
High-Performance Audio Amplifiers
OPA627/637
Precision High-Speed DiFET Amplifiers
OPAx227/x228
Low-Noise Bipolar Amplifiers
Typical ADC Circuit
THD + NOISE vs FREQUENCY
1000
10
100
10k
100k
Frequency (Hz)
TH
D
+
N
o
i
s
e
(
%)
0.001
0.0001
0.00001
Gain = +1
R
F
= 348
V
O
= 3Vrms
Differential I/O
R
L
= 600
R
L
= 2k
+15V
Digital
Output
-
15V
V
OCM
V
COM
V
IN+
V
IN
-
V
IN
-
V
IN
+
PowerPAD is a trademark of Texas Instruments. All other trademarks are the property of their respective owners.
OPA1632
SBOS286 - DECEMBER 2003
High-Perfomance, Fully-Differential
AUDIO OP AMP
PRODUCTION DATA information is current as of publication date. Products
conform to specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all parameters.
www.ti.com
Copyright
2003, Texas Instruments Incorporated
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments
semiconductor products and disclaimers thereto appears at the end of this data sheet.
OPA1632
SBOS286 - DECEMBER 2003
www.ti.com
2
PACKAGE/ORDERING INFORMATION
PRODUCT
PACKAGE-LEAD(1)
PACKAGE
DRAWING
SPECIFIED
TEMPERATURE
RANGE
PACKAGE
MARKING
ORDERING
NUMBER
TRANSPORT
MEDIA, QUANTITY
SO-8
D
-40
C to +85
C
OPA1632
OPA1632D
Rails, 100
OPA1632
SO-8
D
-40
C to +85
C
OPA1632
OPA1632DR
Tape and Reel, 2500
OPA1632
MSOP-8
DGN
-40
C to +85
C
1632
OPA1632DGN
Rails, 100
MSOP-8
PowerPAD
DGN
-40
C to +85
C
1632
OPA1632DGNR
Tape and Reel, 2500
(1) For the most current specification and package information, refer to our web site at www.ti.com.
ABSOLUTE MAXIMUM RATINGS
(1)(2)
over operating free-air temperature range unless otherwise noted.
Supply Voltage,
VS
16.5V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input Voltage, VI
VS
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output Current, IO
150mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Differential Input Voltage, VID
3V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum Junction Temperature, TJ
150
C
. . . . . . . . . . . . . . . . . . . . . . . . . .
Operating Free-Air Temperature Range
-40
C to +85
C
. . . . . . . . . . . . . . .
Storage Temperature Range, TSTG
-65
C to +150
C
. . . . . . . . . . . . . . . . .
Lead Temperature
1,6mm (1/16th inch) from case for 10 seconds
+300
C
. . . . . . . . . . . . . . . .
ESD Ratings: Human Body Model
1kV
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Charge Device Model
500V
. . . . . . . . . . . . . . . . . . . . . . . . . . .
Machine Model
200V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(1) Stresses above these ratings may cause permanent damage.
Exposure to absolute maximum conditions for extended periods
may degrade device reliability. These are stress ratings only, and
functional operation of the device at these or any other conditions
beyond those specified is not implied.
(2) The OPA1632 MSOP-8 package version incorporates a
PowerPAD on the underside of the chip. This acts as a heatsink
and must be connected to a thermally dissipative plane for proper
power dissipation. Failure to do so may result in exceeding the
maximum junction temperature, which can permanently damage
the device. See TI technical brief SLMA002 for more information
about using the PowerPAD thermally enhanced package.
This integrated circuit can be damaged by ESD. Texas
Instruments recommends that all integrated circuits be
handled with appropriate precautions. Failure to observe
proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to
complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could
cause the device not to meet its published specifications.
PIN CONFIGURATION
Top View
MSOP, SO
1
2
3
4
8
7
6
5
V
IN+
Enable
V
-
V
OUT
-
V
IN
-
V
OCM
V+
V
OUT+
OPA1632
OPA1632
SBOS286 - DECEMBER 2003
www.ti.com
3
ELECTRICAL CHARACTERISTICS: V
S
=
15V
VS =
15V: RF = 390
, RL = 800
, and G = +1, unless otherwise noted.
OPA1632
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
OFFSET VOLTAGE
Input Offset Voltage
0.5
3
mV
vs Temperature
dVos/dT
5
V/
_
C
vs Power Supply, DC
PSRR
316
13
V/V
INPUT BIAS CURRENT
Input Bias Current
IB
2
6
A
Input Offset Current
IOS
100
500
nA
NOISE
Input Voltage Noise
f = 10 kHz
1.3
nV/
Hz
Input Current Noise
f = 10 kHz
0.4
pA/
Hz
INPUT VOLTAGE
Common-Mode Input Range
(V-) + 1.5
(V+) - 1
V
Common-Mode Rejection Ratio, DC
74
90
dB
INPUT IMPEDANCE
Input Impedance (each input pin)
34 || 4
M
|| pF
OPEN-LOOP GAIN
Open-Loop Gain , DC
66
78
dB
FREQUENCY RESPONSE
Small-Signal Bandwidth
G = +1, RF= 348
180
MHz
(VO = 100mVPP, Peaking < 0.5 dB)
G = +2, RF = 602
90
MHz
G = +5, RF = 1.5k
36
MHz
G = +10, RF = 3.01k
18
MHz
Bandwidth for 0.1dB Flatness
G = +1, VO = 100mVPP
40
MHz
Peaking at a Gain of 1
VO = 100mVPP
0.5
dB
Large-Signal Bandwidth
G = +2, VO = 20VPP
800
kHz
Slew Rate (25% to 75% )
G = +1
50
V/
s
Rise and Fall Time
G = +1, VO = 5V Step
100
ns
Settling Time to 0.1%
G = +1, VO = 2V Step
75
ns
0.01%
G = +1, VO = 2V Step
200
ns
Total Harmonic Distortion + Noise
G = +1, f = 1kHz, VO = 3Vrms
Differential Input/Output
RL = 600
0.0003
%
Differential Input/Output
RL = 2k
0.000022
%
Single-Ended In/Differential Out
RL = 600
0.000059
%
Single-Ended In/Differential Out
RL = 2k
0.000043
%
Intermodulation Distortion
G = +1, SMPTE/DIN, VO = 2VPP
Differential Input/Output
RL = 600
0.00008
%
Differential Input/Output
RL = 2k
0.00005
%
Single-Ended In/Differential Out
RL = 600
0.0001
%
Single-Ended In/Differential Out
RL = 2k
0.0007
%
Headroom
THD < 0.01%, RL = 2k
20.0
VPP
OUTPUT
Voltage Output Swing
RL = 2k
(V+) - 1.9
(V-) + 1.9
V
RL = 800
(V+) - 4.5
(V-) + 4.5
V
Short-Circuit Current
ISC
Sourcing/Sinking
+50/-60
85
mA
Closed-Loop Output Impedance
G = +1, f = 100kHz
0.3
POWER-DOWN(1)
Enable Voltage Threshold
(V-) + 2
V
Disable Voltage Threshold
(V-) + 0.8
V
Shutdown Current
VENABLE = -15V
0.85
1.5
mA
Turn-On Delay
Time for IQ to Reach 50%
2
s
Turn-Off Delay
Time for IQ to Reach 50%
2
s
POWER SUPPLY
Specified Operating Voltage
15
16
V
Operating Voltage
2.5
V
Quiescent Current
IQ
Per Channel
14
17.1
mA
TEMPERATURE RANGE
Specified Range
-40
+85
_
C
Operating Range
-40
+125
_
C
Storage Range
-65
+150
_
C
Thermal Resistance
q
JA
200
_
C/W
(1) Amplifier has internal 50k
pull-up resistor to VCC+ pin. This enables the amplifier with no connection to shutdown pin.
OPA1632
SBOS286 - DECEMBER 2003
www.ti.com
4
TYPICAL CHARACTERISTICS
At TA = +25
C, VS =
15V, and RL = 2k
, unless otherwise noted.
0.001
0.0001
0.00001
TH
D
+
N
o
i
s
e
(
%
)
10
100
1k
10k
100k
Frequency (Hz)
THD + NOISE vs FREQUENCY
Gain = +1
R
F
= 348
V
O
= 3Vrms
Differential I/O
R
L
= 600
R
L
= 2k
0.001
0.0001
0.00001
TH
D
+
N
o
i
s
e
(
%
)
10
100
1k
10k
100k
Frequency (Hz)
THD + NOISE vs FREQUENCY
Gain = +1
R
F
= 348
V
O
= 3Vrms
Single-Ended Input
Differential Output
R
L
= 600
R
L
= 2k
0.1
0.01
0.001
0.0001
0.00001
TH
D
+
N
o
i
s
e
(
%
)
0.01
0.1
1
10
100
Differential Output Voltage (Vrms)
THD + NOISE vs OUTPUT VOLTAGE
Gain = +1
R
F
= 348
f = 1kHz
Differential I/O
R
L
= 600
R
L
= 2k
0.01
0.001
0.0001
0.00001
TH
D
+
N
o
i
s
e
(
%
)
0.01
0.1
1
10
100
Differential Output Voltage (Vrms)
THD + NOISE vs OUTPUT VOLTAGE
Gain = +1
R
F
= 348
f = 1kHz
Single-Ended Input
Differential Output
R
L
= 600
R
L
= 2k
0.1
0.01
0.001
0.0001
0.00001
IM
D
(
%
)
0.01
0.1
1
10
100
Differential Output Voltage (V
PP
)
INTERMODULATION DISTORTION
vs OUTPUT VOLTAGE
Gain = +1
R
F
= 348
Differential I/O
SMPTE 4:1; 60Hz, 7kHz
DIN 4:1; 250Hz, 8kHz
R
L
= 600
R
L
= 2k
0.1
0.01
0.001
0.0001
0.00001
IM
D
(
%
)
0.01
0.1
1
10
100
Differential Output Voltage (V
PP
)
INTERMODULATION DISTORTION
vs OUTPUT VOLTAGE
Gain = +1
R
F
= 348
Single-Ended Input
Differential Output
SMPTE 4:1; 60Hz, 7kHz
DIN 4:1; 250Hz, 8kHz
R
L
= 600
R
L
= 2k
OPA1632
SBOS286 - DECEMBER 2003
www.ti.com
5
TYPICAL CHARACTERISTICS (Cont.)
At TA = +25
C, VS =
15V, and RL = 2k
, unless otherwise noted.
10
1
10
100
1k
10k
100k
Frequency (Hz)
VOLTAGE NOISE vs FREQUENCY
V
n
(n
V
/
Hz
)
10
1
0.1
I
n
(p
A
/
Hz
)
10
100
1k
10k
100k
Frequency (Hz)
CURRENT NOISE vs FREQUENCY
15
10
5
0
-
5
-
10
-
15
V
O
(V
)
100
1k
10k
100k
R
L
(
)
OUTPUT VOLTAGE
vs DIFFERENTIAL LOAD RESISTANCE
V
CC
=
15V
V
CC
=
15V
R
F
= 1k
G = +2
V
CC
=
5V
V
CC
=
5V
100
10
1
0.1
O
u
tpu
t
I
m
pe
d
a
nc
e
(
)
100k
1M
10M
100M
1G
Frequency (Hz)
OUTPUT IMPEDANCE
vs FREQUENCY
V
CC
=
5V
OPA1632
SBOS286 - DECEMBER 2003
www.ti.com
6
APPLICATIONS INFORMATION
Figure 1 shows the OPA1632 used as a differential-output
driver for the PCM1804 high-performance audio ADC.
Supply voltages of
15V are commonly used for the
OPA1632. The relatively low input voltage swing required
by the ADC allows use of lower power-supply voltage, if
desired. Power supplies as low as
8V can be used in this
application with excellent performance. This reduces
power dissipation and heat rise. Power supplies should be
bypassed with 10
F tantalum capacitors in parallel with
0.1
F ceramic capacitors to avoid possible oscillations
and instability.
The V
COM
reference voltage output on the PCM1804 ADC
provides the proper input common-mode reference
voltage (2.5V). This V
COM
voltage is buffered with op amp
A
2
and drives the output common-mode voltage pin of the
OPA1632. This biases the average output voltage of the
OPA1632 to 2.5V.
The signal gain of the circuit is generally set to
approximately 0.25 to be compatible with commonly-used
audio line levels. Gain can be adjusted, if necessary, by
changing the values of R
1
and R
2
. The feedback resistor
values (R
3
and R
4
) should be kept relatively low, as
indicated, for best noise performance.
R
5
, R
6
, and C
3
provide an input filter and charge glitch
reservoir for the ADC. The values shown are generally
satisfactory. Some adjustment of the values may help
optimize performance with different ADCs.
It is important to maintain accurate resistor matching on
R
1
/R
2
and R
3
/R
4
to achieve good differential signal
balance. Use 1% resistors for highest performance. When
connected for single-ended inputs (inverting input
grounded, as shown in Figure 1), the source impedance
must be low. Differential input sources must have
well-balanced or low source impedance.
Capacitors C
1
, C
2
, and C
3
should be chosen carefully for
good distortion performance. Polystyrene, polypropylene,
NPO ceramic, and mica types are generally excellent.
Polyester and high-K ceramic types such as Z5U can
create distortion.
R
5
40
R
1
1k
R
2
1k
1k
R
4
270
R
3
270
R
6
40
C
2
1nF
C
1
1nF
0.1
F
0.1
F
10
F
V+
+8V to +16V
-
8V to
-
16V
V
-
1/2
PCM1804
V
OCM
3
5
4
6
7
1
2
8
C
3
2.7nF
V
COM
(2.5V)
Enable
(1)
Balanced or
Single-Ended
Input
OPA1632
OPA134
+
10
F
0.1
F
+
+
-
NOTE: (1) Leave open to enable.
Logic signals referenced to V
-
supply.
See the Shutdown Function section.
Figure 1. ADC Driver for Professional Audio
OPA1632
SBOS286 - DECEMBER 2003
www.ti.com
7
FULLY-DIFFERENTIAL AMPLIFIERS
Differential signal processing offers a number of
performance advantages in high-speed analog signal
processing systems, including immunity to external
common-mode noise, suppression of even-order
nonlinearities, and increased dynamic range. Fully-dif-
ferential amplifiers not only serve as the primary means
of providing gain to a differential signal chain, but also
provide a monolithic solution for converting single-en-
ded signals into differential signals allowing for easy,
high-performance processing.
A standard configuration for the device is shown in
Figure 2. The functionality of a fully differential amplifier
can be imagined as two inverting amplifiers that share
a common noninverting terminal (though the voltage is
not necessarily fixed). For more information on the
basic theory of operation for fully differential amplifiers,
refer to the Texas Instruments application note
SLOA054, Fully Differential Amplifiers, available for
download from the TI web site (www.ti.com).
+15V
Digital
Output
-
15V
V
OCM
V
REF
V
IN+
V
IN
-
A
IN
A
IN
Figure 2. Typical ADC Circuit
SHUTDOWN FUNCTION
The shutdown (enable) function of the OPA1632 is
referenced to the negative supply of the operational
amplifier. A valid logic low (< 0.8V above negative
supply) applied to the enable pin (pin 7) disables the
amplifier output. Voltages applied to pin 7 that are
greater than 2V above the negative supply place the
amplifier output in an active state, and the device is
enabled. If pin 7 is left disconnected, an internal pull-up
resistor enables the device. Turn-on and turn-off times
are approximately 2
s each.
Quiescent current is reduced to approximately 0.85mA
when the amplifier is disabled. When disabled, the
output stage is not in a high-impedance state. Thus, the
shutdown function cannot be used to create a
multiplexed switching function in series with multiple
amplifiers.
OUTPUT COMMON-MODE VOLTAGE
The output common-mode voltage pin sets the DC
output voltage of the OPA1632. A voltage applied to the
V
OCM
pin from a low-impedance source can be used to
directly set the output common-mode voltage. For a
V
OCM
voltage at mid-supply, make no connection to the
V
OCM
pin.
Depending on the intended application, a decoupling
capacitor is recommended on the V
OCM
node to filter
any high-frequency noise that could couple into the
signal path through the V
OCM
circuitry. A 0.1
F or 1
F
capacitor is generally adequate.
Output common-mode voltage causes additional
current to flow in the feedback resistor network. Since
this current is supplied by the output stage of the
amplifier, this creates additional power dissipation. For
commonly-used feedback resistance values, this
current is easily supplied by the amplifier. The additional
internal power dissipation created by this current may
be significant in some applications and may dictate use
of the MSOP PowerPAD package to effectively control
self-heating.
PowerPAD DESIGN CONSIDERATIONS
The OPA1632 is available in a thermally-enhanced
PowerPAD family of packages. These packages are
constructed using a downset leadframe upon which the
die is mounted (see Figure 3[a] and Figure 3[b]). This
arrangement results in the lead frame being exposed as
a thermal pad on the underside of the package (see
Figure 3[c]). Because this thermal pad has direct
thermal contact with the die, excellent thermal
performance can be achieved by providing a good
thermal path away from the thermal pad.
DIE
DIE
Thermal
Pad
(a) Side View
(b) End View
(c) Bottom View
Figure 3. Views of the Thermally-Enhanced Package.
OPA1632
SBOS286 - DECEMBER 2003
www.ti.com
8
The PowerPAD package allows for both assembly and
thermal management in one manufacturing operation.
During the surface-mount solder operation (when the
leads are being soldered), the thermal pad can also be
soldered to a copper area underneath the package.
Through the use of thermal paths within this copper
area, heat can be conducted away from the package
into either a ground plane or other heat-dissipating
device.
PowerPAD PCB LAYOUT CONSIDERATIONS
1.
Prepare the printed circuit board (PCB) with a
top-side etch pattern, as shown in Figure 4. There
should be etch for the leads as well as etch for the
thermal pad.
68mils x 70mils
(via diameter = 13mils)
Single or Dual
Figure 4. PowerPAD PCB Etch and Via Pattern.
2.
Place five holes in the area of the thermal pad.
These holes should be 13mils in diameter. Keep
them small so that solder wicking through the holes
is not a problem during reflow.
3.
Additional vias may be placed anywhere along the
thermal plane outside of the thermal pad area.
These vias help dissipate the heat generated by the
OPA1632 IC, and may be larger than the 13mil
diameter vias directly under the thermal pad. They
can be larger because they are not in the thermal
pad area to be soldered so that wicking is not a
problem.
4.
Connect all holes to the internal ground plane.
5.
When connecting these holes to the ground plane,
do not use the typical web or spoke via connection
methodology. Web connections have a high
thermal resistance connection that is useful for
slowing the heat transfer during soldering
operations. This makes the soldering of vias that
have plane connections easier. In this application,
however, low thermal resistance is desired for the
most efficient heat transfer. Therefore, the holes
under the OPA1632 PowerPAD package should
make their connection to the internal ground plane
with a complete connection around the entire
circumference of the plated-through hole.
6.
The top-side solder mask should leave the terminals
of the package and the thermal pad area with its five
holes exposed. The bottom-side solder mask should
cover the five holes of the thermal pad area. This
prevents solder from being pulled away from the
thermal pad area during the reflow process.
7.
Apply solder paste to the exposed thermal-pad
area and all of the IC terminals.
8.
With these preparatory steps in place, the IC is
simply placed in position and runs through the
solder reflow operation as any standard
surface-mount component. This results in a part
that is properly installed.
OPA1632
SBOS286 - DECEMBER 2003
www.ti.com
9
POWER DISSIPATION AND THERMAL
CONSIDERATIONS
The OPA1632 does not have thermal shutdown
protection. Take care to assure that the maximum
junction temperature is not exceeded. Excessive
junction temperature can degrade performance or
cause permanent damage. For best performance and
reliability, assure that the junction temperature does not
exceed 125
C.
The thermal characteristics of the device are dictated
by the package and the circuit board. Maximum power
dissipation for a given package can be calculated using
the following formula:
P
Dmax
+
T
max
*
T
A
q
JA
Where:
P
Dmax
is the maximum power dissipation in the
amplifier (W).
T
max
is the absolute maximum junction
temperature (
_
C).
T
A
is the ambient temperature (
_
C).
q
JA
=
q
JC
+
q
CA.
q
JC
is the thermal coefficient from the silicon
junctions to the case (
_
C/W).
q
CA
is the thermal coefficient from the case to
ambient air (
_
C/W).
For systems where heat dissipation is more critical, the
OPA1632 is offered in an MSOP-8 with PowerPAD.
The thermal coefficient for the MSOP PowerPAD
(DGN) package is substantially improved over the
traditional SO package. Maximum power dissipation
levels are depicted in Figure 5 for the two packages.
The data for the DGN package assumes a board layout
that follows the PowerPAD layout guidelines.
MAXIMUM POWER DISSIPATION
vs AMBIENT TEMPERATURE
-
40
-
15
10
85
60
35
Ambient Temperature (
_
C)
Ma
x
i
mum
P
ow
er
D
i
s
s
i
p
ati
o
n
(
W
)
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
J A
= 170
_
C/W for SO-8 (D)
J A
= 58.4
_
C/W for MSOP-8 (DGN)
T
J
= 150
_
C
No Airflow
SO-8 (D) Package
MSOP-8 (DGN) Package
Figure 5. Maximum Power Dissipation vs Ambient
Temperature
(1)
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