Document Outline
- FEATURES
- APPLICATIONS
- DESCRIPTION
- PACKAGE/ORDERING INFORMATION
- ABSOLUTE MAXIMUM RATINGS
- PIN CONFIGURATIONS
- ELECTRICAL CHARACTERISTICS: V S =+2.7V to +5.5V Single-Supply
- TYPICAL CHARACTERISTICS
- APPLICATIONS INFORMATION
- OPERATING VOLTAGE
- RAIL-TO-RAIL INPUT
- RAIL-TO-RAIL OUTPUT
- OUTPUT DRIVE
- VIDEO
- DRIVING ANALOG- TO- DIGITAL CONVERTERS
- CAPACITIVE LOAD AND STABILITY
- WIDEBAND TRANSIMPEDANCE AMPLIFIER
- PCB LAYOUT
- POWER DISSIPATION
- PowerPAD THERMALLY ENHANCED PACKAGE
- PowerPAD ASSEMBLY PROCESS
- PACKAGE DRAWINGS
- DDA (S PDSO G8) Power PAD PLASTIC SMALL-OUTLINE
- DBV (R-PDSO-G5) PLASTIC SMALL-OUTLINE
- DGK (R-PDSO-G8) PLASTIC SMALL-OUTLINE PACKAGE
- D (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE
- PW (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE
www.ti.com
Copyright 2002, Texas Instruments Incorporated
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
OPA354
OPA2354
OPA4354
SBOS233B FEBRUARY 2002 REVISED NOVEMBER 2002
DESCRIPTION
The OPA354 series of high-speed, voltage-feedback CMOS op-
erational amplifiers are designed for video and other applications
requiring wide bandwidth. They are unity-gain stable and can drive
large output currents. Differential gain is 0.02% and differential
phase is 0.09
. Quiescent current is only 4.9mA per channel.
The OPA354 series op amps are optimized for operation on
single or dual supplies as low as 2.5V (
1.25V) and up to 5.5V
(
2.75V). Common-mode input range extends beyond the sup-
plies. The output swing is within 100mV of the rails, supporting
wide dynamic range.
For applications requiring the full 100mA continuous output
current, single and dual SO-8 PowerPAD versions are avail-
able.
The single version (OPA354) is available in the tiny SOT23-5 and
SO-8 PowerPAD packages. The dual version (OPA2354) comes
in the miniature MSOP-8 and SO-8 PowerPAD packages. The
quad version (OPA4354) is offered in TSSOP-14 and SO-14
packages.
Multichannel versions feature completely independent circuitry for
lowest crosstalk and freedom from interaction. All are specified
over the extended 40
C to +125
C temperature range.
FEATURES
q
UNITY-GAIN BANDWIDTH: 250MHz
q
WIDE BANDWIDTH: 100MHz GBW
q
HIGH SLEW RATE: 150V/
s
q
LOW NOISE: 6.5nV/
Hz
q
RAIL-TO-RAIL I/O
q
HIGH OUTPUT CURRENT: > 100mA
q
EXCELLENT VIDEO PERFORMANCE:
Diff Gain: 0.02%, Diff Phase: 0.09
0.1dB Gain Flatness: 40MHz
q
LOW INPUT BIAS CURRENT: 3pA
q
QUIESCENT CURRENT: 4.9mA
q
THERMAL SHUTDOWN
q
SUPPLY RANGE: 2.5V to 5.5V
q
MicroSIZE AND PowerPAD
TM
PACKAGES
250MHz, Rail-to-Rail I/O, CMOS
OPERATIONAL AMPLIFIERS
APPLICATIONS
q
VIDEO PROCESSING
q
ULTRASOUND
q
OPTICAL NETWORKING, TUNABLE LASERS
q
PHOTODIODE TRANSIMPEDANCE AMPS
q
ACTIVE FILTERS
q
HIGH-SPEED INTEGRATORS
q
ANALOG-TO-DIGITAL (A/D) CONVERTER
INPUT BUFFERS
q
DIGITAL-TO-ANALOG (D/A) CONVERTER
OUTPUT AMPLIFIERS
q
BARCODE SCANNERS
q
COMMUNICATIONS
OPAx354 RELATED PRODUCTS
FEATURES
PRODUCT
Shutdown Version of the OPA354 Family
OPAx357
200MHz GBW, Rail-to-Rail Output, CMOS, Shutdown
OPAx355
200MHz GBW, Rail-to-Rail Output, CMOS
OPAx356
38MHz GBW, Rail-to-Rail Input/Output, CMOS
OPAx350/3
75MHz BW G = 2, Rail-to-Rail Output
OPAx631
150MHz BW G = 2, Rail-to-Rail Output
OPAx634
100MHz BW, Differential Input/Output, 3.3V Supply
THS412x
PowerPAD is a trademark of Texas Instruments.
OPA4
354
OPA3
54
OPA4
354
OPA354
V
OUT
V+
V
V
IN
+V
IN
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
OPA354, OPA2354, OPA4354
2
SBOS233B
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ABSOLUTE MAXIMUM RATINGS
(1)
Supply Voltage, V+ to V ................................................................... 7.5V
Signal Input Terminals, Voltage
(2)
.................... (V) 0.5V to (V+) + 0.5V
Current
(2)
..................................................... 10mA
Output Short-Circuit
(3)
.............................................................. Continuous
Operating Temperature .................................................. 55
C to +150
C
Storage Temperature ...................................................... 65
C to +150
C
Junction Temperature .................................................................... +150
C
Lead Temperature (soldering, 10s) ............................................... +300
C
NOTES: (1) Stresses above these ratings may cause permanent damage.
Exposure to absolute maximum conditions for extended periods may degrade
device reliability. These are stress ratings only, and functional operation of the
device at these or any other conditions beyond those specified is not implied.
(2) Input terminals are diode-clamped to the power-supply rails. Input signals
that can swing more than 0.5V beyond the supply rails should be current limited
to 10mA or less. (3) Short-circuit to ground, one amplifier per package.
PACKAGE/ORDERING INFORMATION
PIN CONFIGURATIONS
Top View
ELECTROSTATIC
DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Texas
Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper han-
dling and installation procedures can cause damage.
ESD damage can range from subtle performance degrada-
tion to complete device failure. Precision integrated circuits
may be more susceptible to damage because very small
parametric changes could cause the device not to meet its
published specifications.
1
2
3
4
8
7
6
5
NC
(1)
V+
Out
NC
(1)
NC
(1)
In
+In
V
OPA354
SO PowerPAD
(2)
1
2
3
5
4
V+
In
Out
V
+In
OPA354
SOT23
1
2
3
4
8
7
6
5
V+
Out B
In B
+In B
Out A
In A
+In A
V
OPA2354
SO PowerPAD
(2)
MSOP
A
B
1
2
3
4
5
6
7
14
13
12
11
10
9
8
Out D
In D
+In D
V
+In C
In C
Out C
Out A
In A
+In A
V+
+In B
In B
Out B
OPA4354
SO
TSSOP
B
C
D
A
NOTES: (1) NC means no internal connection. (2) PowerPAD should be connected to V or left floating.
SPECIFIED
PACKAGE
TEMPERATURE
PACKAGE
ORDERING
TRANSPORT
PRODUCT
PACKAGE-LEAD
DESIGNATOR
(1)
RANGE
MARKING
NUMBER
MEDIA, QUANTITY
OPA354
SO-8 PowerPAD
DDA
40
C to +125
C
OPA354A
OPA354AIDDA
Rails, 97
"
"
"
"
"
OPA354AIDDAR
Tape and Reel, 2500
OPA354
SOT23-5
DBV
40
C to +125
C
OABI
OPA354AIDBVT
Tape and Reel, 250
"
"
"
"
"
OPA354AIDBVR
Tape and Reel, 3000
OPA2354
SO-8 PowerPAD
DDA
40
C to +125
C
OPA2354A
OPA2354AIDDA
Rails, 97
"
"
"
"
"
OPA2354AIDDAR
Tape and Reel, 2500
OPA2354
MSOP-8
DGK
40
C to +125
C
OACI
OPA2354AIDGKT
Tape and Reel, 250
"
"
"
"
"
OPA2354AIDGKR
Tape and Reel, 2500
OPA4354
SO-14
D
40
C to +125
C
OPA4354A
OPA4354AID
Rails, 58
"
"
"
"
"
OPA4354AIDR
Tape and Reel, 2500
OPA4354
TSSOP-14
PW
40
C to +125
C
OPA4354A
OPA4354AIPWT
Tape and Reel, 250
"
"
"
"
"
OPA4354AIPWR
Tape and Reel, 2500
NOTE: (1) For the most current specifications and package information, refer to our web site at www.ti.com.
OPA354, OPA2354, OPA4354
3
SBOS233B
www.ti.com
OPA354AI,
OPA2354AI, OPA4354AI
PARAMETER
CONDITION
MIN
TYP
MAX
UNITS
OFFSET VOLTAGE
Input Offset Voltage
V
OS
V
S
= +5V
2
8
mV
Specified Temperature Range
10
mV
vs Temperature
dV
OS
/dT
Specified Temperature Range
4
V/
C
vs Power Supply
PSRR
V
S
= +2.7V to +5.5V, V
CM
= (V
S
/2) 0.15V
200
800
V/V
Specified Temperature Range
900
V/V
INPUT BIAS CURRENT
Input Bias Current
I
B
3
50
pA
Input Offset Current
I
OS
1
50
pA
NOISE
Input Noise Voltage Density
e
n
f = 1MHz
6.5
nV/
Hz
Current Noise Density
i
n
f = 1MHz
50
fA/
Hz
INPUT VOLTAGE RANGE
Common-Mode Voltage Range
V
CM
(V) 0.1V
(V+) + 0.1V
V
Common-Mode Rejection Ratio
CMRR
V
S
= +5.5V, 0.1V < V
CM
< +3.5V
66
80
dB
Specified Temperature Range
64
dB
V
S
= +5.5V, 0.1V < V
CM
< +5.6V
56
68
dB
Specified Temperature Range
55
dB
INPUT IMPEDANCE
Differential
10
13
|| 2
|| pF
Common-Mode
10
13
|| 2
|| pF
OPEN-LOOP GAIN
A
OL
V
S
= +5V, +0.3V < V
O
< +4.7V
94
110
dB
Specified Temperature Range
V
S
= +5V, +0.4V < V
O
< +4.6V
90
dB
FREQUENCY RESPONSE
Small-Signal Bandwidth
f
3dB
G = +1, V
O
= 100mVp-p, R
F
= 25
250
MHz
f
3dB
G = +2, V
O
= 100mVp-p
90
MHz
Gain-Bandwidth Product
GBW
G = +10
100
MHz
Bandwidth for 0.1dB Gain Flatness
f
0.1dB
G = +2, V
O
= 100mVp-p
40
MHz
Slew Rate
SR
V
S
= +5V, G = +1, 4V Step
150
V/
s
V
S
= +5V, G = +1, 2V Step
130
V/
s
V
S
= +3V, G = +1, 2V Step
110
V/
s
Rise-and-Fall Time
G = +1, V
O
= 200mVp-p, 10% to 90%
2
ns
G = +1, V
O
= 2Vp-p, 10% to 90%
11
ns
Settling Time, 0.1%
V
S
= +5V, G = +1, 2V Output Step
30
ns
0.01%
60
ns
Overload Recovery Time
V
IN
Gain = V
S
5
ns
Harmonic Distortion
2nd-Harmonic
G = +1, f = 1MHz, V
O
= 2Vp-p, R
L
= 200
, V
CM
= 1.5V
75
dBc
3rd-Harmonic
G = +1, f = 1MHz, V
O
= 2Vp-p, R
L
= 200
, V
CM
= 1.5V
83
dBc
Differential Gain Error
NTSC, R
L
= 150
0.02
%
Differential Phase Error
NTSC, R
L
= 150
0.09
degrees
Channel-to-Channel Crosstalk, OPA2354
f = 5MHz
100
dB
OPA4354
84
dB
OUTPUT
Voltage Output Swing from Rail
V
S
= +5V, R
L
= 1k
, A
OL
> 94dB
0.1
0.3
V
Specified Temperature Range
V
S
= +5V, R
L
= 1k
, A
OL
> 90dB
0.4
V
Output Current
(1)(2)
, Single, Dual, Quad
I
O
V
S
= +5V
100
mA
V
S
= +3V
50
mA
Closed-Loop Output Impedance
f < 100kHz
0.05
POWER SUPPLY
Specified Voltage Range
V
S
2.7
5.5
V
Operating Voltage Range
2.5 to 5.5
V
Quiescent Current (per amplifier)
I
Q
V
S
= +5V, Enabled, I
O
= 0
4.9
6
mA
Specified Temperature Range
7.5
mA
THERMAL SHUTDOWN
Junction Temperature
Shutdown
160
C
Reset from Shutdown
140
C
TEMPERATURE RANGE
Specified Range
40
125
C
Operating Range
55
150
C
Storage Range
65
150
C
Thermal Resistance
JA
C/W
SOT23-5, MSOP-8
150
C/W
TSSOP-14
100
C/W
SO-14
100
C/W
SO-8 PowerPAD
65
C/W
ELECTRICAL CHARACTERISTICS:
V
S
= +2.7V to +5.5V Single-Supply
Boldface limits apply over the specified temperature range, T
A
= 40
C to +125
C.
At T
A
= +25
C, R
F
= 0
, R
L
= 1k
, and connected to V
S
/2, unless otherwise noted.
NOTES: (1) See typical characteristic "Output Voltage Swing vs Output Current." (2) Specified by design.
OPA354, OPA2354, OPA4354
4
SBOS233B
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TYPICAL CHARACTERISTICS
At T
A
= +25
C, V
S
= 5V, G = +1, R
F
= 0
, R
L
= 1k
, and connected to V
S
/2, unless otherwise noted.
NONINVERTING SMALL-SIGNAL
FREQUENCY RESPONSE
Frequency (Hz)
Normalized Gain (dB)
10M
1M
100M
1G
100k
3
0
3
6
9
12
15
V
O
= 0.1Vp-p
G = +2, R
F
= 604
G = +1
R
F
= 25
G = +5, R
F
= 604
G = +10, R
F
= 604
INVERTING SMALL-SIGNAL
FREQUENCY RESPONSE
Frequency (Hz)
Normalized Gain (dB)
10M
1M
100M
1G
100k
3
0
3
6
9
12
15
V
O
= 0.1Vp-p, R
F
= 604
G = 1
G = 5
G = 10
G = 2
NONINVERTING SMALL-SIGNAL STEP RESPONSE
Time (20ns/div)
Output V
oltage (40mV/div)
NONINVERTING LARGE-SIGNAL STEP RESPONSE
Time (20ns/div)
Output V
oltage (500mV/div)
0.1dB GAIN FLATNESS
Frequency (Hz)
Normalized Gain (dB)
10M
1M
100M
1G
100k
0.5
0.4
0.3
0.2
0.1
0
0.1
0.2
0.3
0.4
0.5
V
O
= 0.1Vp-p
G = +1
R
F
= 25
G = +2
R
F
= 604
HARMONIC DISTORTION vs OUTPUT VOLTAGE
Output Voltage (Vp-p)
Harmonic Distortion (dBc)
2
1
3
4
0
50
60
70
80
90
100
G = 1
f = 1MHz
R
L
= 200
3rd-Harmonic
2nd-Harmonic
OPA354, OPA2354, OPA4354
5
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TYPICAL CHARACTERISTICS
(Cont.)
At T
A
= +25
C, V
S
= 5V, G = +1, R
F
= 0
, R
L
= 1k
, and connected to V
S
/2, unless otherwise noted.
HARMONIC DISTORTION vs NONINVERTING GAIN
Gain (V/V)
Harmonic Distortion (dBc)
10
1
50
60
70
80
90
100
V
O
= 2Vp-p
f = 1MHz
R
L
= 200
3rd-Harmonic
2nd-Harmonic
HARMONIC DISTORTION vs INVERTING GAIN
Gain (V/V)
Harmonic Distortion (dBc)
10
1
50
60
70
80
90
100
V
O
= 2Vp-p
f = 1MHz
R
L
= 200
3rd-Harmonic
2nd-Harmonic
HARMONIC DISTORTION vs FREQUENCY
Frequency (Hz)
Harmonic Distortion (dBc)
10M
1M
100k
50
60
70
80
90
100
G = +1
V
O
= 2Vp-p
R
L
= 200
V
CM
= 1.5V
3rd-Harmonic
2nd-Harmonic
HARMONIC DISTORTION vs LOAD RESISTANCE
R
L
(
)
Harmonic Distortion (dBc)
1k
100
50
60
70
80
90
100
G = +1
V
O
= 2Vp-p
f = 1MHz
V
CM
= 1.5V
3rd-Harmonic
2nd-Harmonic
FREQUENCY RESPONSE FOR VARIOUS R
L
Frequency (Hz)
Normalized Gain (dB)
10M
1M
100M
1G
100k
3
0
3
6
9
12
15
R
L
= 10k
R
L
= 100
R
L
= 1k
R
L
= 50
G = +1
R
F
= 0
V
O
= 0.1Vp-p
C
L
= 0pF
INPUT VOLTAGE AND CURRENT NOISE
SPECTRAL DENSITY vs FREQUENCY
Frequency (Hz)
V
oltage Noise (nV/
Hz),
Current Noise (fA/
Hz)
100M
10
100
1k
10k
100k
1M
10M
10k
1k
100
10
1
Current Noise
Voltage Noise
OPA354, OPA2354, OPA4354
6
SBOS233B
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TYPICAL CHARACTERISTICS
(Cont.)
At T
A
= +25
C, V
S
= 5V, G = +1, R
F
= 0
, R
L
= 1k
, and connected to V
S
/2, unless otherwise noted.
FREQUENCY RESPONSE FOR VARIOUS C
L
Frequency (Hz)
Normalized Gain (dB)
10M
1M
100M
1G
100k
9
6
3
0
3
6
9
12
15
C
L
= 100pF
C
L
= 47pF
C
L
= 5.6pF
G = +1
V
O
= 0.1Vp-p
R
S
= 0
RECOMMENDED R
S
vs CAPACITIVE LOAD
Capacitive Load (pF)
R
S
(
)
100
10
1k
1
160
140
120
100
80
60
40
20
0
OPA354
C
L
R
S
V
IN
V
O
1k
For 0.1dB
Flatness
FREQUENCY RESPONSE vs CAPACITIVE LOAD
Frequency (Hz)
Normalized Gain (dB)
100M
10M
1M
1G
100k
3
0
3
6
9
12
15
OPA354
C
L
R
S
V
IN
V
O
1k
C
L
= 47pF, R
S
= 140
C
L
= 100pF, R
S
= 120
C
L
= 5.6pF, R
S
= 0
G = +1,
V
O
= 0.1Vp-p
COMMON-MODE REJECTION RATIO AND
POWER-SUPPLY REJECTION RATIO vs FREQUENCY
Frequency (Hz)
CMRR, PSRR (dB)
10k
100k
1M
10M
100M
1G
100
80
60
40
20
0
PSRR
PSRR+
CMRR
OPEN-LOOP GAIN AND PHASE
Frequency (Hz)
Open-Loop Phase (degrees)
Open-Loop Gain (dB)
10
100
1k
100k
10k
1M
10M
1G
100M
180
160
140
120
100
80
60
40
20
0
20
40
Phase
Gain
COMPOSITE VIDEO
DIFFERENTIAL GAIN AND PHASE
Number of 150
Loads
dG/dP
(%/degrees)
3
2
4
1
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
dP
dG
OPA354, OPA2354, OPA4354
7
SBOS233B
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TYPICAL CHARACTERISTICS
(Cont.)
At T
A
= +25
C, V
S
= 5V, G = +1, R
F
= 0
, R
L
= 1k
, and connected to V
S
/2, unless otherwise noted.
MAXIMUM OUTPUT VOLTAGE vs FREQUENCY
Frequency (MHz)
Output V
oltage (Vp-p)
10
100
1
6
5
4
3
2
1
0
V
S
= 5.5V
V
S
= 2.7V
Maximum Output
Voltage without
Slew-Rate
Induced Distortion
CLOSED-LOOP OUTPUT IMPEDANCE vs FREQUENCY
Frequency (Hz)
Output Impedance (
)
10M
100M
1M
1G
100k
100
10
1
0.1
0.01
OPA354
Z
O
OUTPUT VOLTAGE SWING vs OUTPUT CURRENT
FOR V
S
= 5V
Output Current (mA)
Output V
oltage (V)
75
50
25
125
100
150
175
200
0
5
4
3
2
1
0
125
C
25
C
55
C
SUPPLY CURRENT vs TEMPERATURE
Temperature (
C)
Supply Current (mA)
65
85
105
5
25
45
135
125
55
35
15
7
6
5
4
3
2
1
0
V
S
= 5V
V
S
= 2.5V
OUTPUT VOLTAGE SWING vs OUTPUT CURRENT
FOR V
S
= 3V
Output Current (mA)
Output V
o
ltage (V)
60
40
20
80
100
120
0
3
2
1
0
125
C
25
C
55
C
INPUT BIAS CURRENT vs TEMPERATURE
Temperature (
C)
Input Bias Current (pA)
65
85
105
5
25
45
135
125
55
35
15
10k
1k
100
10
1
OPA354, OPA2354, OPA4354
8
SBOS233B
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TYPICAL CHARACTERISTICS
(Cont.)
At T
A
= +25
C, V
S
= 5V, G = +1, R
F
= 0
, R
L
= 1k
, and connected to V
S
/2, unless otherwise noted.
CHANNEL-TO-CHANNEL CROSSTALK
Frequency (Hz)
Crosstalk, Input-Referred (dB)
10M
1M
1G
100M
100k
0
20
40
60
80
100
120
OPA4354
OPA2354
COMMON-MODE REJECTION RATIO AND
POWER-SUPPLY REJECTION RATIO vs TEMPERATURE
Temperature (
C)
CMRR, PSRR (dB)
65
85
105
5
25
45
135
125
55
35
15
100
90
80
70
60
50
Power-Supply Rejection Ratio
Common-Mode Rejection Ratio
OFFSET VOLTAGE PRODUCTION DISTRIBUTION
Offset Voltage (mV)
Population
6
7
8
5 4 3 2 1
0 1
2
3
4
5
6
7 8
OPEN-LOOP GAIN vs TEMPERATURE
Temperature (
C)
Open-Loop Gain (dB)
65
85
105
5
25
45
135
125
55
35
15
120
110
100
90
80
70
R
L
= 1k
OUTPUT SETTLING TIME TO 0.1%
Time (ns)
Output Error (%)
30
40
10
20
100
50
60
70
80
90
0
0.5
0.4
0.3
0.2
0.1
0
0.1
0.2
0.3
0.4
0.5
V
O
= 2Vp-p
OPA354, OPA2354, OPA4354
9
SBOS233B
www.ti.com
APPLICATIONS INFORMATION
The OPA354 is a CMOS, rail-to-rail I/O, high-speed, voltage-
feedback operational amplifier designed for video, high-
speed, and other applications. It is available as a single, dual,
or quad op amp.
The amplifier features a 100MHz gain bandwidth and 150V/
s
slew rate, but it is unity-gain stable and can be operated as a
+1V/V voltage follower.
OPERATING VOLTAGE
The OPA354 is specified over a power-supply range of +2.7V
to +5.5V (
1.35V to
2.75V). However, the supply voltage
may range from +2.5V to +5.5V (
1.25V to
2.75V). Supply
voltages higher than 7.5V (absolute maximum) can perma-
nently damage the amplifier.
Parameters that vary over supply voltage or temperature are
shown in the Typical Characteristics section of this data
sheet.
RAIL-TO-RAIL INPUT
The specified input common-mode voltage range of the OPA354
extends 100mV beyond the supply rails. This is achieved with
a complementary input stage--an N-channel input differential
pair in parallel with a P-channel differential pair, as shown in
Figure 1. The N-channel pair is active for input voltages close
to the positive rail, typically (V+) 1.2V to 100mV above the
positive supply, while the P-channel pair is on for inputs from
100mV below the negative supply to approximately (V+)
1.2V. There is a small transition region, typically (V+) 1.5V
to (V+) 0.9V, in which both pairs are on. This 600mV
transition region can vary
500mV with process variation.
Thus, the transition region (both input stages on) can range
from (V+) 2.0V to (V+) 1.5V on the low end, up to (V+)
0.9V to (V+) 0.4V on the high end.
A double-folded cascode adds the signal from the two input pairs
and presents a differential signal to the class AB output stage.
RAIL-TO-RAIL OUTPUT
A class AB output stage with common-source transistors is
used to achieve rail-to-rail output. For high-impedance loads
(> 200
), the output voltage swing is typically 100mV from
the supply rails. With 10
loads, a useful output swing can
be achieved while maintaining high open-loop gain. See
typical characteristics "Output Voltage Swing vs Output Current."
FIGURE 1. Simplified Schematic.
V
BIAS1
V
BIAS2
V
IN
+
V
IN
Class AB
Control
Circuitry
V
O
V
(Ground)
V+
Reference
Current
OPA354, OPA2354, OPA4354
10
SBOS233B
www.ti.com
FIGURE 2. Laser Diode Driver.
OUTPUT DRIVE
The OPA354's output stage can supply a continuous output
current of
100mA and still provide approximately 2.7V of
output swing on a 5V supply (shown in Figure 2). For
maximum reliability, it is not recommended to run a continuous
DC current in excess of
100mA. Refer to the typical character-
istics "Output Voltage Swing vs Output Current." For supplying
continuous output currents greater than
100mA, the OPA354
may be operated in parallel, shown in Figure 3.
V
IN
V
1
5V
R
SHUNT
1
Laser Diode
OPA354
C
1
50pF
R
1
10k
R
3
10k
R
4
1k
R
2
1k
1
F
+
+
V+
V
1V In = 100mA
Out, as Shown
R
SHUNT
1
Laser Diode
OPA2354
C
1
200pF
R
1
100k
R
5
1k
R
6
1
R
3
100k
R
4
10k
R
2
10k
1
F
+
2V In = 200mA
Out, as Shown
OPA2354
+5V
FIGURE 4. Single-Supply Video Line Driver.
Video
In
Video
Output
+2.5V
+5V
+2.5V
604
75
604
75
OPA354
FIGURE 3. Parallel Operation.
The OPA354 will provide peak currents up to 200mA, which
corresponds to the typical short-circuit current. Therefore, an
on-chip thermal shutdown circuit is provided to protect the
OPA354 from dangerously high junction temperatures. At
160
C, the protection circuit will shut down the amplifier.
Normal operation will resume when the junction temperature
cools to below 140
C.
VIDEO
The OPA354 output stage is capable of driving standard
back-terminated 75
video cables, shown in Figure 4. By
back-terminating a transmission line, it does not exhibit a
capacitive load to its driver. A properly back-terminated 75
cable does not appear as capacitance; it presents only a
150
resistive load to the OPA354 output.
The OPA354's rail-to-rail input and output capabilities make
possible its use as an amplifier for RGB graphic signals,
which have a voltage of zero at the video black level, see
Figure 5.
DRIVING ANALOG-TO-DIGITAL CONVERTERS
The OPA354 series op amps offer 60ns of settling time to
0.01%, making them a good choice for driving high- and
medium-speed sampling A/D converters and reference cir-
cuits. The OPA354 series provide an effective means of
buffering the A/D converter's input capacitance and resulting
charge injection while providing signal gain. For applications
requiring high DC accuracy, the OPA350 series is recom-
mended.
Figure 6 illustrates the OPA354 driving an A/D converter.
With the OPA354 in an inverting configuration, a capacitor
across the feedback resistor can be used to filter high-
frequency noise in the signal.
OPA354, OPA2354, OPA4354
11
SBOS233B
www.ti.com
FIGURE 5. RGB Cable Driver.
1/2
OPA2354
604
1
F
75
10nF
+3V
75
Red
Green
Blue
604
Red
D/A
Converter
Green
D/A
Converter
Blue
D/A
Converter
75
OPA354
604
1
F
10nF
+3V
75
75
1/2
OPA2354
604
75
604
75
604
75
75
+
+
ADS7816, ADS7861,
or ADS7864
12-Bit A/D Converter
OPA354
+5V
V
IN
V+
+In
In
V
REF
GND
NOTE: A/D Converter Input = 0V to V
REF
+2.5V
5k
5k
330pF
V
IN
= 0V to 5V for 0V to 5V output.
FIGURE 6. The OPA354 in Inverting Configuration Driving the ADS7816.
OPA354, OPA2354, OPA4354
12
SBOS233B
www.ti.com
CAPACITIVE LOAD AND STABILITY
The OPA354 series op amps can drive a wide range of
capacitive loads. However, all op amps under certain conditions
may become unstable. Op amp configuration, gain, and load
value are just a few of the factors to consider when determining
stability. An op amp in unity-gain configuration is the most
susceptible to the effects of capacitive load. The capacitive load
reacts with the op amp's output resistance, along with any
additional load resistance, to create a pole in the small-signal
response that degrades the phase margin. Refer to typical
characteristic "Frequency Response for Various C
L
" for detail.
The OPA354's topology enhances its ability to drive capaci-
tive loads. In unity gain, these op amps perform well with
large capacitive loads. Refer to typical characteristics "Rec-
ommended R
S
vs Capacitive Load" and "Frequency Re-
sponse vs Capacitive Load" for detail.
One method of improving capacitive load drive in the unity-
gain configuration is to insert a 10
to 20
resistor in series
with the output, as shown in Figure 7. This significantly
reduces ringing with large capacitive loads--see typical
characteristic "Frequency Response vs Capacitive Load."
However, if there is a resistive load in parallel with the
capacitive load, R
S
creates a voltage divider. This introduces
a DC error at the output and slightly reduces output swing.
This error may be insignificant. For instance, with R
L
= 10k
and R
S
= 20
, there is only about a 0.2% error at the output.
FIGURE 7. Series Resistor in Unity-Gain Configuration Im-
proves Capacitive Load Drive.
To achieve a maximally flat 2nd-order Butterworth frequency
response, the feedback pole should be set to:
1
2
4
R C
GBP
R C
F F
F D
=
Typical surface-mount resistors have a parasitic capacitance
of around 0.2pF that must be deducted from the calculated
feedback capacitance value.
Bandwidth is calculated by:
f
GBP
R C
Hz
dB
F D
-
=
3
2
For even higher transimpedance bandwidth, the high-speed
CMOS OPA355 (200MHz GBW) or the OPA655 (400MHz
GBW) may be used.
PCB LAYOUT
Good high-frequency Printed Circuit Board (PCB) layout tech-
niques should be employed for the OPA354. Generous use of
ground planes, short, direct signal traces, and a suitable
bypass capacitor located at the V+ pin will assure clean, stable
operation. Large areas of copper also provide a means of
dissipating heat that is generated in normal operation.
Sockets are definitely not recommended for use with any
high-speed amplifier.
A 10nF ceramic bypass capacitor is the minimum recom-
mended value; adding a 1
F or larger tantalum capacitor in
parallel can be beneficial when driving a low-resistance load.
Providing adequate bypass capacitance is essential to achiev-
ing very low harmonic and intermodulation distortion.
POWER DISSIPATION
Power dissipation depends on power-supply voltage, signal
and load conditions. With DC signals, power dissipation is
equal to the product of output current times the voltage
across the conducting output transistor, V
S
V
O
. Power
dissipation can be minimized by using the lowest possible
WIDEBAND TRANSIMPEDANCE AMPLIFIER
Wide bandwidth, low input bias current, and low input voltage
and current noise make the OPA354 an ideal wideband
photodiode transimpedance amplifier for low-voltage single-
supply applications. Low-voltage noise is important because
photodiode capacitance causes the effective noise gain of
the circuit to increase at high frequency.
The key elements to a transimpedance design (as shown in
Figure 8) are the expected diode capacitance (including the
parasitic input common-mode and differential-mode input
capacitance (2 + 2)pF for the OPA354), the desired transim-
pedance gain (R
F
), and the Gain Bandwidth Product (GBP)
for the OPA354 (100MHz). With these 3 variables set, the
feedback capacitor value (C
F
) may be set to control the
frequency response.
FIGURE 8. Transimpedance Amplifier.
OPA354
V+
V
IN
V
OUT
C
L
R
L
R
S
OPA354
V
OUT
R
F
10M
C
F
< 1pF
(prevents gain peaking)
+V
C
D
OPA354, OPA2354, OPA4354
13
SBOS233B
www.ti.com
power-supply voltage necessary to assure the required out-
put voltage swing.
For resistive loads, the maximum power dissipation occurs at
a DC output voltage of one half the power-supply voltage.
Dissipation with AC signals is lower. Application Bulletin
AB-039 (SBOA022), "Power Amplifier Stress and Power
Handling Limitations," explains how to calculate or measure
power dissipation with unusual signals and loads, and can be
found at www.ti.com.
Any tendency to activate the thermal protection circuit indi-
cates excessive power dissipation or an inadequate heat
sink. For reliable operation, junction temperature should be
limited to 150
C, maximum. To estimate the margin of safety
in a complete design, increase the ambient temperature until
the thermal protection is triggered at 160
C. The thermal
protection should trigger more than 35
C above the maxi-
mum expected ambient condition of your application.
PowerPAD THERMALLY ENHANCED PACKAGE
Besides the regular SOT23-5 and MSOP-8, the single and
dual versions of the OPA354 also come in SO-8 PowerPAD.
The SO-8 PowerPAD is a standard-size SO-8 package
where the exposed leadframe on the bottom of the package
can be soldered directly to the PCB to create an extremely
low thermal resistance. This will enhance the OPA354's
power dissipation capability significantly and eliminates the
use of bulky heatsinks and slugs traditionally used in thermal
packages. This package can be easily mounted using stan-
dard PCB assembly techniques. NOTE: Since the SO-8
PowerPAD is pin-compatible with standard SO-8 packages,
the OPA354 and OPA2354 can directly replace operational
amplifiers in existing sockets. If the application does not
require the higher power dissipation capability, the PowerPAD
does not have to be soldered to the PCB.
The PowerPAD package is designed so that the leadframe
die pad (or thermal pad) is exposed on the bottom of the IC,
as shown in Figure 9. This provides an extremely low thermal
resistance (
JC
) path between the die and the exterior of the
package. The thermal pad on the bottom of the IC can then
be soldered directly to the PCB, using the PCB as a heatsink.
In addition, plated-through holes (vias) provide a low thermal
resistance heat flow path to the back side of the PCB.
PowerPAD ASSEMBLY PROCESS
1. The PowerPAD must be connected to the device's most
negative supply voltage, which will be ground in single-
supply applications, and V in split-supply applications.
2. Prepare the PCB with a top-side etch pattern, as shown in
Figure 10. There should be etch for the leads as well as etch
for the thermal land.
FIGURE 10. 8-Pin PowerPAD PCB Etch and Via Pattern.
3. Place the recommended number of plated-through holes
(or thermal vias) in the area of the thermal pad. These holes
should be 13 mils in diameter. They are kept small so that
solder wicking through the holes is not a problem during
reflow. The minimum recommended number of holes for the
SO-8 PowerPAD package is 5, as shown in Figure 10.
4. It is recommended, but not required, to place a small
number of additional holes under the package and outside
the thermal pad area. These holes provide additional heat
paths between the copper thermal land and the ground
plane. They may be larger because they are not in the area
to be soldered, so wicking is not a problem. This is illustrated
in Figure 10.
5. Connect all holes, including those within the thermal pad
area and outside the pad area, to the internal ground plane
or other internal copper plane for single-supply applications,
and V for split-supply applications.
6. When laying out these holes, do not use the typical web
or spoke via connection methodology, as shown in Figure 11.
Web connections have a high thermal resistance connection
that is useful for slowing the heat transfer during soldering
operations. This makes soldering the vias that have ground
FIGURE 9. Section View of a PowerPAD Package.
Mold Compound (Plastic)
Leadframe Die Pad
Exposed at Base of the Package
(Copper Alloy)
Leadframe (Copper Alloy)
IC (Silicon)
Die Attach (Epoxy)
OPTIONAL:
Additional 4 vias outside
of thermal pad area but
under the package.
REQUIRED:
Thermal pad area 2.286mm x 2.286mm
(90 mils x 90 mils) with 5 vias
(via diameter = 13 mils)
Thermal Land
(Copper)
Minimum Size
4.8mm x 3.8mm
(189 mils x 150 mils)
Web or Spoke Via
Solid Via
NOT RECOMMENDED
(due to poor heat conduction)
RECOMMENDED
FIGURE 11. Via Connection.
OPA354, OPA2354, OPA4354
14
SBOS233B
www.ti.com
plane connections easier. However, in this application, low
thermal resistance is desired for the most efficient heat
transfer. Therefore, the holes under the PowerPAD package
should make their connection to the internal ground plane
with a complete connection around the entire circumference
of the plated-through hole.
7. The top-side solder mask should leave the pad connec-
tions and the thermal pad area exposed. The thermal pad
area should leave the 13 mil holes exposed. The larger holes
outside the thermal pad area may be covered with solder
mask.
8. Apply solder paste to the exposed thermal pad area and
all of the package terminals.
9. With these preparatory steps in place, the PowerPAD IC
is simply placed in position and run through the solder reflow
operation as any standard surface-mount component. This
results in a part that is properly installed.
For detailed information on the PowerPAD package including
thermal modeling considerations and repair procedures,
please see technical Brief SLMA002, "PowerPAD Thermally
Enhanced Package," located at www.ti.com.
OPA354, OPA2354, OPA4354
15
SBOS233B
www.ti.com
PACKAGE DRAWINGS
DDA (SPDSOG8)
Power PAD
PLASTIC SMALL-OUTLINE
6,20
5,84
3,81
3,99
4202561/A 02/01
8
5
1
4
1,68 MAX
0,13
4,98
4,80
0
8
0,41
0,89
0,25
0,20 NOM
Seating Plane
0,49
0,35
0,03
1,40
1,55
Thermal Pad
(See Note D)
M
0,10
0,10
1,27
Gage Plane
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. The package thermal performance may be enhanced by bonding the thermal pad to an external thermal plane.
This pad is electrically and thermally connected to the backside of the die and possibly selected leads.
OPA354, OPA2354, OPA4354
16
SBOS233B
www.ti.com
PACKAGE DRAWINGS (Cont.)
DBV (R-PDSO-G5)
PLASTIC SMALL-OUTLINE
0,10
M
0,20
0,95
0
8
0,25
0,35
0,55
Gage Plane
0,15 NOM
4073253-4/G 01/02
2,60
3,00
0,50
0,30
1,50
1,70
4
5
3
1
2,80
3,00
0,95
1,45
0,05 MIN
Seating Plane
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion.
D. Falls within JEDEC MO-178
OPA354, OPA2354, OPA4354
17
SBOS233B
www.ti.com
PACKAGE DRAWINGS (Cont.)
DGK (R-PDSO-G8)
PLASTIC SMALL-OUTLINE PACKAGE
0,69
0,41
0,25
0,15 NOM
Gage Plane
4073329/C 08/01
4,98
0,25
5
3,05
4,78
2,95
8
4
3,05
2,95
1
0,38
1,07 MAX
Seating Plane
0,65
M
0,08
0
6
0,10
0,15
0,05
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion.
D. Falls within JEDEC MO-187
OPA354, OPA2354, OPA4354
18
SBOS233B
www.ti.com
PACKAGE DRAWINGS (Cont.)
D (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
8 PINS SHOWN
8
0.197
(5,00)
A MAX
A MIN
(4,80)
0.189
0.337
(8,55)
(8,75)
0.344
14
0.386
(9,80)
(10,00)
0.394
16
DIM
PINS **
4040047/E 09/01
0.069 (1,75) MAX
Seating Plane
0.004 (0,10)
0.010 (0,25)
0.010 (0,25)
0.016 (0,40)
0.044 (1,12)
0.244 (6,20)
0.228 (5,80)
0.020 (0,51)
0.014 (0,35)
1
4
8
5
0.150 (3,81)
0.157 (4,00)
0.008 (0,20) NOM
0
8
Gage Plane
A
0.004 (0,10)
0.010 (0,25)
0.050 (1,27)
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion, not to exceed 0.006 (0,15).
D. Falls within JEDEC MS-012
OPA354, OPA2354, OPA4354
19
SBOS233B
www.ti.com
PACKAGE DRAWINGS (Cont.)
PW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,65
M
0,10
0,10
0,25
0,50
0,75
0,15 NOM
Gage Plane
28
9,80
9,60
24
7,90
7,70
20
16
6,60
6,40
4040064/F 01/97
0,30
6,60
6,20
8
0,19
4,30
4,50
7
0,15
14
A
1
1,20 MAX
14
5,10
4,90
8
3,10
2,90
A MAX
A MIN
DIM
PINS **
0,05
4,90
5,10
Seating Plane
0
8
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153
PACKAGING INFORMATION
ORDERABLE DEVICE
STATUS(1)
PACKAGE TYPE
PACKAGE DRAWING
PINS
PACKAGE QTY
OPA2354AIDDA
ACTIVE
HSOP
DDA
8
100
OPA2354AIDDAR
ACTIVE
HSOP
DDA
8
2500
OPA2354AIDGKR
ACTIVE
VSSOP
DGK
8
2500
OPA2354AIDGKT
ACTIVE
VSSOP
DGK
8
250
OPA354AIDBVR
ACTIVE
SOP
DBV
5
3000
OPA354AIDBVT
ACTIVE
SOP
DBV
5
250
OPA354AIDDA
ACTIVE
HSOP
DDA
8
100
OPA354AIDDAR
ACTIVE
HSOP
DDA
8
2500
OPA4354AID
ACTIVE
SOIC
D
14
58
OPA4354AIDR
ACTIVE
SOIC
D
14
2500
OPA4354AIPWR
ACTIVE
TSSOP
PW
14
2500
OPA4354AIPWT
ACTIVE
TSSOP
PW
14
250
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
PACKAGE OPTION ADDENDUM
www.ti.com
3-Oct-2003
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