1988 Burr-Brown Corporation

PDS-872G

Printed in U.S.A. September, 1993

DESCRIPTION

The OPA620 is a precision wideband monolithic opera-
tional amplifier featuring very fast settling time, low
differential gain and phase error, and high output
current drive capability.

The OPA620 is internally compensated for unity-gain
stability. This amplifier has a very low offset, fully
symmetrical differential input due to its "classical"
operational amplifier circuit architecture. Unlike "cur-
rent-feedback" amplifier designs, the OPA620 may be

OPA620

Current

Mirror

Output

Stage

Non-Inverting

Input

Inverting

Input

6 Output

used in all op amp applications requiring high speed
and precision.

Low noise and distortion, wide bandwidth, and high
linearity make this amplifier suitable for RF and video
applications. Short-circuit protection is provided by an
internal current-limiting circuit.

The OPA620 is available in plastic and ceramic DIP
and SO-8 packages. Two temperature ranges are of-
fered: 40

C to +85

C and 55

C to +125

APPLICATIONS

LOW NOISE PREAMPLIFIER

LOW NOISE DIFFERENTIAL AMPLIFIER

HIGH-RESOLUTION VIDEO

HIGH-SPEED SIGNAL PROCESSING

LINE DRIVER

ADC/DAC BUFFER

ULTRASOUND

PULSE/RF AMPLIFIERS

ACTIVE FILTERS

Wideband Precision

OPERATIONAL AMPLIFIER

FEATURES

LOW NOISE: 2.3nV/

HIGH OUTPUT CURRENT: 100mA

FAST SETTLING: 25ns (0.01%)

GAIN-BANDWIDTH PRODUCT: 200MHz

UNITY-GAIN STABLE

LOW OFFSET VOLTAGE:

200

LOW DIFFERENTIAL GAIN/PHASE ERROR

8-PIN DIP, SO-8 PACKAGES

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OPA620

SBOS162

OPA620

OPA620KP, KU

OPA620SG

PARAMETER

CONDITIONS

MIN

TYP

MAX

MIN

TYP

MAX

UNITS

INPUT NOISE
Voltage: f

= 100Hz

= 0

nV/

= 1kHz

5.5

nV/

= 10kHz

3.3

nV/

= 100kHz

2.5

nV/

= 1MHz to 100MHz

2.3

nV/

= 100Hz to 10MHz

8.0

Vr ms

Current: f

= 10kHz to 100MHz

2.3

pA/

OFFSET VOLTAGE

(1)

Input Offset Voltage

= 0VDC

200

1000

Average Drift

= T

MIN

to T

MAX

Supply Rejection

= 4.5V to 5.5V

BIAS CURRENT
Input Bias Current

= 0VDC

OFFSET CURRENT
Input Offset Current

= 0VDC

0.2

INPUT IMPEDANCE
Differential

Open-Loop

15 ||

Common-Mode

1 ||

INPUT VOLTAGE RANGE
Common-Mode Input Range

3.0

3.5

Common-Mode Rejection

2.5VDC, V

= 0VDC

OPEN-LOOP GAIN, DC
Open-Loop Voltage Gain

= 100

= 50

FREQUENCY RESPONSE
Closed-Loop Bandwidth

Gain = +1V/V

300

MHz

(3dB)

Gain = +2V/V

100

MHz

Gain = +5V/V

MHz

Gain = +10V/V

MHz

Gain-Bandwidth Product

Gain

+5V/V

200

MHz

Differential Gain

3.58MHz, G = +1V/V

0.05

Differential Phase

3.58MHz, G = +1V/V

0.05

Degrees

Harmonic Distortion

(2)

G = +2V/V, f = 10MHz, V

= 2Vp-p

Second Harmonic

dBc

(3)

Third Harmonic

dBc

Full Power Bandwidth

(2)

= 5Vp-p, Gain = +1V/V

MHz

= 2Vp-p, Gain = +1V/V

MHz

Slew Rate

(2)

2V Step, Gain = 1V/V

175

250

Overshoot

2V Step, Gain = 1V/V

Settling Time: 0.1%

2V Step, Gain = 1V/V

0.01%

Phase Margin

Gain = +1V/V

Degrees

Rise Time

Gain = +1V/V, 10% to 90%

= 100mVp-p; Small Signal

= 6Vp-p; Large Signal

RATED OUTPUT
Voltage Output

= 100

3.0

3.5

= 50

2.5

3.0

Output Resistance

1MHz, Gain = +1V/V

0.015

Load Capacitance Stability

Gain = +1V/V

Short Circuit Current

Continuous

150

POWER SUPPLY
Rated Voltage

VDC

Derated Performance

4.0

6.0

VDC

Current, Quiescent

= 0mA

TEMPERATURE RANGE
Specification: KP, KU

Ambient Temperature

+85

+125

Operating: SG

Ambient Temperature

+125

KP, KU

+85

: SG

125

C/W

100

C/W

ELECTRICAL

At V

5VDC, R

= 100

, and T

= +25

C, unless otherwise noted.

SPECIFICATIONS

The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes no responsibility
for the use of this information, and all use of such information shall be entirely at the user's own risk. Prices and specifications are subject to change without notice. No patent rights or
licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant any BURR-BROWN product for use in life support
devices and/or systems.

OPA620

SPECIFICATIONS (

CONT

)

ELECTRICAL (FULL TEMPERATURE RANGE SPECIFICATIONS)

At V

5VDC, R

= 100

, and T

= T

MIN

to T

MAX

, unless otherwise noted.

TEMPERATURE RANGE
Specification: KP, KU

Ambient Temperature

+85

+125

OFFSET VOLTAGE

(1)

Average Drift

Full Temp.

Supply Rejection

C to +70

= 4.5V to 5.5V

Full Temp.,

= 4.5 to 5.5V

BIAS CURRENT
Input Bias Current

Full Temp., V

= 0VDC

OFFSET CURRENT
Input Offset Current

Full Temp., V

= 0VDC

0.2

INPUT VOLTAGE RANGE
Common-Mode Input Range

2.5

3.0

Common-Mode Rejection

2.5VDC, V

= 0VDC

OPEN LOOP GAIN, DC
Open-Loop Voltage Gain

= 100

= 50

RATED OUTPUT
Voltage Output

C to +70

C, R

= 100

3.0

3.5

C to +85

C, R

= 100

2.75

3.25

C to +70

C, R

= 50

2.5

3.0

C to +85

C, R

= 50

2.25

2.7

POWER SUPPLY
Current, Quiescent

= 0mA

OPA620KP, KU

OPA620SG

PARAMETER

CONDITIONS

MIN

TYP

MAX

MIN

TYP

MAX

UNITS

Same specifications as for KP, KU.

NOTES: (1) Offset Voltage specifications are also guaranteed with units fully warmed up. (2) Parameter is guaranteed by characterization. (3) dBc = dB referred
to carrier-input signal.

PIN CONFIGURATION

Top View

DIP/SO-8

No Internal Connection

Positive Supply (+V )

Output

No Internal Connection

Inverting Input

Non-Inverting Input

Negative Supply (V )

OPA620

Basic Model Number
Performance Grade Code

K = 40

C to +85

S = 55

C to +125

Package Code

G = 8-pin Ceramic DIP
P = 8-pin Plastic DIP
U = SO-8 Surface Mount

ORDERING INFORMATION

(

)

(

)

ABSOLUTE MAXIMUM RATINGS

Supply .............................................................................................

7VDC

Internal Power Dissipation

(1)

....................... See Applications Information

Differential Input Voltage ............................................................ Total V

Input Voltage Range .................................... See Applications Information
Storage Temperature Range: SG ................................. 65

C to +150

KP, KU .......................... 40

C to +125

Lead Temperature (soldering, 10s) .............................................. +300

(soldering, SO-8, 3s) ...................................... +260

Output Short Circuit to Ground (+25

C) ............... Continuous to Ground

Junction Temperature (T

) ............................................................ +175

NOTE: (1) Packages must be derated based on specified

. Maximum T

must be observed.

PACKAGE INFORMATION

PACKAGE DRAWING

PRODUCT

PACKAGE

NUMBER

(1)

OPA620KP

8-Pin Plastic DIP

006

OPA620KU

SO-8 Surface Mount

182

OPA620SG

8-Pin Ceramic DIP

157

NOTE: (1) For detailed drawing and dimension table, please see end of data
sheet, or Appendix C of Burr-Brown IC Data Book.

ELECTROSTATIC
DISCHARGE SENSITIVITY

This integrated circuit can be damaged by ESD. Burr-Brown
recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and
installation procedures can cause damage.

ESD damage can range from subtle performance degradation to
complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes
could cause the device not to meet its published specifications.

OPA620

TYPICAL PERFORMANCE CURVES

(CONT)

At V

5VDC, R

= 100

, and T

= +25

C, unless otherwise noted.

OPEN-LOOP FREQUENCY RESPONSE

Frequency (Hz)

10k

100k

10M

100M

-20

Open-Loop Voltage Gain (dB)

Gain

Phase

Phase
Margin
60°

135

180

Phase Shift (°)

A = +1V/V CLOSED-LOOP

SMALL-SIGNAL BANDWIDTH

Frequency (Hz)

10M

100M

135

180

Gain (dB)

Phase Shift (°)

PM 60°

Gain

Open-Loop Phase

A = +2V/V CLOSED-LOOP

SMALL-SIGNAL BANDWIDTH

Frequency (Hz)

+10

10M

100M

135

180

Gain (dB)

Phase Shift (°)

PM 70°

Gain

Open-Loop Phase

= +10V/V CLOSED-LOOP

SMALL-SIGNAL BANDWIDTH

Frequency (Hz)

+24

+22

+20

+16

+14

+12

10M

100M

135

180

Gain (dB)

+18

Phase Shift (°)

Gain

Open-Loop Phase

PM 90°

A = +1V/V CLOSED-LOOP BANDWIDTH

vs OUTPUT VOLTAGE SWING

Frequency (Hz)

10M

100M

Output Voltage (Vp-p)

10k

100k

R = 50

A = +2V/V CLOSED-LOOP BANDWIDTH

vs OUTPUT VOLTAGE SWING

Frequency (Hz)

10M

100M

Output Voltage (Vp-p)

10k

100k

R = 50

OPA620

TYPICAL PERFORMANCE CURVES

(CONT)

At V

5VDC, R

= 100

, and T

= +25

C, unless otherwise noted.

INPUT OFFSET VOLTAGE WARM-UP DRIFT

+100

+50

100

Offset Voltage Change (µV)

Time from Power Turn-on (min)

INPUT VOLTAGE AND CURRENT NOISE
SPECTRAL DENSITY vs TEMPERATURE

3.1

2.8

2.5

2.2

1.9

+25

+50

+75

+100

+125

2.9

2.6

2.3

2.0

1.7

Voltage Noise (nV/

Hz)

Current Noise (pA/

Hz)

Ambient Temperature (°C)

f = 100kHz

Current Noise

Voltage Noise

TOTAL INPUT VOLTAGE NOISE SPECTRAL DENSITY

vs SOURCE RESISTANCE

Frequency (Hz)

100

0.1

10M

100M

Voltage Noise (nV/ Hz)

100

10k

100k

R = 1k

R = 500

R = 0

R = 100

A = +10V/V CLOSED-LOOP BANDWIDTH

vs OUTPUT VOLTAGE SWING

Frequency (Hz)

10M

100M

Output Voltage (Vp-p)

10k

100k

R = 50

INPUT CURRENT NOISE SPECTRAL DENSITY

Frequency (Hz)

100

0.1

10M

100M

100

10k

100k

Current Noise (pA/

Hz)

INPUT OFFSET VOLTAGE CHANGE

DUE TO THERMAL SHOCK

+1000

+500

500

1000

Offset Voltage Change (µV)

Time from Thermal Shock (min)

K Grade

T = 25°C to 70°C

Air Environment

SG T = 25°C to T = 125°C

Air Environment

25°C

OPA620

TYPICAL PERFORMANCE CURVES

(CONT)

At V

5VDC, R

= 100

, and T

= +25

C, unless otherwise noted.

SMALL-SIGNAL

HARMONIC DISTORTION vs FREQUENCY

100k

Harmonic Distortion (dBc)

Frequency (Hz)

100M

10M

G = +2V/V

R = 50

V = 0.5Vp-p

1MHz HARMONIC DISTORTION

vs POWER OUTPUT

Harmonic Distortion (dBc)

Power Output (dBm)

+15

+10

0.125Vp-p

0.25Vp-p

0.5Vp-p

1Vp-p

2Vp-p

G = +2V/V

R = 50

f = 1MHz

LARGE-SIGNAL

HARMONIC DISTORTION vs FREQUENCY

100k

Harmonic Distortion (dBc)

Frequency (Hz)

100M

10M

G = +2V/V

R = 50

V = 2Vp-p

10MHz HARMONIC DISTORTION

vs POWER OUTPUT

Harmonic Distortion (dBc)

Power Output (dBm)

+15

+10

0.125Vp-p

0.25Vp-p

0.5Vp-p

1Vp-p

2Vp-p

G = +2V/V

R = 50

f = 10MHz

NTSC DIFFERENTIAL GAIN vs CLOSED-LOOP GAIN

0.5

0.3

0.2

Differential Gain (%)

Closed-Loop Amplifier Gain (V/V)

0.4

0.1

f = 3.58MHz

R = 75 (Two Back-Terminated Outputs)

V = 0V to 0.7V

V = 0V to 2.1V

V = 0V to 1.4V

NTSC DIFFERENTIAL PHASE vs CLOSED-LOOP GAIN

1.0

0.6

0.4

Differential Phase (Degrees)

Closed-Loop Amplifier Gain (V/V)

0.8

0.2

f = 3.58MHz

R = 75 (Two Back-Terminated Outputs)

V = 0V to 0.7V

V = 0V to 2.1V

V = 0V to 1.4V

OPA620

Oscillations at frequencies of 200MHz and above can easily
occur if good grounding techniques are not used. A heavy
ground plane (2 oz. copper recommended) should connect
all unused areas on the component side. Good ground planes
can reduce stray signal pickup, provide a low resistance, low
inductance common return path for signal and power, and
can conduct heat from active circuit package pins into
ambient air by convection.

Supply bypassing is extremely critical and must always be
used, especially when driving high current loads. Both
power supply leads should be bypassed to ground as close as
possible to the amplifier pins. Tantalum capacitors (1

F to

F) with very short leads are recommended. A parallel

0.1

F ceramic should be added at the supply pins. Surface

mount bypass capacitors will produce excellent results due
to their low lead inductance. Additionally, suppression fil-
ters can be used to isolate noisy supply lines. Properly
bypassed and modulation-free power supply lines allow full
amplifier output and optimum settling time
performance.

Points to Remember
1) Don't use point-to-point wiring as the increase in wiring
inductance will be detrimental to AC performance. How-
ever, if it must be used, very short, direct signal paths are
required. The input signal ground return, the load ground
return, and the power supply common should all be
connected to the same physical point to eliminate ground
loops, which can cause unwanted feedback.

2) Good component selection is essential. Capacitors used in
critical locations should be a low inductance type with a high
quality dielectric material. Likewise, diodes used in critical
locations should be Schottky barrier types, such as HP5082-
2835 for fast recovery and minimum charge storage.
Ordinary diodes will not be suitable in RF circuits.

3) Whenever possible, solder the OPA620 directly into the
PC board without using a socket. Sockets add parasitic
capacitance and inductance, which can seriously degrade
AC performance or produce oscillations. If sockets must be
used, consider using zero-profile solderless sockets such as
Augat part number 8134-HC-5P2. Alternately, Teflon

stand-

offs located close to the amplifier's pins can be used to
mount feedback components.

4) Resistors used in feedback networks should have values
of a few hundred ohms for best performance. Shunt capaci-
tance problems limit the acceptable resistance range to about
1k

on the high end and to a value that is within the

amplifier's output drive limits on the low end. Metal film
and carbon resistors will be satisfactory, but wirewound
resistors (even "non-inductive" types) are absolutely
unacceptable in high-frequency circuits.

5) Surface-mount components (chip resistors, capacitors,
etc) have low lead inductance and are therefore strongly
recommended. Circuits using all surface-mount components
with the OPA620KU (SO-8 package) will offer the best AC
performance. The parasitic package inductance and capaci-
tance for the SO-8 is lower than the both the Cerdip and
8-lead Plastic DIP.

APPLICATIONS INFORMATION

DISCUSSION OF PERFORMANCE

The OPA620 provides a level of speed and precision not
previously attainable in monolithic form. Unlike current
feedback amplifiers, the OPA620's design uses a "classical"
operational amplifier architecture and can therefore be used
in all traditional operational amplifier applications. While it
is true that current feedback amplifiers can provide wider
bandwidth at higher gains, they offer many disadvantages.
The asymmetrical input characteristics of current feedback
amplifiers (i.e., one input is a low impedance) prevents them
from being used in a variety of applications. In addition,
unbalanced inputs make input bias current errors difficult to
correct. Bias current cancellation through matching of in-
verting and non-inverting input resistors is impossible
because the input bias currents are uncorrelated. Current
noise is also asymmetrical and is usually significantly higher
on the inverting input. Perhaps most important, settling time
to 0.01% is often extremely poor due to internal design
tradeoffs. Many current feedback designs exhibit settling
times to 0.01% in excess of 10 microseconds even though
0.1% settling times are reasonable. Such amplifiers are
completely inadequate for fast settling 12-bit applications.

The OPA620's "classical" operational amplifier architecture
employs true differential and fully symmetrical inputs to
eliminate these troublesome problems. All traditional circuit
configurations and op amp theory apply to the OPA620. The
use of low-drift thin-film resistors allows internal operating
currents to be laser-trimmed at wafer-level to optimize AC
performance such as bandwidth and settling time, as well as
DC parameters such as input offset voltage and drift. The
result is a wideband, high-frequency monolithic operational
amplifier with a gain-bandwidth product of 200MHz, a
0.01% settling time of 25ns, and an input offset voltage
of 200

WIRING PRECAUTIONS

Maximizing the OPA620's capability requires some wiring
precautions and high-frequency layout techniques.
Oscillation, ringing, poor bandwidth and settling, gain
peaking, and instability are typical problems plaguing all
high-speed amplifiers when they are improperly used. In
general, all printed circuit board conductors should be wide
to provide low resistance, low impedance signal paths. They
should also be as short as possible. The entire physical
circuit should be as small as practical. Stray capacitances
should be minimized, especially at high impedance nodes,
such as the amplifier's input terminals. Stray signal coupling
from the output or power supplies to the inputs should be
minimized. All circuit element leads should be no longer
than 1/4 inch (6mm) to minimize lead inductance, and low
values of resistance should be used. This will minimize time
constants formed with the circuit capacitances and will
eliminate stray, parasitic circuits.

Grounding is the most important application consideration
for the OPA620, as it is with all high-frequency circuits.

Teflon

E. I. Du Pont de Nemours & Co.

OPA620

6) Avoid overloading the output. Remember that output
current must be provided by the amplifier to drive its own
feedback network as well as to drive its load. Lowest
distortion is achieved with high impedance loads.

7) Don't forget that these amplifiers use

5V supplies.

Although they will operate perfectly well with +5V and
5.2V, use of

15V supplies will destroy the part.

8) Standard commercial test equipment has not been
designed to test devices in the OPA620's speed range.
Benchtop op amp testers and ATE systems will require a
special test head to successfully test these amplifiers.

9) Terminate transmission line loads. Unterminated lines,
such as coaxial cable, can appear to the amplifier to be a
capacitive or inductive load. By terminating a transmission
line with its characteristic impedance, the amplifier's load
then appears purely resistive.

10) Plug-in prototype boards and wire-wrap boards will not
be satisfactory. A clean layout using RF techniques is
essential; there are no shortcuts.

OFFSET VOLTAGE ADJUSTMENT

The OPA620's input offset voltage is laser-trimmed and
will require no further adjustment for most applications.
However, if additional adjustment is needed, the circuit in
Figure 1 can be used without degrading offset drift with
temperature. Avoid external adjustment whenever possible
since extraneous noise, such as power supply noise, can be
inadvertently coupled into the amplifier's inverting input
terminal. Remember that additional offset errors can be
created by the amplifier's input bias currents. Whenever
possible, match the impedance seen by both inputs as is
shown with R

This will reduce input bias current errors to

the amplifier's offset current, which is typically only 0.2

FIGURE 1. Offset Voltage Trim.

NOTE: (1) R

is optional and can be used to cancel offset errors due to input

bias currents.

OPA620

(1)

R = R || R

Trim

20k

V or Ground

Output Trim Range +V ( R ) to V ( R )

Trim

47k

INPUT PROTECTION

Static damage has been well recognized for MOSFET
devices, but any semiconductor device deserves protection
from this potentially damaging source. The OPA620 incor-
porates on-chip ESD protection diodes as shown in Figure 2.
This eliminates the need for the user to add external protec-
tion diodes, which can add capacitance and degrade AC
performance.

All pins on the OPA620 are internally protected from ESD
by means of a pair of back-to-back reverse-biased diodes to
either power supply as shown. These diodes will begin to
conduct when the input voltage exceeds either power
supply by about 0.7V. This situation can occur with loss of
the amplifier's power supplies while a signal source is still
present. The diodes can typically withstand a continuous
current of 30mA without destruction. To insure long term
reliability, however, diode current should be externally lim-
ited to 10mA or so whenever possible.

FIGURE 2. Internal ESD Protection.

ESD Protection diodes internally
connected to all pins.

External

Internal
Circuitry

The internal protection diodes are designed to withstand
2.5kV (using Human Body Model) and will provide ad-
equate ESD protection for most normal handling proce-
dures. However, static damage can cause subtle changes in
amplifier input characteristics without necessarily destroy-
ing the device. In precision operational amplifiers, this may
cause a noticeable degradation of offset voltage and drift.
Therefore, static protection is strongly recommended when
handling the OPA620.

OUTPUT DRIVE CAPABILITY

The OPA620's design uses large output devices and has
been optimized to drive 50

and 75

resistive loads. The

device can easily drive 6Vp-p into a 50

load. This high-

output drive capability makes the OPA620 an ideal choice
for a wide range of RF, IF, and video applications. In many
cases, additional buffer amplifiers are unneeded.

Internal current-limiting circuitry limits output current to
about 150mA at 25

C. This prevents destruction from

accidental shorts to common and eliminates the need for
external current-limiting circuitry. Although the device can
withstand momentary shorts to either power supply, it is not
recommended.

OPA620

Many demanding high-speed applications such as ADC/
DAC buffers require op amps with low wideband output
impedance. For example, low output impedance is essential
when driving the signal-dependent capacitances at the inputs
of flash A/D converters. As shown in Figure 3, the OPA620
maintains very low closed-loop output impedance over
frequency. Closed-loop output impedance increases with
frequency since loop gain is decreasing with frequency.

100

10k

100k

10M

100M

Frequency (Hz)

0.1

0.01

Small-Signal Output Impedance ( )

G = +10V/V

G = +1V/V

G = +2V/V

FIGURE 3. Small-Signal Output Impedance vs Frequency.

THERMAL CONSIDERATIONS

The OPA620 does not require a heat sink for operation in
most environments. The use of a heat sink, however, will
reduce the internal thermal rise and will result in cooler,
more reliable operation. At extreme temperatures and under
full load conditions a heat sink is necessary. See "Maximum
Power Dissipation" curve, Figure 4.

FIGURE 4. Maximum Power Dissipation.

The internal power dissipation is given by the equation P

+ P

, where P

is the quiescent power dissipation and

is the power dissipation in the output stage due to the

load. (For

5V, P

= 10V x 23mA = 230mW, max).

For the case where the amplifier is driving a grounded load
(R

) with a DC voltage (

OUT

) the maximum value of P

occurs at

OUT

/2, and is equal to P

, max =

(

)

/4R

. Note that it is the voltage across the output

transistor, and not the load, that determines the power
dissipated in the output stage.

When the output is shorted to ground, P

= 5V

150mA =

750mW. Thus, P

= 230mW + 750mW

1W. Note that the

short-circuit condition represents the maximum amount of
internal power dissipation that can be generated. Thus, the
"Maximum Power Dissipation" curve starts at 1W and is
derated based on a 175

C maximum junction temperature

and the junction-to-ambient thermal resistance,

, of each

package. The variation of short-circuit current with tempera-
ture is shown in Figure 5.

FIGURE 6. Driving Capacitive Loads.

OPA620

(R typically 5 to 25 )

CAPACITIVE LOADS

The OPA620's output stage has been optimized to drive
resistive loads as low as 50

. Capacitive loads, however,

will decrease the amplifier's phase margin which may cause
high frequency peaking or oscillations. Capacitive loads
greater than 20pF should be buffered by connecting a small
resistance, usually 5

to 25

, in series with the output as

shown in Figure 6. This is particularly important when
driving high capacitance loads such as flash A/D converters.

In general, capacitive loads should be minimized for
optimum high frequency performance. Coax lines can be
driven if the cable is properly terminated. The capacitance of
coax cable (29pF/foot for RG-58) will not load the amplifier
when the coaxial cable or transmission line is terminated in
its characteristic impedance.

FIGURE 5. Short-Circuit Current vs Temperature.

250

200

150

100

+25

+50

+75

+100

+125

Short-Circuit Current (mA)

Ambient Temperature (°C)

Cerdip
Package

1.2

1.0

0.8

0.6

0.4

0.2

+25

+50

+75

+100

+125

+150

Ambient Temperature (°C)

Internal Power Dissipation (W)

Plastic DIP, SO-8
Packages

OPA620

tors, which settle to 0.01% in sufficient time, are scarce and
expensive. Fast oscilloscopes, however, are more commonly
available. For best results, a sampling oscilloscope is recom-
mended. Sampling scopes typically have bandwidths that
are greater than 1GHz and very low capacitance inputs.
They also exhibit faster settling times in response to signals
that would tend to overload a real-time oscilloscope.

Figure 7 shows the test circuit used to measure settling time
for the OPA620. This approach uses a 16-bit sampling
oscilloscope to monitor the input and output pulses. These
waveforms are captured by the sampling scope, averaged,
and then subtracted from each other in software to produce
the error signal. This technique eliminates the need for the
traditional "false-summing junction," which adds extra para-
sitic capacitance. Note that instead of an additional flat-top
generator, this technique uses the scope's built-in calibration
source as the input signal.

COMPENSATION

The OPA620 is internally compensated and is stable in unity
gain with a phase margin of approximately 60

. However,

the unity gain buffer is the most demanding circuit configu-
ration for loop stability and oscillations are most likely to
occur in this gain. If possible, use the device in a noise gain
of two or greater to improve phase margin and reduce the
susceptibility to oscillation. (Note that, from a stability
standpoint, an inverting gain of 1V/V is equivalent to a
noise gain of 2.) Gain and phase response for other gains are
shown in the Typical Performance Curves.

The high-frequency response of the OPA620 in a good
layout is very flat with frequency. However, some circuit
configurations such as those where large feedback
resistances are used, can produce high-frequency gain peak-
ing. This peaking can be minimized by connecting a small
capacitor in parallel with the feedback resistor. This capaci-
tor compensates for the closed-loop, high frequency, transfer
function zero that results from the time constant formed by
the input capacitance of the amplifier (typically 2pF after PC
board mounting), and the input and feedback resistors. The
selected compensation capacitor may be a trimmer, a fixed
capacitor, or a planned PC board capacitance. The capaci-
tance value is strongly dependent on circuit layout and
closed-loop gain. Using small resistor values will preserve
the phase margin and avoid peaking by keeping the break
frequency of this zero sufficiently high. When high closed-
loop gains are required, a three-resistor attenuator (tee
network) is recommended to avoid using large value
resistors with large time constants.

SETTLING TIME

Settling time is defined as the total time required, from the
input signal step, for the output to settle to within the
specified error band around the final value. This error band
is expressed as a percentage of the value of the output
transition, a 2V step. Thus, settling time to 0.01% requires
an error band of

200

V centered around the final value

of 2V.

Settling time, specified in an inverting gain of one, occurs in
only 25ns to 0.01% for a 2V step, making the OPA620 one
of the fastest settling monolithic amplifiers commercially
available. Settling time increases with closed-loop gain and
output voltage change as described in the Typical Perform-
ance Curves. Preserving settling time requires critical
attention to the details as mentioned under "Wiring Precau-
tions." The amplifier also recovers quickly from input
overloads. Overload recovery time to linear operation from
a 50% overload is typically only 30ns.

In practice, settling time measurements on the OPA620
prove to be very difficult to perform. Accurate measurement
is next to impossible in all but the very best equipped labs.
Among other things, a fast flat-top generator and high speed
oscilloscope are needed. Unfortunately, fast flat-top genera-

NOTE: Test fixture built using all surface-mount components. Ground
plane used on component side and entire fixture enclosed in metal case.
Both power supplies bypassed with 10

F Tantalum || 0.01

F ceramic

capacitors. It is directly connected (without cable) to TIME CAL trigger
source on Sampling Scope (Data Precision's Data 6100 with Model
640-1 plug-in). Input monitored with Active Probe (Channel 1).

FIGURE 7. Settling Time Test Circuit.

OPA620

0 to 2V

OUT

To Active Probe
(Channel 2)
on sampling scope.

100

0 to +2V, f = 1.25MHz

+5VDC

5VDC

2pF to 5pF (Adjust for Optimum Settling)

DIFFERENTIAL GAIN AND PHASE

Differential Gain (DG) and Differential Phase (DP) are
among the more important specifications for video applica-
tions. DG is defined as the percent change in closed-loop
gain over a specified change in output voltage level. DP is
defined as the change in degrees of the closed-loop phase
over the same output voltage change. Both DG and DP are
specified at the NTSC sub-carrier frequency of 3.58MHz.
DG and DP increase with closed-loop gain and output
voltage transition as shown in the Typical Performance
Curves. All measurements were performed using a Tektronix
model VM700 Video Measurement Set.

OPA620

DISTORTION

The OPA620's harmonic distortion characteristics into a
50

load are shown vs frequency and power output in the

Typical Performance Curves. Distortion can be further im-
proved by increasing the load resistance as illustrated in
Figure 8. Remember to include the contribution of the
feedback resistance when calculating the effective load
resistance seen by the amplifier.

FIGURE 8. 10MHz Harmonic Distortion vs Load Resistance.

G = +1V/V

V = 2Vp-p

10MHz HARMONIC DISTORTION

vs LOAD RESISTANCE

100

200

300

400

500

Harmonic Distortion (dBc)

Load Resistance ( )

G = +2V/V

Two-tone third-order intermodulation distortion (IM) is an
important parameter for many RF amplifier applications.
Figure 9 shows the OPA620's two-tone third-order IM
intercept vs frequency. For these measurements, tones were
spaced 1MHz apart. This curve is particularly useful for
determining the magnitude of the third-order IM products as
a function of frequency, load resistance, and gain. For
example, assume that the application requires the OPA620
to operate in a gain of +2V/V and drive 2Vp-p (4dBm for
each tone) into 50

at a frequency of 10MHz. Referring to

Figure 9 we find that the intercept point is +40dBm. The
magnitude of the third-order IM products can now be easily
calculated from the expression:

Third IMD = 2(OPI

P P

)

where OPI

P = third-order output intercept, dBm

= output level/tone, dBm/tone

Third IMD = third-order intermodulation ratio

below each output tone, dB

For this case OPI

P = 40dBm, P

= 4dBm, and the third-

order IMD = 2(40 10) = 72dB below either 4dBm tone.
The OPA620's low IMD makes the device an excellent
choice for a variety of RF signal processing applications.

FIGURE 9. 2-Tone, 3rd Order Intermodulation Intercept vs
Frequency.

100

G = +1V/V

OUT

250

G = +2V/V

G = +1V/V

Frequency (MHz)

Intercept Point (+dBm)

R = 50

R = 100

G = +2V/V

R = 50

R = 100

R = 400

2-TONE, 3

ORDER INTERMODULATION

INTERCEPT vs FREQUENCY

NOISE FIGURE

The OPA620's voltage and current noise spectral densities
are specified in the Typical Performance Curves. For RF
applications, however, Noise Figure (NF) is often the
preferred noise specification since it allows system noise
performance to be more easily calculated. The OPA620's
Noise Figure vs Source Resistance is shown in Figure 10.

NOISE FIGURE vs SOURCE RESISTANCE

100

10k

100k

NF (dB)

Source Resistance ( )

= 10log 1 +

+ (i

)

4kTR

FIGURE 10. Noise Figure vs Source Resistance.

OPA620

SPICE MODELS

Computer simulation using SPICE is often useful when
analyzing the performance of analog circuits and systems.
This is particularly true for Video and RF amplifier circuits
where parasitic capacitance and inductance can have a major
effect on circuit performance. A SPICE model using
MicroSim Corporation's PSpice is available for the OPA620.
This simulation model is available through the Burr-Brown
web site at www.burr-brown.com or by contacting the Burr-
Brown Applications Department.

RELIABILITY DATA

Extensive reliability testing has been performed on the
OPA620. Accelerated life testing (2000 hours) at maximum

operating temperature was used to calculate MTTF at an
ambient temperature of 25

C. These test results yield MTTF

of: Cerdip package = 1.31E+9 Hours, Plastic DIP = 5.02E+7
Hours, and SO-8 = 2.94E+7 Hours. Additional tests such as
PCT have also been performed. Reliability reports are avail-
able upon request for each of the package options offered.

DEMONSTRATION BOARDS

Demonstration boards are available to speed protyping. The
8-pin DIP packaged parts may be evaluated using the DEM-
OPA65XP board while the SO-8 packaged part may be
evaluated using the DEM-OPA65XU board. Both of these
boards come partially assembled from your local distributor
(the external resistors and the amplifier are not included).

FIGURE 13. Low Noise, Wideband FET Input Op Amp.

FIGURE 12. High-Q 1MHz Bandpass Filter.

* Select J

, J

and R

, R

to set

input stage current for optimum
performance.

Gain-Bandwidth

Slew Rate

Settling Time

: 1pA
: 6nV/

Hz at 1MHz

: 200MHz
: 250 V/

: 15ns to 0.1%

Feedback from pin 6 to the () FET
input required for stability.

= 1MHz

BW = 20kHz at 3dB
Q

= 50

OPA620

OUT

158

15.8k

158

1000pF

C
1000pF

OPA620

OUT

+5V

()

(+)

2N5911

FIGURE 11. Video Distribution Amplifier.

High output current drive capability (6Vp-p into 50

)

allows three back-terminated 75

transmission lines

to be simultaneously driven.

OPA620

OUT

390

Video

Input

75 Transmission Line

OUT

APPLICATIONS

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