TVP3409
Data Manual
Video Interface Palette
True-Color CMOS RAMDAC
SLAS092
September 1995
IMPORTANT NOTICE
Texas Instruments (TI) reserves the right to make changes to its products or to discontinue any
semiconductor product or service without notice, and advises its customers to obtain the latest
version of relevant information to verify, before placing orders, that the information being relied
on is current.
TI warrants performance of its semiconductor products and related software to the specifications
applicable at the time of sale in accordance with TI's standard warranty. Testing and other quality
control techniques are utilized to the extent TI deems necessary to support this warranty.
Specific testing of all parameters of each device is not necessarily performed, except those
mandated by government requirements.
Certain applications using semiconductor products may involve potential risks of death,
personal injury, or severe property or environmental damage ("Critical Applications").
TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORIZED, OR
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT APPLICATIONS, DEVICES
OR SYSTEMS OR OTHER CRITICAL APPLICATIONS.
Inclusion of TI products in such applications is understood to be fully at the risk of the customer.
Use of TI products in such applications requires the written approval of an appropriate TI officer.
Questions concerning potential risk applications should be directed to TI through a local SC
sales office.
In order to minimize risks associated with the customer's applications, adequate design and
operating safeguards should be provided by the customer to minimize inherent or procedural
hazards.
TI assumes no liability for applications assistance, customer product design, software
performance, or infringement of patents or services described herein. Nor does TI warrant or
represent that any license, either express or implied, is granted under any patent right, copyright,
mask work right, or other intellectual property right of TI covering or relating to any combination,
machine, or process in which such semiconductor products or services might be or are used.
Copyright
1995, Texas Instruments Incorporated
iii
Contents
Section
Title
Page
1
Introduction
11
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1.1
Features
11
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1.2
Applications
12
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1.3
Functional Block Diagram
12
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1.4
System Block Diagram
13
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1.5
Terminal Assignments
14
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1.6
Ordering Information
14
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1.7
Terminal Functions
15
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2
Detailed Description
21
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2.1
Register Descriptions
22
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2.2
Internal Register Set
24
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2.2.1 Write-Mode Address Register (WMA)
24
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2.2.2 Read-Mode Address Register (RMA)
24
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2.2.3 Look-Up Table Data Register (LUT)
25
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2.2.4 Pixel Read Mask Register (RMR)
25
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2.2.5 Manufacturer's Identification Register (MIR)
25
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2.2.6 Device Identification Register (DIR)
25
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2.2.7 Control Register 0 (CR0)
26
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2.2.8 Control Register 1 (CR1)
27
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2.2.9 Clock Synthesizer Control Register (CC)
28
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2.2.10 Clock Synthesizer Register Sets
29
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2.3
Reset State
210
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2.4
Programming From Reset
211
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2.5
Changing Clock Frequencies
212
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2.6
Functional Descriptions
212
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2.6.1 State Machine Access to Extended Registers
212
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2.6.2 Indexed Access to Extended Registers
212
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2.6.3 Color Modes
213
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2.6.4 Clock Synthesizers
217
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2.6.5 Clock Multiplier
218
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2.6.6 MPU Interface
219
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2.6.7 SENSE Output
220
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2.6.8 DAC Gain
220
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3
Electrical Characteristics
31
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3.1
Absolute Maximum Ratings Over Operating Free-Air Temperature Range
31
. . . .
3.2
Recommended Operating Conditions
31
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3.3
Electrical Characteristics Over Recommended Full Voltage and
Temperature Ranges
32
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3.3.1 DC Characteristics, Total Device
32
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iv
Contents (Continued)
Section
Title
Page
3.3.2 AC Characteristics, Supply Current, and Pipeline Delay
32
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3.4
Operating Characteristics Over Recommended Full Voltage and
Temperature Ranges
33
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3.4.1 DC Characteristics, Total Device
33
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3.4.2 DC Characteristics, Analog Outputs
33
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3.4.3 AC Characteristics, DAC Performance
34
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3.4.4 AC Characteristics, Clock Synthesizer
34
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3.5
Timing Requirements
35
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3.5.1 Total Device
35
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3.5.2 Pixel and Control Timing
35
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3.5.3 Microprocessor Port
35
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3.5.4 Clock Synthesizer
36
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3.6
Switching Characteristics
36
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3.6.1 DAC Performance
36
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3.6.2 Microprocessor Port
36
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3.6.3 Clock Synthesizer
37
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3.7
Timing Diagrams
38
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Appendix A
Application Information
A1
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Appendix B
Register Summary
B1
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Appendix C
Mechanical Data
C1
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v
List of Illustrations
Figure
Title
Page
21 State Diagram for Indirect Access to Extended Registers
213
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22 Mode 0 and Mode 3 Operation
216
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23 Mode 14, 24 Bits/Pixel, Packed in 16-Terminal Port Operation
217
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24 Clock Synthesizer Block Diagram
218
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25 DAC Output Comparison Circuitry
221
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26 RS-343A Composite Video Output Waveforms
221
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27 RS-343A Composite Video Output Waveforms (No Blank Pedestal)
222
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28 PS/2 Composite Video Output Waveforms
222
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31 Pixel Input and Video Output Timing
38
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32 Basic Read-Cycle Timing
38
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33 Basic Write-Cycle Timing
38
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34 Clock Synthesizer (OTCLKA or OTCLKB) Timing
39
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35 Clock Synthesizer Waveform Specifications (OTCLKA or OTCLKB)
39
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