ChipFind - документация

Электронный компонент: T14L1024N-10W

Скачать:  PDF   ZIP

Document Outline

TE
CH
tm
T14L1024N
TM Technology Inc. reserves the right P. 1
Publication Date: APR. 2002
to change products or specifications without notice.
Revision: C
SRAM
128K X 8 HIGH SPEED
CMOS STATIC RAM
FEATURES
Fast Address Access Times : 10/12/15ns
Single 3.3V 0.3V power supply
Center power/ground pin configuration
Low Power Consumption : 110/105/100mA
TTL I/O compatible
2.0V data retention mode
Automatic power-down when deselected
Available packages :
- 32-pin 300 mil and 400 mil SOJ
- 32-pin TSOP 8x13.4mm and 8x20mm
- 36-Ball CSP (8x10mm)
PART NUMBER EXAMPLES
PACKAGE SPEED
T14L1024N-10J SOJ 300mil 10ns
T14L1024N-10W SOJ 400 mil
10ns
T14L1024N-10P TSOP 8x13.4mm
10ns
T14L1024N-10H TSOP 8x20mm 10ns
T14L1024N-10C 36-Ball CSP 10ns
GENERAL DESCRIPTION
The T14L1024N is a one-megabit density, fast
static random access memory organized as
131,072
words by 8 bits. It is designed for
use in high performance
memory applications
such as main memory storage and high speed
communication buffers. Fabricated using high
performance CMOS technology, access times
down to 10ns are achieved.
BLOCK DIAGRAM
PIN DESCRIPTION
SYMBOL DESCRIPTION
A0 - A16
Address Inputs
I/O0 - I/O7
Data Inputs/Outputs
CE
Chip Select Inputs
WE
Write Enable
OE
Output Enable
Vcc Power
Supply
Vss Ground
DECODER
A0
A16
WE
OE
I/O7
Vcc
DATA I/O
CORE
ARRAY
Vss
CE
I/O0
.
.
.
.
.
.
.
TE
CH
tm
T14L1024N
TM Technology Inc. reserves the right P. 2
Publication Date: APR. 2002
to change products or specifications without notice.
Revision: C
PIN CONFIGURATION
TSOP
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
A0
A1
A2
A3
CE
I/O0
I/O1
VCC
VSS
I/O2
I/O3
WE
A4
A5
A6
A7
A16
A15
A14
A13
OE
I/O7
I/O6
VSS
VCC
I/O5
I/O4
A12
A11
A10
A9
A8
1
2
3
4
5
6
A
B
C
D
E
F
G
H
A 0
A 1
N C
A 3
A 6
A 8
I /O 4
A 2
W E
A 4
A 7
I /O 0
I /O 5
N C
A 5
I /O 1
V c c
V s s
I /O 2
I /O 3
V s s
V c c
I /O 6
N C
N C
I /O 7
A 9
A 1 0
A 1 1
A 1 2
A 1 3
A 1 4
A 1 5
A 1 6
C E
O E
36-Ball CSP TOP VIEW (Ball Down)
A3
A2
CE
I/O0
I/O1
Vss
Vcc
I/O2
I/O3
WE
A4
A5
A1
A0
28
27
26
25
23
24
22
21
20
19
18
17
32
29
1
2
3
4
6
5
7
8
9
10
11
12
15
16
A16
OE
I/O7
I/O6
Vss
I/O5
A12
A11
A10
A15
A14
A13
Vcc
I/O4
A6
A7
30
31
13
14
A9
A8
SOJ
TE
CH
tm
T14L1024N
TM Technology Inc. reserves the right P. 3
Publication Date: APR. 2002
to change products or specifications without notice.
Revision: C
DC CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS
PARAMETER SYM
RATING
UNIT
Power Supply Voltage
Vcc
-0.5 to 4.6
V
Input Voltage
V
IN
-0.5 to Vcc+0.5
V
Output Voltage
V
OUT
-0.5 to Vcc+0.5
V
Operating Temperatrue
T
OPR
0 to +70
C
Storage Temperature
T
STG
-55 to +150
C
Power Dissipation
P
D
1.0 W
Short Circuit Output Current
I
OUT
50 mA
TRUTH TABLE
CE
OE
WE
MODE I/O0-
I/O7 Vcc
H X X Not
Selected
High-Z
I
SB,
I
SB1
X X X Not
Selected
High-Z
I
SB,
I
SB1
L H H Output
Disable
High-Z
Icc
L L H
Read
Data
Out
Icc
L X L
Write
Data
In
Icc
OPERATING CHARACTERISTICS
(Vcc = 3.3V
0.3V, Ta = 0 to 70
C)
PARAMETER SYM. TEST
CONDITIONS
MIN.
MAX.
UNIT
Power Supply Voltage
Vcc
3.0
3.6
V
Input Low Voltage
V
IL
-0.5
0.8
V
Input High Voltage
V
IH
2.1
Vcc+0.3
V
Input Leakage Current
I
LI
V
IN
=Vss to Vcc
- 5
uA
Output Leakage Current
I
LO
V
IN
=Vss to Vcc ,
CE
= V
IH
OE
= V
IH
or WE = V
IL
- 5
uA
Output Low Voltage
V
OL
I
OL
= 4.0 mA
- 0.4
V
Output High Voltage
V
OH
I
OH
=-2.0 mA
2.4
-
V
Operating Power
Icc
CE
=
V
IL
10ns - 110 mA
Supply Current
f=max
12ns
-
105
mA
IO = 0mA
15ns
-
100
mA
Standby Power
I
SB
CE
=
V
IH
, IO = 0mA
- 25
mA
Supply Current
I
SB1
Vcc = max;
CE
Vcc-0.2V; f=0mhz;
IO = 0mA
- 5
mA
Note: Typical characteristics are at Vcc = 3.3V, Ta = 25
C
TE
CH
tm
T14L1024N
TM Technology Inc. reserves the right P. 4
Publication Date: APR. 2002
to change products or specifications without notice.
Revision: C
RECOMMENDED OPERATING CONDITIONS
PARAMETER SYM
MIN
TYP
MAX
UNIT
Supply Voltage
Vcc
Typ-0.3
3.3
Typ+0.3
V
Input Voltage, low
V
IL
-0.3
-
0.8
V
Input Voltage, high
V
IH
2.1
-
Vcc+0.3
V
Ambient Temperature
T
A
0
-
70
C
CAPACITANCE
PARAMETER SYMBOL
CONDITION
MAX.
UNIT
Input Capacitance
C
IN
V
IN
= 0V
6 pF
Input/ Output Capacitance
C
I/O
V
OUT
= 0V
8 pF
Note: These parameters are sampled but not 100% tested.
AC TEST CONDITIONS
PARAMETER CONDITIONS
Input Pulse Levels
0V to 3V
Input Rise and Fall Times
3.0 ns
Input and Output Timing Reference Level
1.5V
Output Load
C
L
=30pF,
I
OH
/
I
OL
= -2mA/4mA

AC TEST LOADS AND WAVEFORM
RL=50 ohm
OUTPUT
Zo=50 ohm
30pF
R1 319 ohm
3.3V
OUTPUT
5pF
Including
Jig and
Scope
R2
353 ohm
(For T
CLZ
, T
OLZ
, T
CHZ
, T
OHZ
, T
WHZ
, T
OW
)
Vt=1.5V
TE
CH
tm
T14L1024N
TM Technology Inc. reserves the right P. 5
Publication Date: APR. 2002
to change products or specifications without notice.
Revision: C
AC CHARACTERISTICS
(
Vcc
=3.3V
0.3V, Vss = 0V, Ta = 0 to 70
C)
(1) READ CYCLE
T14L1024N-10 T14L1024N-12 T14L1024N-15
PARAMETER SYM.
MIN. MAX. MIN. MAX. MIN. MAX.
UNIT
Read Cycle Time
t
RC
10 - 12 - 15 - ns
Address Access Time
t
AA
- 10 - 12 - 15
ns
Chip Enable Access Time
t
ACS
- 10 - 12 - 15
ns
Output Enable to Output Valid
t
AOE
- 6 - 7 - 7
ns
Chip Enable to Output in Low Z
t
CLZ*
3 - 3 - 3 - ns
Output Enable to Output in Low Z
t
OLZ*
0 - 0 - 0 - ns
Chip Disable to Output in High Z
t
CHZ*
- 5 - 6 - 7
ns
Output Disable to Output in High Z
t
OHZ*
- 5 - 6 - 7
ns
Output Hold from Address Change
t
OH
3 - 3 - 3 - ns
* These parameters are sampled but not 100% tested.

(2)WRITE CYCLE
T14L1024N-10 T14L1024N-12 T14L1024N-15
PARAMETER SYM.
MIN. MAX. MIN. MAX. MIN. MAX.
UNIT
Write Cycle Time
t
WC
10 - 12 - 15 - ns
Chip Enable to End of Write
t
CW
8 - 10 - 11 - ns
Address Valid to End of Write
t
AW
8 - 10 - 11 - ns
Address Setup Time
t
AS
0 - 0 - 0 - ns
Write Pulse Width
t
WP
8 - 10 - 11 - ns
Write Recovery Time
t
WR
0 - 0 - 0 - ns
Data Valid to End of Write
t
DW
6 - 8 - 8 - ns
Data Hold from End of Write
t
DH
0 - 0 - 0 - ns
Write to Output in High Z
t
WHZ*
- 5 - 6 - 6
ns
Output Disable to Output in High Z
t
OHZ*
- 5 - 6 - 7
ns
Output Active from End of Write
t
OW
0 - 0 - 0 - ns
* These parameters are sampled but not 100% tested.