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Электронный компонент: T15V256A-85R

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TE
CH
tm
T15V256A
Taiwan Memory Technology, Inc. reserves the right P. 1
Publication Date: SEP. 2001
to change products or specifications without notice.
Revision:A
SRAM
32K X 8 LOW POWER
CMOS STATIC RAM
FEATURES
High speed access time: 50/70/85/100ns
Power supply current : Operating :35mA(max)
Standby : 5uA
Power supply : 2.7V to 3.6V
Fully static operation No clock or refreshing
required
All inputs and outputs directly LVTTL compatible
Common I/O capability
Data retention voltage : 1.5V (min)
Available packages :28-pin SOP ,TSOP-I
(8x13.4mm forward type and reverse type).
Operating temperature :
- 0 ~ +70
C
- -40 ~ +85
C

PART NUMBER EXAMPLES
PART NO.
PACKAGE
CODE
Operating
Temperature
T15V256A-70D
T15V256A-85P
T15V256A-85R
D=SOP
P=
TSOP-I(Forward)
R=
TSOP-I(Reverse)
0 ~ +70
C
T15V256A-70DI
T15V256A-85PI
T15V256A-85RI
D=SOP
P=
TSOP-I(Forward)
R=
TSOP-I(Reverse)
-40 ~ +85
C

GENERAL DESCRIPTION
The T15V256A is a low power and low
voltage CMOS static RAM. organized as 32,768 x
8 bits that operates on a 2.7V to 3.6V power
supply. Data retention is guaranteed at a power
supply voltage as low as 1.5V. This device is
packaged in a standard 28-pin SOP or TSOP-I
forward and reverse type.

BLOCK DIAGRAM
DECODER
CONTROL
A0
A14
CS
OE
WE
I / O1
I / O8
Vcc
DATA I/O
CORE
ARRAY
Vss
.
.
.
.
.
TE
CH
tm
T15V256A
Taiwan Memory Technology, Inc. reserves the right P. 2
Publication Date: SEP. 2001
to change products or specifications without notice.
Revision:A
PIN CONFIGURATION
(Top View)
A12
A14
A7
A6
A5
A3
A4
A2
A1
A0
I/O1
I/O2
I/O3
Vss
28
27
26
25
23
24
22
21
20
19
18
17
16
15
1
2
3
4
6
5
7
8
9
10
11
12
13
14
Vcc
A13
A8
A9
A11
A10
I/O8
I/O7
I/O6
I/O5
I/O4
WE
OE
CS
SOP




PIN DESCRIPTION
SYMBOL
DESCRIPTION
A0 - A14
Address Inputs
I/O1 - I/O8
Data Inputs/Outputs
CS
Chip Select Inputs
WE
Write Enable
OE
Output Enable
Vcc
Power Supply
Vss
Ground

TSOP-I
Forward
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
OE
A11
A9
A8
A13
WE
VCC
A14
A12
A7
A6
A5
A4
A3
A10
CS
I/O8
I/O7
I/O6
I/O5
I/O4
VSS
I/O3
I/O2
I/O1
A0
A1
A2
TSOP-I
Reverse
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
A3
A4
A5
A6
A7
A12
A14
VCC
WE
A13
A8
A9
A11
OE
A2
A1
A0
I/O1
I/O2
I/O3
VSS
I/O4
I/O5
I/O6
I/O7
I/O8
CS
A10
TE
CH
tm
T15V256A
Taiwan Memory Technology, Inc. reserves the right P. 3
Publication Date: SEP. 2001
to change products or specifications without notice.
Revision:A
DC CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS
PARAMETER
RATING
UNIT
Supply Voltage to Vss Potential
-0.5 to + 4.6
V
Inputs to Vss Potential
-0.5 to Vcc +0.5
V
Power Dissipation
0.7
W
Storage Temperature
-60 to +150
C
RECOMMENDED OPERATING CONDITIONS
PARAMETER
SYM
MIN
TYP
MAX
UNIT
Supply Voltage
Vcc
2.7
-
3.6
V
Input Voltage, low
V
IL
-0.3
-
0.6
V
Input Voltage, high
V
IH
2.4
-
Vcc+0.3
V
Ambient Temperature
T
A
0/-40
-
+75/+85
C
TRUTH TABLE
CS
OE
WE
MODE
I/O1- I/O8
Power
H
X
X
Not Selected
High-Z
Standby
L
H
H
Output Disable
High-Z
Active
L
L
H
Read
Data Out
Active
L
X
L
Write
Data In
Active
OPERATING CHARACTERISTICS
(Vcc = 2.7V to 3.6V, Vss = 0V, Ta =
0 ~ +70
C
/-40 to 85
C)
PARAMETER
SYM.
TEST CONDITIONS
MIN. TYP. MAX. UNIT
Input Leakage Current
I
LI
Vin=Vss to Vcc
-
-
1
A
Output Leakage Current
I
LO
V
I/O
=Vss to Vcc ,
CS
=
V
IH
or
OE
=
V
IH
or
WE
=
V
IL
-
-
1
A
Output Low Voltage
V
OL
I
OL
= + 2.1mA
-
-
0.4
V
Output High Voltage
V
OH
I
OH
= - 1.0mA
2.2
-
-
V
-50
-
-
35
mA
-70
-
-
30
mA
-85
-
-
25
mA
Operating Power
Supply Current
Icc
CS
=
V
IL
, I/O=0mA
Cycle = MIN.
Duty = 100%
-100
-
-
20
mA
I
SB
CS
=
V
IH
, Cycle=min, Duty=100%
-
-
0.3
mA
Standby Power
Supply Current
I
SB1
CS
Vcc
-0.2V
-
-
5
uA
TE
CH
tm
T15V256A
Taiwan Memory Technology, Inc. reserves the right P. 4
Publication Date: SEP. 2001
to change products or specifications without notice.
Revision:A
CAPACITANCE
(Vcc = 2.7V to 3.6V, Ta = 25
C, f = 1 MHz)
PARAMETER
SYMBOL
CONDITION
MAX.
UNIT
Input Capacitance
C
IN
V
IN
= 0V
6
pF
Input/ Output Capacitance
C
I/O
V
OUT
= 0V
8
pF
Note: These parameters are sampled but not 100% tested.
AC TEST CONDITIONS
PARAMETER
CONDITIONS
Input Pulse Levels
0.6V to 2.4V
Input Rise and Fall Times
3 ns
Input and Output Timing Reference Level
1.4V
Output Load
See Fig. 1,2
AC TEST LOADS AND WAVEFORM

R1 - 1210 ohm
3.0V
OUTPUT
30pF
Including
Jig and
Scope
R2
1380 ohm
R1- 1210 ohm
3.0V
OUTPUT
5pF
Including
Jig and
Scope
R2
1380
ohm
(For T
CLZ
, T
OLZ
, T
CHZ
, T
OHZ
, T
WHZ
, T
OW
)
Fig 1
Fig 2
TE
CH
tm
T15V256A
Taiwan Memory Technology, Inc. reserves the right P. 5
Publication Date: SEP. 2001
to change products or specifications without notice.
Revision:A
AC CHARACTERISTICS
(
Vcc
=2.7V to 3.6V, Vss = 0V, Ta =
0 ~ +70
C
/-40 to 85
C)
(1) READ CYCLE
-50ns
-70ns
-85ns
-100ns
PARAMETER
SYM.
MIN MAX MIN. MAX. MIN. MAX. MIN. MAX.
UNIT
Read Cycle Time
t
RC
50
-
70
-
85
-
100
-
ns
Address Access Time
t
AA
-
50
-
70
-
85
-
100
ns
Chip Select Access Time
t
ACS
-
50
-
70
-
85
-
100
ns
Output Enable to Output Valid
t
AOE
-
25
-
35
-
40
-
50
ns
Chip Selection to Output in Low Z
t
CLZ*
7
-
10
-
10
-
10
-
ns
Output Enable to Output in Low Z
t
OLZ*
5
-
5
-
5
-
5
-
ns
Chip Deselection to Output in High Z
t
CHZ*
-
20
-
25
-
30
-
30
ns
Output Disable to Output in High Z
t
OHZ*
-
20
-
25
-
30
-
30
ns
Output Hold from Address Change
t
OH
10
-
10
-
10
-
10
-
ns
* These parameters are measured with 5pF test load.

(2)WRITE CYCLE
-50ns
-70ns
-85ns
-100ns
PARAMETER
SYM.
MIN MAX MIN. MAX. MIN. MAX. MIN. MAX.
UNI
T
Write Cycle Time
t
W C
50
-
70
-
85
-
100
-
ns
Chip Selection to End of Write
t
CW
40
-
60
-
70
-
80
-
ns
Address Valid to End of Write
t
A W
40
-
60
-
70
-
80
-
ns
Address Setup Time
t
AS
0
-
0
-
0
-
0
-
ns
Write Pulse Width
t
W P
30
-
50
-
60
-
70
-
ns
Write Recovery Time
t
W R
0
-
0
-
0
-
0
-
ns
Data Valid to End of Write
t
DW
25
-
30
-
35
-
40
-
ns
Data Hold from End of Write
t
DH
0
-
0
-
0
-
0
-
ns
Write to Output in High Z
t
WHZ*
-
20
-
25
-
30
-
30
ns
Output Active from End of Write
t
OW
5
-
5
-
5
-
5
-
ns
* These parameters are measured with 5pF test load.