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Электронный компонент: TB62209FG

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TB62209FG
2005-03-02
1
TOSHIBA BiCD Processor IC Silicon Monolithic
TB62209FG
Stepping Motor Driver IC Using PWM Chopper Type


The TB62209FG is a stepping motor driver driven by chopper
micro-step pseudo sine wave.
The TB62209FG integrates a decoder for CLK input in micro
steps as a system to facilitate driving a two-phase stepping motor
using micro-step pseudo sine waves. Micro-step pseudo sine
waves are optimal for driving stepping motors with low-torque
ripples and at low oscillation. Thus, the TB62209FG can easily
drive stepping motors with low-torque ripples and at high
efficiency.
Also, TB62209FG consists output steps by DMOS (Power MOS
FET), and that makes possible to control the output power
dissipation much lower than ordinary IC with bipolar transistor
output.
The IC supports Mixed Decay mode for switching the attenuation ratio at chopping. The switching time for the
attenuation ratio can be switched in four stages according to the load.
Features
Bipolar stepping motor can be controlled by a single driver IC
Monolithic BiCD IC
Low ON-resistance of R
on
= 0.5 (T
j
= 25C @1.0 A: typ.)
Built-in decoder and 4-bit DA converters for micro steps
Built-in ISD, TSD, V
DD
&V
M
power monitor (reset) circuit for protection
Built-in charge pump circuit (two external capacitors)
36-pin power flat package (HSOP36-P-450-0.65)
Output voltage: 40 V max
Output current: 1.8 A/phase max
2-phase, 1-2 (type 2) phase, W1-2 phase, 2W1-2 phase, 4W1-2 phase, or motor lock mode can be selected.
Built-in Mixed Decay mode enables specification of four-stage attenuation ratio.
Chopping frequency can be set by external resistors and capacitors.
High-speed chopping possible at 100 kHz or higher.
Note: When using the IC, pay attention to thermal conditions. These devices are easy damage by high static
voltage. In regards to this, please handle with care.
Weight: 0.79 g (typ.)
TB62209FG
2005-03-02
2
Block Diagram
1. Overview

RESET
CW/CCW
ENABLE
STANDBY
D MODE 3
D MODE 2
D MODE 1
CLK
R
S
V
M
Ccp C
Ccp B
Ccp A
MO
V
DD
TORQUE 1 TORQUE 2
MDT 1
MDT 2
Chopper OSC
Current Level Set
Current Feedback (
2)
Protection Unit
TSD
protect
V
ref
STANDBY
ENABLE V
M
V
DD
Stepping
Motor




Micro-step decoder
Torque control
4-bit D/A
(sine angle control)
V
RS 1
R
S COMP 1
V
RS 2
R
S COMP 2

Charge
Pump
Unit
Output (H-bridge)
2
OCS
CR-CLK
converter

Output control
(Mixed Decay control)
TSD
ISD
V
DDR
/V
MR
protect
CR
V
M
TB62209FG
2005-03-02
3
2. LOGIC UNIT A/B (C/D unit is the same as A/B unit)
Function
This circuit is used to input from the DATA pins micro-step current setting
data and to transfer
them to the subsequent stage. By switching the SETUP pin, the data in the mixed decay
timing table
can be overwritten.

D MODE 1
D MODE 2
D MODE 3
CW/CCW
CLK
STANDBY
MDT 1
MDT 2
Decay
2 bit
A unit side
TORQUE 1
TORQUE 2
DATA MODE
Micro-step decoder
Micro-step
current data
4 bit
A unit side
Phase
1 bit
A unit side
Current
feedback
circuit
Mixed
Decay
circuit
Output
control
circuit
D/A circuit
Output
control
circuit
ENABLE
RESET
Torque
2 bit
Decay
2 bit
B unit side
Phase
1 bit
B unit side
Micro-step
current data
4 bit
B unit side
TB62209FG
2005-03-02
4
3. Current feedback circuit and current setting circuit
Function
The current setting circuit is used to set the reference voltage of the output current using the current
setting decoder.
The current feedback circuit is used to output to the output control circuit the relation between the
set current value and
output current. This is done by comparing the reference voltage output to the
current setting circuit with the potential difference generated when current flows through the current
sense resistor connected between R
S
and V
M
.
The chopping waveform generator circuit to which CR is connected is used to generate clock used as
reference for the chopping frequency.
Note 1: R
S COMP1
: Compares the set current with the output current and outputs a signal when the output
current reaches the set current.
Note 2: R
S COMP2
: Compares the set current with the output current at the end of Fast mode during chopping.
Outputs a signal when the set current is below the output current.


Waveform shaping circuit
V
M
R
S
V
ref
100
85
70
50
Chopping waveform
generator circuit
CR
V
RS
circuit 1
(detects
potential
difference
between
R
S
and V
M
)
R
S COMP
circuit
1
(Note 1)
NF
(set current
reached signal)
V
RS
circuit 2
(detects
potential
difference
between
V
M
and R
S
)
R
S COMP
circuit
2
(Note 2)
RNF
(set current
monitor signal)
<
Use in FAST MODE
>
<
Use in Charge mode
>





Output
control
circuit
Mixed
Decay
timing
circuit
Output stop signal (ALL OFF)
Chopping reference circuit
0
Current feedback
circuit
Torque
control
circuit
Current setting
circuit
D/A circuit
TORQUE
0, 1
CURRENT
0-3
Decoder
Unit
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
Micro-step
current
setting
selector
circuit
4-bit
D/A
circuit
TB62209FG
2005-03-02
5
4. Output control circuit, current feedback circuit and current setting circuit

Note: The STANDBY pins are pulled down in the IC by 100-k
resistor.
When not using the pin, connect it to GND. Otherwise, malfunction may occur.
ISD
circuit
Output pin
V
MR
circuit
V
M
V
DDR
circuit
V
DD
TSD
circuit

Current
feedback
circuit
Current
setting
circuit




Charge
pump
circuit
Cop
A
CR counter
CR Selector
Chopping
reference circuit
Micro-step current setting
decoder circuit
V
DD
V
M
LOGIC
V
DDR
: V
DD
power on
Reset
V
MR
: V
M
power on Reset
ISD: Current shutdown
circuit
TSD: Thermal shutdown
circuit
Protection
circuit
Charge pump
circuit
Micro-step current
setup latch
clear signal
Mixed Decay
timing table clear
signal
Cop
B
Cop
C
PHASE
DECAY
MODE
Mixed
Decay
timing
circuit
Output RESET signal
Output circuit
Output
circuit
Charge
pump
halt
signal
Power supply for
upper drive output
V
H
STANDBY

NF set current
reached signal

RNF set current
monitor signal

Output stop
signal


Output control circuit





Internal
stop
signal
select
circuit
Mixed
Decay
timing
Charge Start
U1
U2
L1
L2
TB62209FG
2005-03-02
6
5. Output equivalent circuit (A/B unit (C/D unit is the same as A/B unit)












































Note: The diode on the dotted line is parasitic diode.
V
M B
U1
L1
U2
L2
To V
M
From output
control
circuit
Output
A
Output A
R
S A
R
RS A
M
U1
L1
U2
L2
PGND
From output
control
circuit
Output
B
Output B
R
RS B
Power
supply
for upper
drive output
(V
H
)
U1
U2
L1
L2
Output
driver
circuit
Phase B
R
SB
V
M A
Power
supply
for upper
drive output
(V
H
)
U1
U2
L1
L2
Output
driver
circuit
Phase A
TB62209FG
2005-03-02
7
6. Input
equivalent
circuit
1.
Input circuit (CLK, TORQUE, MDT, CW/CCW, DATA MODE, Decay Mode)

2.
Input circuit (RESET, ENABLE, STANDBY )

3. V
ref
input circuit
4.
Output circuit (MO, PROTECT)
V
DD
V
SS
OUT
150
GND
V
DD
V
SS
IN
150
To Logic IC
GND
100 k
V
DD
V
SS
IN
150
To Logic IC
GND
V
DD
V
SS
IN
To D/A circuit
GND
2
TB62209FG
2005-03-02
8
Pin Assignment
(top view)

Pin Assignment for PWM in Data Mode
D MODE 1 GA+ (OUT A, A )
D MODE 2 GA- (OUT A, A )
D MODE 3 GB+ (OUT B, B )
CW/CCW GB- (OUT B, B )
Note: Pin assignment above is different at data mode and PWM.
1
D MODE 1
2
D MODE 2
36
35
CR
CLK
3
D MODE 3
4
CW/CCW
5
V
DD
6
V
ref
7
NC
8
NC
9
R
S B
(F
IN
)
10
R
S A
11
NC
12
NC
13
VM
14
STANDBY
15
Ccp A
16
Ccp B
17
Ccp C
18
MO
34 ENABLE
33 OUT B
32 RESET
31 DATA MODE
30 NC
29 OUT B
28 PGND
(F
IN
)
27 PGND
26 OUT A
25 NC
24 MDT 2
23 MDT 1
22 OUT A
21 TORQUE2
20 TORQUE1
19 PROTECT
TB62209FG
TB62209FG
2005-03-02
9
Pin Description 1
Pin Number
Pin Name
Function
Remarks
1
D MODE 1
2
D MODE 2
3
D MODE 3
Motor drive mode setting pin
D MODE 3, 2, 1
=
LLL: Same function as that of
STANDBY pin
LLH: Motor Lock mode
LHL: 2-Phase Excitation mode
LHH: 1-2 Phase Excitation (A) mode
HLL: 1-2 Phase Excitation (B) mode
HLH: W1-2 Phase Excitation mode
HHL: 2W1-2 Phase Excitation mode
HHH: 4W1-2 Phase Excitation mode
4
CW/CCW
Sets motor rotation direction
CW: Forward rotation
CCW: Reverse rotation
5 V
DD
Logic power supply connecting pin
Connect to logic power supply (5 V).
6 V
ref
Reference power supply pin for setting output
current
Connect to supply voltage for setting current.
7 NC
Not
connected
Not
wired
8 NC
Not
connected
Not
wired
9 R
S B
Unit-B power supply pin
(connecting pin for power detection resistor)
Connect current sensing resistor between this
pin and V
M
.
F
IN
F
IN
FIN Logic ground pin
Connect to power ground.
The pin functions as a heat sink. Design pattern
taking heat into consideration.
10 R
S A
Unit-A power supply pin
(pin connecting power detection resistor)
Connect current sensing resistor between this
pin and V
M
.
11 NC
Not
connected
Not
wired
12 NC
Not
connected
Not
wired
Pin Assignment for PWM in Data Mode
D MODE 1 GA+ (OUT A, A )
D MODE 2 GA- (OUT A, A )
D MODE 3 GB+ (OUT B, B )
CW/CCW GB- (OUT B, B )
TB62209FG
2005-03-02
10
Pin Description 2
Pin Number
Pin Name
Function
Remarks
13 V
M
Motor power supply monitor pin
Connect to motor power supply.
14
STANDBY
All-function-initializing and Low Power
Dissipation mode pin
H: Normal operation
L: Operation halted
Charge pump output halted
15 Ccp
A
Pin connecting capacitor for boosting output
stage drive power supply (storage side
connected to GND)
Connect capacitor for charge pump (storage
side) V
M
and V
DD
are generated.
16 Ccp
B
Pin connecting capacitor for boosting output
stage drive power supply
Connect capacitor for charge pump (charging
side) between this pin and Ccp C.
17
Ccp C
(charging side)
Connect capacitor for charge pump (charging
side between this pin and Ccp B.
18 MO
Electrical
angle
(0
) monitor pin
Outputs High level in 4W1-2, 2W1-2, W1-2, or
1-2 Phase Excitation mode with electrical angle
of 0
(phase B: 100%, phase A: 0%).
In 2-Phase Excitation mode, outputs High level
with electrical angle of 0
(phase B: 100%,
phase A: 100%).
19
PROTECT
TSD operation detector pin
Detects thermal shut down (TSD) and outputs
High level.
20 TORQUE
1
21 TORQUE
2
Motor torque switch setting pin
Torque 2, 1
=
HH: 100%
LH:
85%
HL:
70%
LL:
50%
22 OUT
A Channel
A output pin
23 MDT
1
24 MDT
2
Mixed Decay mode setting pins
MDT 2, 1
=
HH:
100%
HL:
75%
LH:
37.5%
LL:
12.5%
TB62209FG
2005-03-02
11
Pin Description 3
Pin Number
Pin Name
Function
Remarks
25 NC
Not
connected
Not
wired
26
OUT A
Channel A output pin
Connect to motor
27
PGND
Power ground pin
Connect all power ground pins and V
SS
to GND.
F
IN
F
IN
Logic ground pin
The pin functions as a heat sink. Design pattern
taking heat into consideration.
28
PGND
Power ground pin
Connect all power ground pins to GND.
29
OUT B
Channel B output pin
Connect to motor
30 NC
Not
connected
Not
wired
31
DATA MODE
Clock input and PWM
H: Controls external PWM.
L: CLK-IN mode
We recommend this pin normally be used as
CLK-IN mode pin (Low).
In PWM mode, functions such as constant
current control do not operate.
32
RESET
Initializes electrical angle.
Forcibly initializes electrical angle.
At this time we recommend ENABLE pin be set
to Low to prevent misoperation.
H: Resets electrical angle.
L: Normal operation
33 OUT
B Channel
B output pin
34
ENABLE
Output enable pin
Forcibly turns all output transistors off.
35 CLK
Inputs CLK for determining number of motor
rotations.
Electrical angle is incremented by one for each
CLK input.
CLK is reflected at rising edge.
36 CR
Chopping reference frequency reference pin (for
setting chopping frequency)
Determines chopping frequency.
TB62209FG
2005-03-02
12
1. Function
of
CW/CCW
CW/CCW switches the direction of stepping motor rotation.
Input Function
H Forward
(CW)
L Reverse
(CCW)

2. Function of MDT 1/MDT 2
MDT 1/MDT 2 specifies the current attenuation speed at constant current control.
The larger the rate (%), the larger the attenuation of the current. Also, the peak current value (current
ripple) becomes larger. (Typical value is 37.5%.)
MDT 2
MDT 1
Function
L
L
12.5% Mixed Decay mode
L
H
37.5% Mixed Decay mode
H
L
75% Mixed Decay mode
H
H
100% Mixed Decay mode (Fast Decay mode)

3. Function of TORQUE X
TORQUE X changes the current peak value in four steps. Used to change the value of the current used,
for example, at startup and fixed-speed rotation.
TORQUE 2
TORQUE 1
Comparator Reference Voltage
H H
100%
L H
85%
H L
70%
L L
50%

4. Function of RESET (forced initialization of electrical angle)
With the CLK input method (decoder method), unless CLKs are counted, except MO, where the electrical
angle is at that time is not known. Thus, this method is used to forcibly initialize the electrical angle.
For example, used to change the excitation mode to another drive mode during output from MO
(electrical angle = 0).
Input Function
H
Initializes electrical angle to 0
L Normal
operation
TB62209FG
2005-03-02
13
5. Function of ENABLE (output operation)
ENABLE forcibly turns OFF all output transistors at operation.
Data such as electrical angle and operating mode are all retained.
Input Function
H
Operation enabled (active)
L
Output halted (operation other
than output active)

6. Function
of STANDBY
STANDBY halts the charge pump circuit (power supply booster circuit) as well as halting output.
We recommend setting to Standby mode at power on.
(At this time, data on the electrical angle are retained.)
Input Function
H
Operation enabled (active)
L
Output halted (Low Power
Dissipation mode)
Charge pump halted

7. Functions of Excitation Modes
Excitation
Mode DM3 DM2
DM1 Remarks
1
Low Power
Dissipation mode
0 0 0
Standby mode
Charge pump halted
2
Motor Lock mode
0
0
1
Locks only at 0
electrical angle.
3
2-Phase Excitation
mode
0 1 0
45
135
225
315
45
4
1-2 Phase Excitation
(A)
0
1
1
Low-torque, 1-bit micro-step change
5
1-2 Phase Excitation
(B)
1
0
0
High-torque, 1-bit micro-step change
6
W1-2 Phase
Excitation
1 0 1
2-bit
micro-step
change
7
2W1-2 Phase
Excitation
1 1 0
3-bit
micro-step
change
8
4W1-2 Phase
Excitation
1 1 1
4-bit
micro-step
change
TB62209FG
2005-03-02
14
8. Function of DATA MODE
DATA MODE switches external duty control (forced PWM control) and constant current CLK-IN control.
In Phase mode, H-bridge can be forcibly inverted and output only can be turned off. Constant current drive
including micro-step drive can only be controlled in CLK-IN mode.
Input Function
H PHASE
MODE
L CLK-IN
MODE
Note 1: Normally, use CLK-IN mode.

9. Electrical Angle Setting immediately after Initialization
In Initialize mode (immediately after RESET is released), the following currents are set.
In Low Power Dissipation mode, the internal decoder continues incrementing the electrical angle but
current is not output.
Note that the initial electrical angle value in 2-Phase Excitation mode differs from that in nW1-2 (n = 0,
1, 2, 4) Phase Excitation mode.
Excitation Mode
IB (%)
IA (%)
Remarks
1
Low Power
Dissipation mode
100
0
Electrical angle incremented but no current output
2
Motor Lock mode
100
0
Electrical angle incremented but no motor rotation
due to no IA output
3 2-Phase
Excitation
100
100
45
4
1-2 Phase Excitation
(A)
100 0
0
5
1-2 Phase Excitation
(B)
100 0
0
6
W1-2 Phase
Excitation
100 0
0
7
2W1-2 Phase
Excitation
100 0
0
8
4W1-2 Phase
Excitation
100 0
0
Note 2: Where, IB
=
100% and IA
=
0%, the electrical angle is 0
. Where, IB
=
0% and IA
=
100%, the electrical
angle is
+
90
.

TB62209FG
2005-03-02
15
10. Function of DATA MODE (Phase A mode used for explanation)
DATA MODE inputs the external PWM signal (duty signal) and controls the current. Functions such as
constant current control and overcurrent protector do not operate.
Use this mode only when control cannot be performed in CLK-IN mode.
GA
+
GA
-
Output
State
(1) L
L
Output
off
(2) L
H
A
+
phase: Low A
-
phase: High
(3) H
L
A
+
phase: High A
-
phase: Low
(4) H
H
Output
off

Note: Output is off at (1) and (4).
D MODE 1 GA+ (OUT A, A )
D MODE 2 GA- (OUT A, A )
D MODE 3 GB+ (OUT B, B )
CW/CCW GB- (OUT B, B )
U1
L1
U2
L2
OFF
OFF
PGND
OFF
OFF
(1)
(4)
U1
L1
U2
L2
OFF
OFF
ON
ON
(Note)
Load
PGND
(2)
U1
L1
U2
L2
OFF
OFF
ON
ON
(Note)
Load
PGND
(3)
TB62209FG
2005-03-02
16
Maximum Ratings
(Ta
=
25C)
Characteristics Symbol
Rating
Unit
Logic supply voltage
V
DD
7 V
Motor supply voltage
V
M
40
V
Output current
(Note 1)
I
OUT
1.8
A/phase
Current detect pin voltage
V
RS
V
M
4.5 V
V
Charge pump pin maximum voltage
(CCP1 Pin)
V
H
V
M
+
7.0
V
Logic input voltage
(Note 2)
V
IN
to
V
DD
+
0.4
V
(Note 3)
1.4
Power dissipation
(Note 4)
P
D
3.2
W
Operating temperature
T
opr
-
40 to 85
C
Storage temperature
T
stg
-
55 to 150
C
Junction temperature
T
j
150
C
Note 1: Perform thermal calculations for the maximum current value under normal conditions. Use the IC at 1.5 A or
less per phase.
The current velue maybe controled according to the ambient temperature or board conditions.
Note 2: Input 7 V or less as V
IN
.
Note 3: Measured for the IC only. (Ta
=
25C)
Note 4: Measured when mounted on the board. (Ta
=
25C)
Ta: IC ambient temperature
T
opr
: IC ambient temperature when starting operation
T
j
: IC chip temperature during operation T
j
(max) is controlled by TSD (thermal shut down circuit)
Recommended Operating Conditions
(Ta
=
0 to 85C, (Note 5))
Characteristics Symbol
Test
Condition
Min
Typ.
Max
Unit
Power supply voltage
V
DD
4.5
5.0
5.5
V
Motor supply voltage
V
M
V
DD
=
5.0 V, Ccp1
=
0.22
F,
Ccp2
=
0.02
F
13 24 34 V
Output current
I
OUT (1)
Ta
=
25C, per phase
1.2 1.5 A
Logic input voltage
V
IN
GND
V
DD
V
Clock frequency
f
CLK
V
DD
=
5.0 V
150 KHz
Chopping frequency
f
chop
V
DD
=
5.0 V
50
100
150
KHz
Reference voltage
V
ref
V
M
=
24 V, Torque
=
100%
2.0
3.0
V
DD
V
Current detect pin voltage
V
RS
V
DD
=
5.0 V
0
1.0
4.5 V
Note 5: Because the maximum value of T
j
is 120C, recommended maximum current usage is below 120C.
TB62209FG
2005-03-02
17
Electrical Characteristics
1
(unless otherwise specified, Ta
=
25C, V
DD
=
5 V, V
M
=
24 V)
Characteristics Symbol
Test
Circuit
Test Condition
Min
Typ.
Max
Unit
HIGH V
IN (H)
2.0
V
DD
V
DD
+
0.4
Input voltage
LOW V
IN (L)
DC
Data input pins
GND
-
0.4
GND 0.8
V
Input hysteresis voltage
V
IN (HIS)
DC
Data input pins
200
400
700
mV
I
IN (H)
Data input pins with resistor
35
50
75
I
IN (H)
1.0
Input current 1
I
IN (L)
DC
Data input pins without resistor
1.0
A
I
DD1
V
DD
=
5 V (STROBE, RESET,
DATA
=
L), RESET
=
L, Logic,
output all off
1.0 2.0 3.0
Power dissipation (V
DD
Pin)
I
DD2
DC
Output OPEN, f
CLK
=
1.0 kHz
LOGIC ACTIVE, V
DD
=
5 V,
Charge Pump
=
charged
1.0 2.5 3.5
mA
I
M1
Output OPEN (STROBE,
RESET, DATA
=
L), RESET
=
L, Logic, output all off, Charge
Pump
=
no operation
1.0 2.0 3.0
I
M2
Output OPEN, f
CLK
=
1 kHz
LOGIC ACTIVE, V
DD
=
5 V,
V
M
=
24 V, Output off,
Charge Pump
=
charged
2.0 4.0 5.0
Power dissipation (V
M
Pin)
I
M3
DC
Output OPEN, f
CLK
=
4 kHz
LOGIC ACTIVE, 100 kHz
chopping (emulation), Output
OPEN,
Charge Pump
=
charged
10 13
mA
Output standby current
Upper
I
OH
DC
V
RS
=
V
M
=
24 V, V
OUT
=
0 V,
STANDBY
=
H, RESET
=
L,
CLK
=
L
-
200
-
150
A
Output bias current
Upper
I
OB
DC
V
OUT
=
0 V, STANDBY
=
H,
RESET
=
L, CLK
=
L
-
100
-
50
A
Output leakage current
Lower
I
OL
DC
V
RS
=
V
M
=
CcpA
=
V
OUT
=
24 V, LOGIC IN
=
ALL
=
L
1.0
A
HIGH
(Reference)
V
RS (H)
V
ref
=
3.0 V, V
ref
(Gain)
=
1/5.0
TORQUE
=
(H)
=
100% set
100
MID
HIGH
V
RS (MH)
V
ref
=
3.0 V, V
ref
(Gain)
=
1/5.0
TORQUE
=
(MH)
=
85% set
83 85 87
MID
LOW
V
RS (ML)
V
ref
=
3.0 V, V
ref
(Gain)
=
1/5.0
TORQUE
=
(ML)
=
70% set
68 70 72
Comparator reference
voltage ratio
LOW V
RS (L)
DC
V
ref
=
3.0 V, V
ref
(Gain)
=
1/5.0
TORQUE
=
(L)
=
50% set
48 50 52
%
Output current differential
I
OUT1
DC
Differences between output
current channels
-
5
5 %
Output current setting differential
I
OUT2
DC
I
OUT
=
1000 mA
-
5
5 %
RS pin current
I
RS
DC
V
RS
=
24 V, V
M
=
24 V,
RESET
=
L (RESET state)
1 2
A
R
ON (D-S) 1
I
OUT
=
1.0 A, V
DD
=
5.0 V
T
j
=
25C, Drain-Source
0.5 0.6
R
ON (S-D) 1
I
OUT
=
1.0 A, V
DD
=
5.0 V
T
j
=
25C, Source-Drain
0.5 0.6
R
ON (D-S) 2
I
OUT
=
1.0 A, V
DD
=
5.0 V
T
j
=
105C, Drain-Source
0.6 0.75
Output transistor drain-source
ON-resistance
R
ON (S-D) 2
DC
I
OUT
=
1.0 A, V
DD
=
5.0 V
T
j
=
105C, Source-Drain
0.6 0.75
TB62209FG
2005-03-02
18
Electrical Characteristics 2
(Ta
=
25C, V
DD
=
5 V, V
M
=
24 V, I
OUT
=
1.0 A)
Characteristics Symbol
Test
Circuit
Test Condition
Min
Typ.
Max
Unit
A
=
90 (
16)
100
A
=
84 (
15)
100
A
=
79 (
14)
93 98
A
=
73 (
13)
91 96
A
=
68 (
12)
87 92 97
A
=
62 (
11)
83 88 93
A
=
56 (
10)
78 83 88
A
=
51 (
9)
72 77 82
A
=
45 (
8)
66 71 76
A
=
40 (
7)
58 63 68
A
=
34 (
6)
51 56 61
A
=
28 (
5)
42 47 52
A
=
23 (
4)
33 38 43
A
=
17 (
3)
24 29 34
A
=
11 (
2)
15 20 25
A
=
6 (
1) 5
10
15
Chopper current
Vector
DC
A
=
0 (
0)
0
%
TB62209FG
2005-03-02
19
Electrical Characteristics 3 (unless otherwise specified, Ta
=
25C, V
DD
=
5 V, V
M
=
24 V)
Characteristics Symbol
Test
Circuit
Test Condition
Min
Typ.
Max
Unit
V
ref
input voltage
V
ref
DC
V
M
=
24 V, V
DD
=
5 V,
STANDBY
=
H, RESET
=
L,
Output on, CLK
=
1 kHz
2.0
V
DD
V
V
ref
input current
I
ref
DC
STANDBY
=
H, RESET
=
L,
Output off, V
M
=
24 V,
V
DD
=
5 V, V
ref
=
3.0 V
20 35 50
A
V
ref
attenuation ratio
V
ref
(GAIN)
DC
V
M
=
24 V, V
DD
=
5 V,
STANDBY
=
H, RESET
=
L,
Output on,
V
ref
=
2.0 to V
DD
-
1.0 V
1/4.8
1/5.0 1/5.2
TSD temperature
(Note 1)
T
j
TSD DC
V
DD
=
5 V, V
M
=
24 V
130
170 C
TSD return temperature difference
(Note
1)
T
j
TSD DC
T
j
TSD
=
130 to 170C
T
j
TSD
-
50
T
j
TSD
-
35
T
j
TSD
-
20
C
V
DD
return voltage
V
DDR
DC
V
M
=
24 V,
STANDBY
=
H 2.0 3.0 4.0 V
V
M
return voltage
V
MR
DC
V
DD
=
5 V,
STANDBY
=
H 2.0 3.5 5.0 V
Over current protected circuit
operation current
(Note 2)
ISD DC
V
DD
=
5 V, V
M
=
24 V
3.0
A
High temperature monitor pin
output current
I
protect
DC
V
DD
=
5 V,
TSD
=
operating condition
1.0 3.0 5.0 mA
Electrical angle monitor pin output
current
I
MO
DC
V
DD
=
5 V,
electrical angle
=
0
(IB
=
100%, IA
=
0%)
1.0 3.0 5.0 mA
V
protect (H)
DC
V
DD
=
5 V,
TSD
=
operating condition
5.0
High temperature monitor pin
output voltage
V
protect (L)
DC
V
DD
=
5 V,
TSD
=
not operating
condition
0.0
V
V
MO2 (H)
DC
V
DD
=
5 V,
electrical angle
=
except 0
(IB
=
100%,
IA
=
Except 0% set)
5.0
Electrical angle monitor pin output
voltage
V
MO2 (L)
DC
V
DD
=
5 V,
electrical angle
=
0
(IB
=
100%, IA
=
0%)
0.0
V
Note 1: Thermal shut down (TSD) circuit
When the IC junction temperature reaches the specified value and the TSD circuit is activated, the internal
reset circuit is activated switching the outputs of both motors to off.
When the temperature is set between 130 (min) to 170C (max), the TSD circuit operates.
When the TSD circuit is activated, the charge pump is halted, and TROTECT pin outputs V
DD
voltage.
Even if the TSD circuit is activated and
Standby
goes H
L
H instantaneously, the IC is not reset until
the IC junction temperature drops
-
20C (typ.) below the TSD operating temperature (hysteresis function).
Note 2: Overcurrent protection circuit
When current exceeding the specified value flows to the output, the internal reset circuit is activated, and the
ISD turns off the output.
Until the
Standby
signal goes Low to High, the overcurrent protection circuit remains activated.
During ISD, IC turns
Standby
mode and the charge pump halts.
TB62209FG
2005-03-02
20
AC Characteristics
(Ta
=
25C, V
M
=
24 V, V
DD
=
5 V, 6.8 mH/5.7
)
Characteristics Symbol
Test
Circuit
Test Condition
Min
Typ.
Max
Unit
Clock frequency
f
CLK
AC
120 kHz
t
w
(t
CLK
) AC
100
t
wp
AC
50
Minimum clock pulse width
t
wn
AC
50
ns
t
r
AC
Output Load: 6.8 mH/5.7
100
t
f
AC
100
t
pLH
AC
CLK
to
OUT
1000
t
pHL
AC
Output Load: 6.8 mH/5.7
2000
t
pLH
AC
CR to OUT
500
Output transistor switching
characteristic
t
pHL
AC
Output Load: 6.8 mH/5.7
1000
ns
t
r
AC
20
t
f
AC
20
t
pLH
AC
20
Transistor switching characteristics
(MO, PROTECT)
t
pHL
AC
20
ns
Noise rejection dead band time
t
BRANK
AC
I
OUT
=
1.0 A
200
300
400
ns
CR reference signal oscillation
frequency
f
CR
AC
C
osc
=
560 pF, R
osc
=
3.6 k
800
kHz
Chopping frequency range
f
chop (min)
f
chop (max)
AC
V
M
=
24 V, V
DD
=
5 V,
Output ACTIVE (I
OUT
=
1.0 A)
Step fixed, Ccp1
=
0.22
F,
Ccp2
=
0.01
F
40 100 150 kHz
Chopping frequency
f
chop
AC
Output ACTIVE (I
OUT
=
1.0 A),
CR CLK
=
800 kHz
100
kHz
Charge pump rise time
t
ONG
AC
Ccp
=
0.22
F, Ccp
=
0.01
F
V
M
=
24 V, V
DD
=
5 V,
STANDBY
=
ON
OFF
100 200
s
























TB62209FG
2005-03-02
21
11. Current Waveform and Setting of Mixed Decay Mode
At constant current control, in current amplitude (pulsating current) Decay mode, a point from 0 to 3 can
be set using 2-bit parallel data.
NF is the point where the output current reaches the set current value. RNF is the timing for monitoring
the set current.
The smaller the MDT value, the smaller the current ripple (peak current value). Note that current decay
capability deteriorates.

NF
f
chop
12.5%
MIXED
DECAY
MODE
CR pin
internal
CLK
waveform
Charge mode
NF: set current value reached
Slow mode
Mixed decay timing
Fast mode
current monitored
(when set current value
>
output current) Charge mode
NF
RNF
Set current value
RNF
MDT
DECAY MODE 0
37.5%
MIXED
DECAY
MODE
Charge mode
NF: set current value reached
Slow mode
Mixed decay timing
Fast mode
current monitored
(when set current value
>
output current) Charge mode
RNF
Set current value
DECAY MODE 1
75%
MIXED
DECAY
MODE
Charge mode
NF: set current value reached
Slow mode
Mixed decay timing
Fast mode
current monitored
(when set current value
>
output current) Charge mode
RNF
Set current value
MDT
NF
DECAY MODE 2
FAST
DECAY
MODE
Fast mode
RNF: current monitored (when set current value
>
output current) Charge mode
Fast mode
RNF
Set current value
DECAY MODE 3
100% 75% 50%
25%
0
MDT
TB62209FG
2005-03-02
22
12. CURRENT MODES
(MIXED
(
SLOW
+
FAST) DECAY MODE Effect)
Current value in increasing (Sine wave)

Sine wave in decreasing (When using MIXED DECAY Mode with large attenuation ratio (MDT%) at
attenuation)

Sine wave in decreasing (When using MIXED DECAY Mode with small attenuation ratio (MDT%) at
attenuation)
If RNF, current watching point, was the set current value (output current) in the mixed decay mode and
in the fast decay mode, there is no charge mode but the slow + fast mode (slow to fast is at MDT) in the
next chopping cycle.
Note: The above charts are schematics. The actual current transient responses are curves.
Slow Slow
Slow
Slow
Fast
Fast
Charge
Charge
Fast
Charge
Fast
Charge
Set current
value
Set current
value
Set current
value
Set current
value
Slow Slow
Fast
Charge
Fast
Charge
Slow
Fast
Slow
Fast
Charge
Because current attenuates so quickly, the current
immediately follows the set current value.
Set current
value
Set current
value
Slow
Fast
Charge
Slow
Fast
Charge
Fast
Slow
Fast
Slow
Because current attenuates slowly, it takes a long time
for the current to follow the set current value (or the
current does not follow).
TB62209FG
2005-03-02
23
13. MIXED DECAY MODE waveform (Current Waveform)
When NF is after MIXED DECAY TIMING

In MIXED DECAY MODE, when the output current > the set current value
NF
NF
37.5%
MIXED
DECAY
MODE
I
OUT
f
chop
f
chop
Set current
value
CLK signal input
f
chop
MDT (MIXED DECAY TIMING) point
Set current value
RNF
RNF
Because the set current value is the output
current, no CHARGE MODE in the next cycle.
(Charge cancel function)
NF
NF
37.5%
MIXED
DECAY
MODE
I
OUT
f
chop
f
chop
Set current
value
Set current value
NF
MDT (MIXED DECAY TIMING) point
CLK signal input
Fast Decay mode after Charge mode
RNF
NF
NF
37.5%
MIXED
DECAY
MODE
Internal
CR CLK
signal
I
OUT
f
chop
f
chop
Set current
value
Set current value
RNF
MDT (MIXED DECAY TIMING) point
TB62209FG
2005-03-02
24
14. FAST DECAY MODE waveform
The output current to the motor is in supply voltage mode after the current value set by V
ref
, R
RS
, or
Torque reached at the set current value.

f
chop
CLK signal input
FAST
DECAY
MODE
(100%
MIXED
DECAY
MODE)
Set current
value
I
OUT
NF
Because the set current value is the output
current, CHARGE MODE
NF
FAST
DECAY MODE in the next cycle.
Because the set current value is the output
current, FAST DECAY MODE in the next
cycle. (Charge cancel function)
RNF
RNF
RNF
Set current value
TB62209FG
2005-03-02
25
12.5
MIXED DECAY MODE
15. CLK SIGNAL, INTERNAL CR CLK, AND OUTPUT CURRENT waveform
(When CLK signal is input in SLOW DECAY MODE)
When CLK signal is input, the chopping counter (CR-CLK counter) is forced to reset at the next CR-CLK
timing.
Because of this, compared with a method in which the counter is not reset, response to the input data is
faster.
The delay time, the theoretical value in the logic portion, is expected to be a one-cycle CR waveform: 5 s
at 100 kHz CHOPPING.
When the CR counter is reset due to CLK signal input, CHARGE MODE is entered momentarily due to
current comparison.
Note: In FAST DECAY MODE, too, CHARGE MODE is entered momentarily due to current comparison.

CLK signal input
Set current value
I
OUT
RNF
Set current value
f
chop
Internal
CR CLK
signal
Momentarily enters CHARGE MODE
Reset CR-CLK counter here
NF
RNF
MDT
NF
MDT
f
chop
f
chop
TB62209FG
2005-03-02
26
16. STROBE SIGNAL, INTERNAL CR CLK, AND OUTPUT CURRENT waveform
(When CLK signal is input in CHARGE MODE)

12.5
MIXED DECAY MODE
CLK signal input
Set current
value
I
OUT
RNF
Set current value
f
chop
Internal
CR CLK
signal
Momentarily enters CHARGE MODE
Reset CR-CLK counter here
NF
RNF
MDT
MDT
f
chop
f
chop
TB62209FG
2005-03-02
27
12.5
MIXED DECAY MODE
17. STROBE SIGNAL, INTERNAL CR CLK, AND OUTPUT CURRENT waveform
(When STROBE signal is input in FAST DECAY MODE)

NF
STROBE signal input
Set current
value
I
OUT
RNF
Set current value
f
chop
Internal
CR CLK
signal
Momentarily enters CHARGE MODE
Reset CR-CLK counter here
f
chop
f
chop
MDT
NF
RNF
MDT
MDT
TB62209FG
2005-03-02
28
18. CLK SIGNAL, INTERNAL CR CLK, AND OUTPUT CURRENT waveform
(When CLK signal is input in 2 EXCITATION MODE)
12.5
MIXED DECAY MODE
CLK signal input
f
chop
Reset CR-CLK counter here
f
chop
f
chop
Set current
value
I
OUT
RNF
Set current value
NF
RNF
0
MDT
NF
TB62209FG
2005-03-02
29
Current Discharge Path when ENABLE Input During Operation
In Slow Mode, when all output transistors are forced to switch off, coil energy is discharged in the
following MODES:
Note: Parasitic diodes are located on dotted lines. In normal MIXED DECAY MODE, the current does not flow
to the parasitic diodes.
As shown in the figure at right, an output transistor has parasitic diodes.
To discharge energy from the coil, each transistor is switched on allowing current to flow in the reverse
direction to that in normal operation. As a result, the parasitic diodes are not used. If all the output
transistors are forced to switch off, the energy of the coil is discharged via the parasitic diodes.

U1
L1
U2
L2
PGND
OFF
OFF
U1
L1
U2
L2
OFF
ON
(Note)
Load
PGND
U1
L1
U2
L2
OFF
OFF
(Note)
Load
PGND
(Note)
R
S
pin
R
RS
V
M
ON
ON
Load
Charge mode
Slow mode
Forced OFF mode
ON
R
S
pin
R
RS
V
M
R
S
pin
R
RS
V
M
power supply
OFF
OFF
Input ENABLE
OFF
TB62209FG
2005-03-02
30
Output Transistor Operating Mode

Output Transistor Operation Functions
CLK U1 U2 L1 L2
CHARGE
ON OFF OFF ON
SLOW OFF OFF ON ON
FAST OFF ON ON OFF
Note: The above table is an example where current flows in the direction of the arrows in the above figures.
When the current flows in the opposite direction of the arrows, see the table below.

CLK U1 U2 L1 L2
CHARGE
OFF ON ON OFF
SLOW OFF OFF ON ON
FAST ON OFF OFF ON
U1
L1
U2
L2
PGND
OFF
OFF
U1
L1
U2
L2
OFF
ON
ON
(Note)
Load
PGND
U1
L1
U2
L2
(Note)
Load
PGND
(Note)
R
S
pin
R
RS
V
M
ON
ON
Load
Charge mode
Slow mode
Fast mode
ON
R
S
pin
R
RS
V
M
R
S
pin
R
RS
V
M
OFF
OFF
ON
OFF
TB62209FG
2005-03-02
31
Power Supply Sequence
(Recommended)
Note 1: If the V
DD
drops to the level of the V
DDR
or below while the specified voltage is input to the V
M
pin, the IC is
internally reset.
This is a protective measure against malfunction. Likewise, if the V
M
drops to the level of the V
MR
or below
while regulation voltage is input to the V
DD
, the IC is internally reset as a protective measure against
malfunction.
To avoid malfunction, when turning on V
M
or V
DD
, to input the
Standby
signal at the above timing is
recommended.
It takes time for the output control charge pump circuit to stabilize. Wait up to t
ONG
time after power on
before driving the motors.
Note 2: When the V
M
value is between 3.3 to 5.5 V, the internal reset is released, thus output may be on. In such a
case, the charge pump cannot drive stably because of insufficient voltage. The
Standby
state should be
maintained until V
M
reaches 13 V or more.
Note 3: Since V
DD
=
0 V and V
M
=
voltage within the rating are applied, output is turned off by internal reset.
At that time, a current of several mA flows due to the Pass between V
M
and V
DD
.
When voltage increases on V
DD
output, make sure that specified voltage is input.


V
DD (max)
V
DD (min)
V
DDR
GND
V
DD
V
M
V
M (min)
V
MR
GND
V
M
NON-RESET
RESET
Internal reset
H
L
STANDBY
INPUT (Note 1)
Takes up to t
ONG
until operable.
Non-operable area
STANDBY
TB62209FG
2005-03-02
32
How to Calculate Set Current
This IC controls constant current in CLK-IN mode.
At that time, the maximum current value (set current value) can be determined by setting the sensing
resistor (R
RS
) and reference voltage (V
ref
).


1/5.0 is V
ref
(gain): V
ref
attenuation ratio. (For the specifications, see the electrical characteristics.)
For example, when inputting V
ref
= 3 V and torque = 100% to output I
OUT
= 0.8 A, R
RS
= 0.75 (0.5 W
or more) is required.
How to Calculate the Chopping and OSC Frequencies
At constant current control, this IC chops frequency using the oscillation waveform (saw tooth waveform)
determined by external capacitor and resistor as a reference.
The TB62209FG requires an oscillation frequency of eight times the chopping frequency.
The oscillation frequency is calculated as follows:
C)
600
R
(C
0.523
1
f
CR
+
=
For example, when C
osc
= 560 pF and R
osc
= 3.6 k are connected, f
CR
= 813 kHz.
At this time, the chopping frequency f
chop
is calculated as follows:
f
chop
= f
CR
/8 = 101
kHz
When determining the chopping frequency, make the setting taking the above into consideration.
IC Power Dissipation
IC power dissipation is classified into two: power consumed by transistors in the output block and power
consumed by the logic block and the charge pump circuit.
Power consumed by the Power Transistor (calculated with R
ON
= 0.60 )
In Charge mode, Fast Decay mode, or Slow Decay mode, power is consumed by the upper and lower
transistors of the H bridges.
The following expression expresses the power consumed by the transistors of a H bridge.
P (out) = 2 (T
r
) I
OUT
(A) V
DS
(V) = 2 I
OUT2
R
ON
..............................(1)
The average power dissipation for output under 4-bit micro step operation (phase difference between
phases A and B is 90) is determined by expression (1).
Thus, power dissipation for output per unit is determined as follows (2) under the conditions below.
R
ON
= 0.60 (@ 1.0 A)
I
OUT
(Peak: max) = 1.0 A
V
M
= 24 V
V
DD
= 5 V
P (out) = 2 (T
r
) 1.0
2
(A) 0.60 () = 1.20 (W) ..............................................(2)
Power consumed by the logic block and IM
The following standard values are used as power dissipation of the logic block and IM at operation.
I (LOGIC) =
2.5 mA (typ.):
I (I
M3
)
=
10.0 mA (typ.): operation/unit
I (I
M1
)
=
2.0 mA (typ.): stop/unit
The logic block is connected to V
DD
(5 V). IM (total of current consumed by the circuits connected to
V
M
and current consumed by output switching) is connected to V
M
(24 V). Power dissipation is
calculated as follows:
P (Logic&IM) = 5 (V) 0.0025 (A) + 24 (V) 0.010 (A) = 0.25 (W) ...............(3)
Thus, the total power dissipation (P) is
P = P (out) + P (Logic&IM) = 1.45 (W)
Power dissipation at standby is determined as follows:
P (standby) + P (out) = 24 (V) 0.002 (A) + 5 (V) 0.0025 (A) = 0.06 (W)
For thermal design on the board, evaluate by mounting the IC.
100%
)
(
RS
R
50%)
70,
85,
100,
(Torque
Torque
(V)
ref
V
5.0
1
(max)
OUT
I
=
=
TB62209FG
2005-03-02
33
Test Waveforms

CK
tCK
tCK
tpLH
tpHL
V
M
GND
t
r
t
f
10%
50%
90%
90%
50%
10%
Figure 1 Timing Waveforms and Names
TB62209FG
2005-03-02
34
OSC-charge delay:
Because the rising edge level of the OSC waveform is used for converting the OSC waveform to the
internal CR CLK, a delay of up to 1.25 ns (@f
chop
= 100 kHz: f
CR
= 400 kHz) occurs between the OSC
waveform and the internal CR CLK.

t
chop
OSC-Charge Delay
H
L
Set current
OSC-Fast Delay
OSC (CR)
50%
50%
L
H
H
L
L
Charge
50%
Slow
Fast
OUTPUT
Voltage A
OUTPUT
Voltage A
OUTPUT
Current
CR Waveform
Internal CR CLK
Waveform
CR-CR CLK delay
Figure 2 Timing Waveforms and Names (CR and output)
TB62209FG
2005-03-02
35
Relationship between Drive Mode Input Timing and MO

If drive mode input changes before MO timing
Parallel set signal is reflected.

If drive mode input changes after MO timing
Parallel set signal occurs after the rising edge of CLK, therefore, it is not reflected. The drive mode is
changed when the electrical angle becomes 0.
Note: The TB62209FG uses the drive mode change reserve method to prevent the motor from step out
when changing drive modes.
Note that the following rules apply when switching drive modes at or near the MO signal output
timing.

Drive Mode Input
Internal Reflection (1)
Drive Mode Input
Waveform (1)
Drive Mode Input
Internal Reflection (2)
Drive Mode Input
Waveform (2)
CLK Waveform
MO Waveform
TB62209FG
2005-03-02
36
Reflecting Points of Signals
Point where Drive Mode
Setting Reflected
CW/CCW
2-Phase Excitation mode
45
(MO)
Before half-clock of phase
B
=
phase A
=
100%
At rising edge of CLK input
1-2 Phase Excitation mode
W1-2 Phase Excitation
mode
2W1-2 Phase Excitation
mode
4W1-2 Phase Excitation
mode
0
(MO)
Before half-clock of phase
B
=
100%
At rising edge of CLK input
Other parallel set signals can be changed at any time (they are reflected immediately).
Recommended Point for Switching Drive Mode

MO Waveform
CLK Waveform
When Drive Mode
Data Switching
can be Input
During MO output (phase data halted) to forcibly switch drive modes, a function to set RESET
=
Low
and to initialize the electrical angle is required.
Drive mode reflected
TB62209FG
2005-03-02
37
P
D
Ta
(Package power dissipation)
(1) HSOP36
R
th (j-a)
only (96C/W)
(2) When mounted on the board (140 mm 70 mm 1.6 mm: 38C/W: typ.)
Note: R
th (j-a)
:
8.5C/W
Ambient temperature Ta (C)
P
D
Ta
Po
wer

di
ssi
p
a
ti
on P
D
(
W
)
(2)
(1)
0
0
3.5
25 50 75 100
125
150
0.5
1
1.5
2
2.5
3
TB62209FG
2005-03-02
38
Relationship between V
M
and V
H
(charge pump voltage)
Note: V
DD
=
5 V
Ccp 1
=
0.22
F, Ccp 2
=
0.022
F, f
chop
=
150 kHz
(Be aware the temperature charges of charge pump capacitor.)
V
M
V
H
(&Vcharge UP)
V
H
v
o
l
t
age
, c
har
ge
up
v
o
l
t
ag
e

(V
)
Supply voltage VM (V)
Charge pump voltage VH
=
VDD
+
VM (
=
Ccp A) (V)
10
20
0
0
VH voltage
charge up voltage
VM voltage
2 3
10
20
30
40
4 5 6 7 8 9
11 12 13
14
15 16 17 18
21 22 23 24 25 26
19
27 28 29
31 32 33 34 35 36 37 38 39
1
30
40
50
Input
STANDBY
VMR
VM voltage
Maximum rating
Charge pump
voltage
Usable area
Recommended operation area
TB62209FG
2005-03-02
39
Operation of Charge Pump Circuit
Initial charging
(1) When RESET is released, T
r1
is turned ON and T
r2
turned OFF. Ccp 2 is charged from Ccp 2 via
Di1.
(2) T
r1
is turned OFF, T
r2
is turned ON, and Ccp 1 is charged from Ccp 2 via Di2.
(3) When the voltage difference between V
M
and V
H
(Ccp A pin voltage = charge pump voltage)
reaches V
DD
or higher, operation halts (Steady state).
Actual operation
(4) Ccp 1 charge is used at f
chop
switching and the V
H
potential drops.
(5) Charges up by (1) and (2) above.
Output switching
Initial charging
Steady state
(1)
(2) (3)
(4)
t
(5)
(4)
(5)
V
H
V
M
V
H
=
V
M
+
V
DD
=
charge pump voltage
i1
=
charge pump current
i2
=
gate block power dissipation
V
DD
=
5 V
V
M
=
24 V
Comparator
&
Controller
V
M
Output
Output
H switch
i2
Ccp 1
0.22
F
Ccp A
Ccp B
Ccp C
R
1
V
H
R
S
R
RS
Ccp 2
0.01
F
Di2
Di1
Di3
V
z
i1
(2)
T
r1
T
r2
7
(1)
(2)
TB62209FG
2005-03-02
40
Charge Pump Rise Time
t
ONG
:
Time taken for capacitor Ccp 2 (charging capacitor) to fill up Ccp 1 (storing capacitor) to V
M
+ V
DD
after
a reset is released.
The internal IC cannot drive the gates correctly until the voltage of Ccp 1 reaches V
M
+ V
DD
. Be sure to
wait for t
ONG
or longer before driving the motors.
Basically, the larger the Ccp 1 capacitance, the smaller the voltage fluctuation, though the initial charge
up time is longer.
The smaller the Ccp 1 capacitance, the shorter the initial charge-up time but the voltage fluctuation is
larger.
Depending on the combination of capacitors (especially with small capacitance), voltage may not be
sufficiently boosted. When the voltage does not increase sufficiently, output DMOS R
ON
turns lower than
the normal, and it raises the temperature.
Thus, use the capacitors under the capacitor combination conditions (Ccp 1 = 0.22 F, Ccp 2 = 0.02 F)
recommended by Toshiba.
50%
V
DD
+
V
M
V
M
+
(V
DD
90%)
Ccp 1 voltage
V
M
5 V
0 V
STANDBY
t
ONG
TB62209FG
2005-03-02
41
External Capacitor for Charge Pump
When driving the stepping motor with V
DD
= 5 V, f
chop
= 150 kHz, L = 10 mH under the conditions of V
M
= 13 V and 1.5 A, the logical values for Ccp 1 and Ccp 2 are as shown in the graph below:
Choose Ccp 1 and Ccp 2 to be combined from the above applicable range. We recommend Ccp 1:Ccp 2 at
10:1 or more. (If our recommended values (Ccp = 0.22 F, Ccp 2 = 0.02 F) are used, the drive conditions in
the specification sheet are satisfied. (There is no capacitor temperature characteristic as a condition.)
When setting the constants, make sure that the charge pump voltage is not below the specified value and
set the constants with a margin (the larger Ccp 1 and Ccp 2, the more the margin).
Some capacitors exhibit a large change in capacitance according to the temperature. Make sure the above
capacitance is obtained under the usage environment temperature.
Ccp 1 capacitance (
F)
Ccp 1 Ccp 2
Cc
p 2
ca
p
a
c
i
t
a
nce

(
F)
0.05
0
0
Recommended
value
0.005
0.01
0.015
0.02
0.025
0.03
0.035
0.04
0.045
0.05 0.1 0.15 0.2 0.25
0.35 0.4 0.45 0.5
0.3
Applicable range
TB62209FG
2005-03-02
42
(1) Low Power Dissipation mode
Low Power Dissipation mode turns off phases A and B, and also halts the charge pump.
Operation is the same as that when the STANDBY pin is set to Low.
(2) Motor Lock mode
Motor Lock mode turns phase B output only off with phase A off.
From reset, with IA = 0 and IB = 100%, the normal 4W1-2 phase operating current is output.
Use this mode when you want to hold (lock) the rotor at any desired value.
(3) 2-Phase
Excitation
mode

Electrical angle 360 = 4 CLKs
Note: 2-phase excitation has a large load change due to motor induced electromotive force. If a mode in
which the current attenuation capability (current control capability) is small is used, current increase
due to induced electromotive force may not be suppressed. In such a case, use a mode in which
the mixed decay ratio is large.
We recommend 37.5% Mixed Decay mode as the initial value (general condition).
100
0
Phase B
Phase A
[%]
-
100
STEP
IB (%)
2-Phase Excitation Mode (typ.A)
IA
(%
)
100
0
100
TB62209FG
2005-03-02
43
(4) 1-2 Phase Excitation mode (a)

Electrical angle 360 = 8 CLK

IB (%)
1-2 Phase Excitation Mode (typ.A)
IA
(%
)
0
100
100
Phase B
Phase A
100
0
[%]
-
100
STEP
MO
CLK
TB62209FG
2005-03-02
44
(5) 1-2 Phase Excitation mode (b)

Electrical angle 360 = 8 CLK

IB (%)
1-2 Phase Excitation Mode (typ.B)
IA
(%
)
0
100
100
71
71
MO
Phase B
Phase A
100
0
[%]
-
100
STEP
71
-
71
CLK
TB62209FG
2005-03-02
45
(6) W1-2 Phase Excitation mode

Electrical angle 360 = 16 CLK

IB (%)
W1-2 Phase Excitation Mode
(2-bit micro step)
IA
(%
)
0
100
100
71
71
38
92
38
92
100
0
[%]
-
100
STEP
-
92
-
71
-
38
38
92
71
Phase A
Phase B
TB62209FG
2005-03-02
46
(7) 2W1-2 Phase Excitation mode

Electrical angle 360 = 32 CLK
IB (%)
2W 1-2 Phase Excitation Mode
(3-bit micro step)
IA
(%
)
92 100
0
100
98
71
71
38
38
92
98
83
56
20
83
56
20
100
0
[%]
-
100
STEP
-
83
-
38
-
20
38
88
71
-
92
-
98
-
71
-
56
20
56
96
Phase A
Phase B
TB62209FG
2005-03-02
47
(8) 4W1-2 Phase Excitation mode






























Electrical angle 360 = 64 CLK

-
100
STE
-
98
0
-
96
-
88
-
92
-
77
-
71
-
56
-
63
-
47
-
38
-
29
-
20
-
10
-
83
10
20
29
38
47
56
63
71
77
83
88
92
96
98
100
[%]
Phase A
Phase B
TB62209FG
2005-03-02
48
4-Bit Micro Step Output Current Vector Locus
(Normalizing each step to 90
)
For input data, see the current function examples.
IA
(%
)
IB (%)
X
=
16
0
100
10 20 29 38 47
56
63
71
77
83
88
92
96
98
100
10
20
29
38
47
56
63
77
71
88
83
98
96
92
X
=
0
X
=
15
X
=
14
X
=
13
X
=
12
X
=
11
X
=
10
X
=
9
X
=
8
X
=
7
X
=
6
X
=
5
X
=
4
X
=
3
X
=
2
X
=
1
CW
CCW
X
X
TB62209FG
2005-03-02
49
Recommended Application Circuit
The values for the devices are all recommended values. For values under each input condition, see the
above-mentioned recommended operating conditions.
Note: Adding bypass capacitors is recommended.
Make sure that GND wiring has only one contact point, and to design the pattern that allows the heat
radiation.
To control setting pins in each mode by SW, make sure to pull down or pull up them to avoid high
impedance.
To input the data, see the section on the recommended input data.

Because there may be shorts between outputs, shorts to supply, or shorts to ground, be careful when
designing output lines, V
DD
(V
M
) lines, and GND lines.







M
R
osc
=
3.6 k
C
osc
=
560 pF
V
ref AB
V
M
R
RS A
A
B
A
B
R
RS B
V
SS
(F
IN
)
PROTECT
MO
DMODE 3
DMODE 2
DMODE 1
MDT 1
MDT 2
STANDBY
P-GND
RESET
CW/CCW
ENABLE
CLK
DATA MODE
V
DD
CR
V
ref AB
3
V
1
F
SGND
R
RS A
0.66
Stepping
Motor
0.66
R
RS B
SGND
SGND
SGND
5 V
10
F
Ccp C
Ccp B
Ccp A
Ccp 2
0.01
F
Ccp 1
0.22
F
DATA MODE
TORQUE 2
TORQUE 1
OPEN
OPEN
0 V
0 V
5 V
0 V
24 V
SGND
100
F
5 V
0 V
5 V
0 V
5 V
5 V
0 V
5 V
0 V
5 V
0 V
5 V
0 V
5 V
0 V
5 V
0 V
5 V
0 V
5 V
0 V
5 V
0 V
5 V
PGND
TB62209FG
2005-03-02
50
Package Dimensions
Weight: 0.79 g (typ.)
TB62209FG
2005-03-02
51


The information contained herein is subject to change without notice.
The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed
by TOSHIBA for any infringements of patents or other rights of the third parties which may result from its use. No license is
granted by implication or otherwise under any patent or patent rights of TOSHIBA or others.
TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in
general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility
of the buyer, when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire
system, and to avoid situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life,
bodily injury or damage to property.
In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the
most recent TOSHIBA products specifications. Also, please keep in mind the precautions and conditions set forth in the
"Handling Guide for Semiconductor Devices," or "TOSHIBA Semiconductor Reliability Handbook" etc..
The TOSHIBA products listed in this document are intended for usage in general electronics applications (computer, personal
equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.). These TOSHIBA products
are neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a
malfunction or failure of which may cause loss of human life or bodily injury ("Unintended Usage"). Unintended Usage include
atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments,
combustion control instruments, medical instruments, all types of safety devices, etc.. Unintended Usage of TOSHIBA products
listed in this document shall be made at the customer's own risk.
The products described in this document are subject to the foreign exchange and foreign trade laws.
TOSHIBA products should not be embedded to the downstream products which are prohibited to be produced and sold, under
any law and regulations.
030619EBA
RESTRICTIONS ON PRODUCT USE