TC55W1600FT-55,-70
2002-02-12 1/13
TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS
1,048,576-WORD BY 16-BIT/2,097,152-WORD BY 8-BIT FULL CMOS STATIC RAM
DESCRIPTION
The TC55W1600FT is a 16,777,216-bit static random access memory (SRAM) organized as 1,048,576 words by 16
bits/2,097,152 words by 8 bits. Fabricated using Toshiba's CMOS Silicon gate process technology, this device
operates from a single 2.3 to 3.1 V power supply. Advanced circuit technology provides both high speed and low
power at an operating current of 3 mA/MHz and a minimum cycle time of 55 ns. It is automatically placed in
low-power mode at 0.5 A standby current (at V
DD
= 3.0 V, Ta = 25C, maximum) when chip enable ( CE1 ) is
asserted high or (CE2) is asserted low. There are three control inputs. CE1 and CE2 are used to select the device
and for data retention control, and output enable ( OE ) provides fast memory access. Data byte control pin ( LB ,
UB ) provides lower and upper byte access. This device is well suited to various microprocessor system applications
where high speed, low power and battery backup are required. And, with a guaranteed operating range of -40 to
85C, the TC55W1600FT can be used in environments exhibiting extreme temperature conditions. The
TC55W1600FT is available in a plastic 48-pin thin-small-outline package (TSOP).
FEATURES
Low-power dissipation
Operating: 9.3 mW/MHz (typical)
Single power supply voltage of 2.3 to 3.1 V
Power down features using CE1 and CE2
Data retention supply voltage of 1.5 to 3.1 V
Direct TTL compatibility for all inputs and outputs
Wide operating temperature range of -40 to 85C
Standby Current (maximum):
3.1 V
10
A
3.0 V
5
A
PIN ASSIGNMENT
(TOP VIEW)
PIN
NAMES
48 PIN TSOP
A0~A19
Address Inputs (Word Mode)
A-1~A19
Address Inputs (Byte Mode)
1
CE
, CE2
Chip Enable
R/W Read/Write
Control
OE
Output
Enable
LB ,
UB
Data Byte Control
I/O1~I/O16 Data
Inputs/Outputs
BYTE
Byte
(
8 mode) Enable
V
DD
Power
GND Ground
NC No
Connection
NU
Not Used (Input)
*: NU pin must be open or connected to GND.
Pin
No. 1 2 3 4 5 6 7 8 9 10
11
12
13
14
15
16
Pin
Name A15 A14 A13 A12 A11 A10 A9 A8 A19 NC R/W CE2 NU
UB
LB A18
Pin
No.
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
Pin
Name A17 A7 A6 A5 A4 A3 A2 A1 A0
1
CE
GND
OE
I/O1 I/O9 I/O2 I/O10
Pin
No.
33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48
Pin
Name
I/O3 I/O11 I/O4 I/O12 V
DD
I/O5 I/O13 I/O6 I/O14 I/O7 I/O15 I/O8
I/O16
/A-1
GND
BYTE
A16
Access Times (maximum):
TC55W1600FT
-55 -70
Access Time
55 ns
70 ns
1
CE
Access Time
55 ns
70 ns
CE2 Access Time
55 ns
70 ns
OE
Access Time
30 ns
35 ns
Package:
TSOP48-P-1220-0.50 (Weight: 0.52 g typ)
(Normal)
25
48
24
1
TC55W1600FT-55,-70
2002-02-12 5/13
AC CHARACTERISTICS AND OPERATING CONDITIONS
(Ta
=
=
=
= ----40 to 85C, V
DD
=
=
=
= 2.7 to 3.1 V)
READ CYCLE
TC55W1600FT
-55 -70
SYMBOL PARAMETER
MIN MAX MIN MAX
UNIT
t
RC
Read
Cycle
Time
55
70
t
ACC
Address
Access
Time
55
70
t
CO1
Chip
Enable(
1
CE
) Access Time
55 70
t
CO2
Chip Enable(CE2) Access Time
55 70
t
OE
Output Enable Access Time
30 35
t
BA
Data Byte Control Access Time
55 70
t
COE
Chip Enable Low to Output Active
5
5
t
OEE
Output Enable Low to Output Active
0
0
t
BE
Data Byte Control Low to Output Active
0
0
t
OD
Chip Enable High to Output High-Z
25 30
t
ODO
Output Enable High to Output High-Z
25 30
t
BD
Data Byte Control High to Output High-Z
25 30
t
OH
Output Data Hold Time
10
10
ns
WRITE CYCLE
TC55W1600FT
-55 -70
SYMBOL PARAMETER
MIN MAX MIN MAX
UNIT
t
WC
Write
Cycle
Time
55
70
t
WP
Write
Pulse
Width
45
50
t
CW
Chip Enable to End of Write
50
60
t
BW
Data Byte Control to End of Write
50
60
t
AS
Address
Setup
Time
0
0
t
WR
Write Recovery Time
0
0
t
ODW
R/W Low to Output High-Z
20 25
t
OEW
R/W High to Output Active
0
0
t
DS
Data
Setup
Time
25
30
t
DH
Data
Hold
Time
0
0
ns
AC TEST CONDITIONS
PARAMETER TEST
CONDITION
Output load
30 pF
+ 1 TTL Gate
Input pulse level
V
DD
- 0.2 V, 0.2 V
Timing measurements
V
DD
0.5
Reference level
V
DD
0.5
t
R
, t
F
5 ns
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