TC58FVM6(T/B)2A(FT/XB)65
2003-01-29 1/61
Block erase architecture
8
8 Kbytes/127 64 Kbytes
Boot block architecture
TC58FVM6T2A: top boot block
TC58FVM6B2A: bottom boot block
Mode control
Compatible with JEDEC standard commands
Erase/Program cycles
10
5
cycles typ.
Access Time (Random/Page)
V
DD
CL = 30 pF
CL = 100 pF
2.7~3.6 V
65 ns/25 ns
70 ns/30 ns
2.3~3.6 V
70 ns/30 ns
75 ns/35 ns
Power consumption
10
A (Standby)
15 mA (Program/Erase operation)
55 mA (Random Read operation)
11 mA (Address Increment Read operation)
5 mA (Page Read operation)
Package
TC58FVM6**AFT:
TSOPI48-P-1220-0.50 (weight: 0.51 g)
TC58FVM6**AXB:
P-TFBGA56-0710-0.80AZ (weight: 0.125 g)
TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS
64MBIT (8M
8 BITS/4M 16 BITS) CMOS FLASH MEMORY
DESCRIPTION
The TC58FVM6T2A/B2A is a 67108864-bit, 3.0-V read-only electrically erasable and programmable flash
memory organized as 8388608 words
8 bits or as 4194304 words 16 bits. The TC58FVM6T2A/B2A features
commands for Read, Program and Erase operations to allow easy interfacing with microprocessors. The commands
are based on the JEDEC standard. The Program and Erase operations are automatically executed in the chip. The
TC58FVM6T2A/B2A also features a Simultaneous Read/Write operation so that data can be read during a Write or
Erase operation.
FEATURES
Power supply voltage
V
DD
= 2.3 V~3.6 V
Operating temperature
Ta
= -40C~85C
Organization
8M
8 bits/4M 16 bits
Functions
Simultaneous Read/Write
Page Read
Auto Program, Auto Page Program
Auto Block Erase, Auto Chip Erase
Fast Program Mode/Acceleration Mode
Program Suspend/Resume
Erase Suspend/Resume
data polling/Toggle bit
block protection, boot block protection
Automatic Sleep, support for hidden ROM area
common flash memory interface (CFI)
Byte/Word Modes
TC58FVM6(T/B)2A(FT/XB)65
2003-01-29 2/61
Ordering information
TC58 F V M6 T2 A FT 65
Speed
version
65
= 65 ns
Package
FT
= TSOP
XB
= FBGA
Design
rule
A
= 0.16 m
Function/Boot block architecture/Bank ratio
T2
= Page mode/Top boot block/1:3:3:1
B2
= Page mode/Bottom boot block/1:3:3:1
Capacity
M6
= 64Mbits
Supply
Voltage
V
= 3 V system
Device
type
F
= NOR Flash memory
Toshiba CMOS E
2
PROM
Ordering type
Boot block
Bank ratio
Package
TC58FVM6T2AFT65 Top
TC58FVM6B2AFT65 Bottom
TSOPI48-P-1220-0.50
TC58FVM6T2AXB65 Top
TC58FVM6B2AXB65 Bottom
1:3:3:1
P-TFBGA56-0710-0.80AZ
TC58FVM6(T/B)2A(FT/XB)65
2003-01-29 3/61
PIN ASSIGNMENT
(TOP VIEW)
...
...
...
...
TC58FVM6**AFT
PIN
NAMES
A-1, A0~A21 Address Input
DQ0~DQ15 Data
Input/Output
CE
Chip
Enable
Input
OE
Output Enable Input
BYTE Word/Byte
Select
Input
WE
Write Enable Input
BY
/
RY
Ready/Busy
Output
RESET
Hardware Reset Input
/ACC
WP
Write Protect /
Program Acceleration Input
V
DD
Power
Supply
V
SS
Ground
PIN ASSIGNMENT
(TOP VIEW)
...
...
...
...
TC58FVM6**AXB
1 2 3 4 5 6 7 8
A
NC
NC
B
NC
NC
C
A3 A7
BY
/
RY
WE A9 A13
D
A4 A17 /ACC
WP
RESET A8 A12
E
A2 A6 A18 A21 A10 A14
F
A1 A5 A20 A19 A11 A15
G
A0 DQ0 DQ2 DQ5 DQ7 A16
H C DQ8 DQ10
DQ12 DQ14
BYTE
J OE DQ9 DQ11 V
DD
DQ13 DQ15
K V
SS
DQ1 DQ3 DQ4 DQ6 V
SS
L
NC
NC
M
NC
NC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
A16
V
SS
DQ15/A-1
DQ7
DQ14
DQ6
DQ13
DQ5
DQ12
DQ4
V
DD
DQ11
DQ3
DQ10
DQ2
DQ9
DQ1
DQ8
DQ0
V
SS
A0
BYTE
OE
CE
A15
A14
A13
A12
A11
A10
A9
A8
A19
A20
A21
A18
A17
A7
A6
A5
A4
A3
A2
A1
WE
RESET
/ACC
WP
BY
/
RY
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
TC58FVM6(T/B)2A(FT/XB)65
2003-01-29 5/61
MODE SELECTION
BYTE
MODE
WORD
MODE
MODE
CE
OE
WE A9 A6 A1 A0
RESET
/ACC
WP
DQ0~DQ7
(1)
DQ0~DQ15
Read/Page Read
L
L
H
A9
A6
A1
A0
H
*
D
OUT
D
OUT
ID Read (Manufacturer Code)
L L H
V
ID
L L L
H
* Code Code
ID Read (Device Code)
L L H
V
ID
L L H
H
* Code Code
Standby
H
*
*
*
*
*
* H
* High-Z High-Z
Output Disable
*
H H *
*
*
*
*
* High-Z High-Z
Write L
H
(2)
A9 A6 A1 A0 H
*
D
IN
D
IN
Block Protect 1
L
V
ID
(2)
V
ID
L H L
H
*
*
*
Block Protect 2
L
H
H
* L H L V
ID
*
*
*
Verify Block Protect
L
L
H
V
ID
L H L
H
* Code Code
Temporary Block Unprotect
*
*
*
*
*
*
*
V
ID
*
*
*
Hardware Reset/Standby
*
*
*
*
*
*
* L
* High-Z High-Z
Boot Block Protect
*
*
*
*
*
*
*
* L *
*
Notes: *
= V
IH
or V
IL
, L
= V
IL
, H
= V
IH
(1) DQ8~DQ14 are High-Z and DQ15/A-1 is Address Input in Byte Mode.
Addresses are A21~A0 in Word Mode ( BYTE
= V
IH
), A21~A-1 in Byte Mode ( BYTE
= V
IL
).
(2) Pulse input
ID CODE TABLE
CODE TYPE
A21~A12
A6
A1
A0
CODE (HEX)
(1)
Manufacturer Code
* L L L
0098h
TC58FVM6T2A
* L L H
0057h
Device Code
TC58FVM6B2A
* L L H
0058h
Verify Block Protect
BA
(2)
L H L Data
(3)
Notes: *
= V
IH
or V
IL
, L
= V
IL
, H
= V
IH
(1) DQ8~DQ14 are High-Z and DQ15/A-1 is Address Input in Byte Mode.
(2) BA: Block Address
(3) 0001h - Protected Block
0000h - Unprotected Block
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