US3010/3010A

4-1

Rev. 1.1
5/18/98

TYPICAL APPLICATION

DESCRIPTION

The US3010 family of controller ICs are specifically de-
signed to meet Intel specification for Pentium II

and

Pentium Pro

microprocessor applications as well as

the next generation P6 family processors. These prod-
ucts feature a patented topology that in combination
with a few external components as shown in the typical
application circuit ,will provide in excess of 16A of out-
put current for an on- board DC/DC converter while auto-
matically providing the right output voltage via the 5 bit
internal DAC .These devices also feature, loss less cur-
rent sensing by using the Rds-on of the high side
Power MOSFET as the sensing resistor, a Power Good
window comparator that switches its open collector out-
put low when the output is outside of a

10% window

and an OVP output. Other features of the device are ;
Undervoltage lockout for both 5V and 12V supplies , an
external programmable soft start function as well as pro-
gramming the oscillator frequency by using an external
capacitor.

Dual Layout Compatible with SC1152
Designed to meet Intel specification of VRM8.2
& VRM8.3 for Pentium II

On board DAC programs the output voltage
from 1.3V to 3.5V (US3010) & 1.8V to 3.5V for
US3010A
Loss less Short Circuit Protection
Synchronous operation allows maximum effi-
ciency
Patented architecture allows fixed frequency
operation as well as 100% duty cycle during
dynamic load
Over Voltage Protection Output
Soft Start
High current totem pole driver for direct driv-
ing of the external Power MOSFET
Power Good function

PACKAGE ORDER INFORMATION

PRELIMINARY DATASHEET

FEATURES

5 BIT PROGRAMMABLE SYNCHRONOUS BUCK

CONTROLLER IC

APPLICATIONS

Pentium II & Pentium Pro

processor DC to DC

converter application
Low cost Pentium with AGP

Notes: Pentium II and Pentium Pro are
trade marks of Intel Corp.

Ta (

Device Package VID Voltage Range

0 TO 70

US3010CW 20 pin Plastic SOIC WB 1.3V to 3.5V

0 TO 70

US3010ACW 20 pin Plastic SOIC WB 1.8V to 3.5V

12V

VID0

Power Good

3010app1-1.1

OutEn

VID1

VID2

VID3

VID4

C10

C11

R11

OVP

R10

HDrv

LDrv

SS/BstH

CS+

Gnd

Vfb

US3010

PGd

CS-

V12

Ct/

AGnd

NC/

PGndH

OVP

R12

R13

4-2

Rev. 1.1

5/18/98

US3010/3010A

ELECTRICAL SPECIFICATIONS

Unless otherwise specified ,these specifications apply over ,V

= 12V, V

= 5V and Ta=0 to 70

C. Typical values

refer to Ta =25

C. Low duty cycle pulse testing are used which keeps junction and case temperatures equal to the

ambient temperature.

ABSOLUTE MAXIMUM RATINGS

V5 supply Voltage ........................................... 7V
V12 Supply Voltage ............................................ 20V
Storage Temperature Range ................................. -65 TO 150

Operating Junction Temperature Range .......... 0 TO 125

PACKAGE INFORMATION

20 PIN WIDE BODY PLASTIC SOIC (W)

=85

C/W

TOP VIEW

Vfb

V12

LDrv

OVP

PGd

CS-

CS+

HDrv

Gnd

PARAMETER

SYM TEST CONDITION

MIN

TYP

MAX

UNITS

VID Section
DAC output voltage

0.99Vs

1.01Vs

(note 1)
DAC Output Line Regulation

0.1

DAC Output Temp Variation

0.5

VID Input LO

0.4

VID Input HI

VID input internal pull-up

resistor to V5
Power Good Section
Under voltage lower trip point

Vout ramping down

0.89Vs

0.90Vs

0.91Vs

Under voltage upper trip point

Vout ramping up

0.92Vs

UV Hysterises

.015Vs

.02Vs

.025Vs

Over voltage upper trip point

Vout ramping up

1.09Vs

1.10Vs

1.11Vs

Over voltage lower trip point

Vout ramping down

1.08Vs

OV Hysterises

.015Vs

.02Vs

.025Vs

Power Good Output LO

RL=3mA

0.4

Power Good Output HI

RL=5K pull up to 5V

4.8

Soft Start Section
Soft Start Current

CS+ =0V , CS- =5V

US3010/3010A

4-3

Rev. 1.1
5/18/98

UVLO Section
UVLO Threshold-12V

Supply ramping up

9.2

10.8

UVLO Hysterises-12V

0.3

0.4

0.5

UVLO Threshold-5V

Supply ramping up

4.1

4.3

4.5

UVLO Hysterises-5V

0.2

0.3

0.4

Error Comparator Section
Input bias current

Input Offset Voltage

-2

Delay to Output

Vdiff=10mV

100

Current Limit Section
C.S Threshold Set Current

160

200

240

C.S Comp Offset Voltage

-5

Hiccup Duty Cycle

Css=0.1 uF

Supply Current
Operating Supply Current

CL=3000pF
V5

V12

Output Drivers Section
Rise Time

CL=3000pF

100

Fall Time

CL=3000pF

130

Dead band Time

CL=3000pF

100

200

300

Oscillator Section
Osc Frequency

Ct=150pF

190

220

250

Khz

Osc Valley

0.2

Osc Peak

Output Enable Section
Pull up Resistor to V5

HI Threshold Voltage

LO Threshold Voltage

0.8

Over Voltage Section
OVP Drive Current

Note 1: Vs refers to the set point voltage given in Table 1.

1.30*

1.35*

2.1

1.40*

2.2

1.45*

2.3

1.50*

2.4

1.55*

2.5

1.60*

2.6

1.65*

2.7

1.70*

2.8

1.75*

2.9

1.80

3.0

1.85

3.1

1.90

3.2

1.95

3.3

2.00

3.4

2.05

3.5

* Output voltage is disabled for US3010A.
** Output voltage is disabled for all versions.

Table 1 - Set point voltage vs. VID codes

4-4

Rev. 1.1

5/18/98

US3010/3010A

PIN DESCRIPTIONS

Pin Description
LSB input to the DAC that programs the output voltage. This pin can be pulled up exter-
nally by a 10k resistor to either 3.3V or 5V supply.
Input to the DAC that programs the output voltage.This pin can be pulled up externally by
a 10k

resistor to either 3.3V or 5V supply.

Input to the DAC that programs the output voltage.This pin can be pulled up externally by
a 10k resistor to either 3.3V or 5V supply.
MSB input to the DAC that programs the output voltage.This pin can be pulled up exter-
nally by a 10k resistor to either 3.3V or 5V supply.
This pin selects a range of output voltages for the DAC. The voltage range for both the "A"
and the none "A" versions of the device is given in table 1.
This pin is an open collector output that switches LO when the output of the converter is
not within

10% (typ) of the nominal output voltage.When PWRGD pin switches LO the

sat voltage is less than 0.4V at 3mA.
This pin is connected directly to the output of the Core supply to provide feedback to the
Error comparator.
This pin is connected to the Drain of the power MOSFET of the Core supply and it
provides the positive sensing for the internal current sensing circuitry. An external resis-
tor programs the C.S threshold depending on the Rds of the power MOSFET. An external
capacitor is placed in parallel with the programming resistor to provide high frequency
noise filtering.
This pin is connected to the Source of the power MOSFET for the Core supply and it
provides the negative sensing for the internal current sensing circuitry.
This pin provides the soft start for the switching regulator. An internal current source
charges an external capacitor that is conected from this pin to the GND which ramps up
the outputs of the switching regulator, preventing the outputs from overshooting as wellas
limiting the input current. The second function of the Soft Start cap is to provide long off
time for the synchronous MOSFET or the Catch diode (HICCUP) during current limiting.
This pin programs the oscillator frequency in the range of 50 kHZ to 500kHZ with an
external capacitor connected from this pin to the GND.
This pin serves as the ground pin and must be conected directly to the ground plane. A
high frequency capacitor (0.1 to 1 uF) must be connected from V5 and V12 pins to this
pin for noise free operation.
Output driver for the synchronous power MOSFET.
Output driver for the high side power MOSFET.
This pin is connected to the 12 V supply and serves as the power Vcc pin for the output
drivers.A high frequency capacitor (0.1 to 1 uF) must be connected directly from this pin
to GND pin in order to supply the peak current to the power MOSFET during the transi-
tions.
5V supply voltage.
Over voltage comparator output.
This is the output enable pin.This pin is internally pulled high through a 35k

resistor to

5V supply. A low signal on this pin disables the output.
No connect.

PIN# PIN SYMBOL
20

PGd

Vfb

CS+

CS-

Gnd

LDrv

HDrv

V12

OVP

OUTEN

7,9

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