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Электронный компонент: VCR4N

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VCR2N/4N/7N
Vishay Siliconix
Document Number: 70293
S-41225--Rev. F, 28-Jun-04
www.vishay.com
1
JFET Voltage-Controlled Resistors
PRODUCT SUMMARY
Part Number
V
GS(off)
Max (V)
V
(BR)GSS
Min (V)
r
DS(on)
Max (
W
)
VCR2N
-7
-25
60
VCR4N
-7
-25
600
VCR7N
-5
-25
8000
FEATURES
BENEFITS
APPLICATIONS
D Continuous Voltage-Controlled
Resistance
D High Off-Isolation
D High Input Impedance
D Gain Ranging Capability/Wide Range
Signal Attenuation
D No Circuit Interaction
D Simplified Drive
D Variable Gain Amplifiers
D Voltage Controlled Oscillator
D AGC
DESCRIPTION
The VCR2N/4N/7N JFET voltage controlled resistors have an
ac drain-source resistance that is controlled by a dc bias
voltage (V
GS
) applied to their high impedance gate terminal.
Minimum r
DS
occurs when V
GS
= 0 V. As V
GS
approaches the
pinch-off voltage, r
DS
rapidly increases. This series of junction
FETs is intended for applications where the drain-source
voltage is a low-level ac signal with no dc component.
Key to device performance is the predictable r
DS
change
versus V
GS
bias where:
r
DS
bias [
r
DS
(@ V
GS
+ 0)
1
V
GS
V
GS(off)
These n-channel devices feature r
DS(on)
ranging from 20 to
8000 W
. All packages are hermetically sealed and may be
processed per MIL-S-19500 (see Military Information).
D
S
G and Case
TO-206AA
(TO-18)
Top View
1
2
3
S
C
TO-206AF
(TO-72)
D
G
Top View
1
2
3
4
VCR2N, VCR4N
VCR7N
For applications information see AN105.
VCR2N/4N/7N
Vishay Siliconix
www.vishay.com
2
Document Number: 70293
S-41225--Rev. F, 28-Jun-04
ABSOLUTE MAXIMUM RATINGS
a
Gate-Source, Gate-Drain Voltage
-25 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Gate Current
10 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power Dissipation
b
300 mW
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating Junction Temperature Range
-55 to 175_C
. . . . . . . . . . . . . . . . . . .
Storage Temperature
-65 to 200_C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead Temperature (
1
/
16
" from case for 10 sec.)
300_C
. . . . . . . . . . . . . . . . . . .
Notes:
a.
T
A
= 25_C unless otherwise noted.
b.
Derate 2 mW/_C above 25_C.
SPECIFICATIONS
(T
A
= 25_C UNLESS OTHERWISE NOTED)
Limits
VCR2N
VCR4N
VCR7N
Parameter
Symbol
Test Conditions
Typ
a
Min
Max
Min
Max
Min
Max
Unit
Static
Gate-Source Breakdown Voltage
V
(BR)GSS
I
G
= -1 mA, V
DS
= 0 V
-55
-25
-25
-25
V
Gate-Source Cutoff Voltage
V
GS(off)
V
DS
= 10 V, I
D
= 1 mA
-3.5
-7
-3.5
-7
-2.5
-5
V
Gate Reverse Current
I
GSS
V
GS
= -15 V, V
DS
= 0 V
-5
-0.2
-0.1
nA
V
GS
= 0 V, I
D
= 10 mA
20
60
Drain-Source On-Resistance
r
DS(on)
V
GS
= 0 V, I
D
= 1 mA
200
600
W
DS(on)
V
GS
= 0 V, I
D
= 0.1 mA
4000
8000
Gate-Source Forward Voltage
V
GS(F)
V
DS
= 0 V, I
G
= 1 mA
0.7
V
Dynamic
Drain-Source On-Resistance
r
ds(on)
V
GS
= 0 V, I
D
= 0 mA
f = 1 kHz
20
60
200
600
4000
8000
W
Drain-Gate Capacitance
C
dg
V
GD
= -10 V, I
S
= 0 mA
f = 1 MHz
7.5
3
1.5
pF
Source-Gate Capacitance
C
sg
V
GS
= -10 V, I
D
= 0 mA
f = 1 kHz
7.5
3
1.5
pF
Notes:
NCB/NPA/NT
a.
Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
TYPICAL CHARACTERISTICS (T
A
= 25_C UNLESS OTHERWISE NOTED)
0
0.2
0.4
0.6
0.8
1
0
Output Characteristics (VCR2N)
V
DS
- Drain-Source Voltage (V)
-0.5 V
-2.0 V
-2.5 V
-1.0 V
-1.5 V
0
0.1
0.2
0.3
0.4
0.5
Output Characteristics (VCR4N)
V
DS
- Drain-Source Voltage (V)
-3.0 V
30
25
20
15
5
10
1.0
0
0.8
0.6
0.4
0.2
V
GS(off)
= -4 V
V
GS
= 0 V
V
GS(off
)
= -4.2 V
V
GS
= 0 V
-4.0 V
-3.5 V
-1.5 V
-2.0 V
-3.0 V
-2.5 V
I
D
-
Drain Current (mA)
I
D
-
Drain Current (mA)
VCR2N/4N/7N
Vishay Siliconix
Document Number: 70293
S-41225--Rev. F, 28-Jun-04
www.vishay.com
3
TYPICAL CHARACTERISTICS (T
A
= 25_C UNLESS OTHERWISE NOTED)
0
0.2
0.4
0.6
0.8
1
Output Characteristics (VCR7N)
V
DS
- Drain-Source Voltage (V)
200
0
160
120
80
40
-0.5 V
-2.0 V
-1.0 V
-1.5 V
V
GS(off)
= -2.5 V
V
GS
= 0 V
I
D
-
Drain Current (
m
A)
APPLICATIONS
A simple application of a FET VCR is shown in Figure 1, the
circuit for a voltage divider attenuator.
V
IN
FIGURE 1.
Simple Attenuator Circuit
V
OUT
R
-
+
V
GS
VCR
The output voltage is:
R +
r
DS
V
IN
r
DS
V
OUT
=
It is assumed that the output voltage is not so large as to push
the VCR out of the linear resistance region, and that the r
DS
is
not shunted by the load.
The lowest value which V
OUT
can assume is:
R +
r
DS(on)
V
IN
r
DS(on)
V
OUT(min)
=
Since r
DS
can be extremely large, the highest value is:
V
OUT(max)
= V
IN