June 2000 Rev. 3 - ECO #12894
1
PCMCIA Flash Memory Card
SEA Series
PC Card Products
Features
High Performance SRAM Memory Card
Single 5 Volt Supply
Fast Access Times: 150ns
x8 Interface (subset of PCMCIA standard)
Low Power CMOS technology provides very low
power and reliable data retention characteristics
- operating current 80mA maximum
- standby current < 100A typical
Rechargeable Lithium battery with recharge circuitry
- eliminates the need for replaceable batteries
- standby current during recharge typically < 2mA
- battery backup time
18 months - typical
typical based on 512kB (lower densities will have greater
storage times)
Unlimited write cycles, no endurance issues
2KB EEPROM attribute memory containing CIS
(optional)
Optional Hardware Write Protect Switch
PC Card Standard Type I Form Factor
The WEDC SEA SRAM Series memory cards offer
a high performance nonvolatile storage solution for
code and data storage, disk caching, and write
intensive mobile and embedded applications.
Packaged in PCMCIA type I housing the WEDC
SRAM SEA series is based on 1 or 4Mbit SRAM
memories, providing densities from 128 Kbytes to
512 Kbytes.
The SEA series of SRAM memory cards requires a
5V power supply and operates at speeds to 150ns.
The cards are based on advanced CMOS technology
providing very low power and reliable data retention
characteristics. WEDC's SRAM cards contain a
rechargeable lithium battery and recharge circuitry,
eliminating the need for replaceable batteries found
in many SRAM cards.
WEDC's standard cards are shipped with WEDC's
SRAM Logo. Cards are also available with blank
housings (no Logo). The blank housings are available
in both a recessed (for label) and flat housing. Please
contact WEDC sales representative for further
information on Custom artwork.
SRAM Memory Card 128 kB through512 kB
Block Diagram
512KB SRAM Card Shown
+
decoder
and
control
logic
[A0..A18]
/CS
[DO..D7]
Write Prot
Switch
S1
WP
Vcc
ATTRIBUTE
MEMORY
optional
CE1#
CE2#
WE#
OE#
REG#
+ + +
/CS-A
/CS-A
/RD
/RD
/RD
/WR
/WR
/WR
CTRL
CTRL
A0
Power Management
and
Battery Control
Lithium Bat.
to internal
power
supply
Vcc
BVD1
BVD2
GND
VS1
VS2
[DO..D7]
I/O BUFFER
SRAM
512K x 8
[A1..A11]
NC
NC
+
2. pull up resistor (min 10k)
Notes:
1. pull down resistor (min 100k)
+
+
ADDREsS BUS
General Description
June 2000 Rev. 3 - ECO #12894
2
PCMCIA Flash Memory Card
SEA Series
PC Card Products
Pinout
Notes:
1. CD1# and CD2# are grounded internal to PC Card.
2. Shows density for which specified address bit is MSB.
Higher order address bits are no connects (ie 512KB A18 is MSB, A19 - A21 are NC).
3. BVD1 is an open drain output with a 10K ohm internal pull-up resistor.
Pin Signal name I/O
Function
Active
Pin Signal name I/O
Function
Active
1
GND
Ground
35
GND
Ground
2
DQ3
I/O
Data bit 3
36
CD1#
O
Card Detect 1
LOW
3
DQ4
I/O
Data bit 4
37
NC
I/O
Data bit 11
4
DQ5
I/O
Data bit 5
38
NC
I/O
Data bit 12
5
DQ6
I/O
Data bit 6
39
NC
I/O
Data bit 13
6
DQ7
I/O
Data bit 7
40
NC
I/O
Data bit 14
7
CE1#
I
Card enable 1
LOW
41
NC
I
Data bit 15
8
A10
I
Address bit 10
42
NC
I
Card Enable 2
LOW
9
OE#
I
Output enable
LOW
43
VS1
O
Voltage Sense 1
N.C.
10
A11
I
Address bit 11
44
N.C.
11
A9
I
Address bit 9
45
N.C.
12
A8
I
Address bit 8
46
A17
I
Address bit 17
13
A13
I
Address bit 13
47
A18
I
Address bit 18
512KB(2)
14
A14
I
Address bit 14
48
N.C.
I
Address bit 19
15
WE#
I
Write Enable
LOW
49
N.C.
I
Address bit 20
16
N.C.
50
N.C.
I
Address bit 21
17
Vcc
Supply Voltage
51
Vcc
Supply Voltage
18
N.C.
52
N.C.
19
A16
I
Address bit 16
128KB(2)
53
N.C.
Address bit 22
20
A15
I
Address bit 15
54
N.C.
Address bit 23
21
A12
I
Address bit 12
55
N.C.
Address bit 24
22
A7
I
Address bit 7
56
N.C.
Address bit 25
23
A6
I
Address bit 6
57
VS2
O
Voltage Sense 2
N.C.
24
A5
I
Address bit 5
58
N.C.
25
A4
I
Address bit 4
59
N.C.
O
Extended Bus Cycle
Low
26
A3
I
Address bit 3
60
N.C.
27
A2
I
Address bit 2
61
REG#
I
Attrib Mem Select
Low
28
A1
I
Address bit 1
62
BVD2
O
Bat. Volt. Detect 2
29
A0
I
Address bit 0
63
BVD1
O
Bat. Volt. Detect 1
(3)
30
DQ0
I/O
Data bit 0
64
NC
I/O
Data bit 8
31
DQ1
I/O
Data bit 1
65
NC
I/O
Data bit 9
32
DQ2
I/O
Data bit 2
66
NC
O
Data bit 10
33
WP
O
Write Potect
HIGH
67
CD2#
O
Card Detect 2
LOW
34
GND
Ground
68
GND
Ground
June 2000 Rev. 3 - ECO #12894
3
PCMCIA Flash Memory Card
SEA Series
PC Card Products
Mechanical
54.0mm
0.10
(2.126")
10.0mm MIN
(0.400")
1.6mm
0.05
(0.063")
1.0mm
0.05
(0.039")
1.0mm
0.05
(0.039")
3.3mm
T1 (0.130")
T1=0.10mm interconnect area
T1=0.20mm substrate area
Interconnect area
10.0mm MIN
(0.400")
3.0mm MIN
85.6mm
0.20
(3.370")
Substrate area
Type I
June 2000 Rev. 3 - ECO #12894
4
PCMCIA Flash Memory Card
SEA Series
PC Card Products
Symbol
Type
Name and Function
A0 - A25
INPUT
ADDRESS INPUTS: A0 through A25 enable direct addressing of up
to 64MB of memory on the card. Signal A0 is not used in word access
mode. A25 is the most significant bit. (address pins used are based on
card density,see pinout for highest used address pin)
DQ0 DQ7
DQ8 DQ15
INPUT/OUT
PUT
DATA INPUT/OUTPUT: DQ0 THROUGH DQ15 constitute the
bi-directional databus. DQ0 - DQ7 constitute the lower (even) byte and
DQ8 - DQ15 the upper (odd) byte. Upper byte is Not Connected on
this card.
CE1#, C E2 #
INPUT
CARD ENA BLE 1 AND 2: CE1# enables even byte accesses,
CE2# control signal in PCMCIA standard, to access high byte, - not
used on this card
OE#
INPUT
OUTPUT ENA BLE: Active low signal enabling read data from the
memory card.
WE#
INPUT
WRITE ENA BLE: Active low signal gating write data to the memory
card.
RDY/BSY #
OUTPUT
READY/BUSY OUTPUT: Not used for SRAM cards
CD1#, CD2 #
OUTPUT
CARD DETEC T 1 and 2: Provide card insertion detection. These
signals are connected to ground internally on the memory card. The
host socket interface circuitry shall supply 10K-ohm or larger pull-up
resistors on these signal pins.
WP
OUTPUT
WRITE PROTEC T: Follows hardware Write Protect Switch. When
Switch is placed in on position, signal is pulled high (10K ohm). When
switch is off signal is pulled low.
VPP1, VPP2
N.C.
PROGRAM/ERASE POW ER SUPPLY: Not used for SRAM
cards.
VCC
CARD POW ER SUPPLY: 5.0V for all internal circuitry.
GND
GROUND: for all internal circuitry.
REG #
INPUT
ATTRIBUTE MEMORY SELEC T : only used with cards built with
optional attribute memory.
RST
INPUT
RESET: Not used for SRAM cards
WAIT #
OUTPUT
WAIT: This signal is pulled high internally for compatibility. No wait
states are generated.
BVD1, BVD2
OUTPUT
BA TTERY VOLTAG E DETEC T: Provides status of Battery
voltage.
BVD2 = BVD1 = Voh (battery voltage is guaranteed to retain data)
BVD2 = Vol, BVD1 = Voh (data is valid, battery recharge required)
BVD2 = BVD1 = Vol (data may no longer be valid, battery requires
extended recharge)
VS1, VS2
OUTPUT
VOLTAG E SENSE: Notifies the host socket of the card's VCC
requirements. VS1 and VS2 are open to indicate a 5V, 16 bit card has
been inserted.
RFU
RESERV ED FOR FUTURE USE
N.C.
NO INTERNA L CONNECTION TO CARD: pin may be driven
or left floating
Card Signal Description
FUNCTIONAL TRUTH TABLE
READ function
Common Memory
Attribute Memory
Function Mode
/CE2 /CE1 /OE
/WE
/REG D15-D8
D7-D0
/REG D15-D8
D7-D0
Standby Mode
X
H
X
X
X
High-Z
High-Z
X
High-Z
High-Z
Byte Access (8 bits)
X
L
L
H
H
High-Z
Data Out
L
High-Z
Data Out
WRITE function
Standby Mode
X
H
X
X
X
X
X
X
X
X
Byte Access (8 bits)
X
L
H
L
H
X
Data In
L
X
Data In
June 2000 Rev. 3 - ECO #12894
5
PCMCIA Flash Memory Card
SEA Series
PC Card Products
Absolute Maximum Ratings
(2)
Operating Temperature TA (ambient)
Commercial
0C to +60 C
Industrial
-40C to +85 C
Storage Temperature
Commercial
0C to +60 C
Industrial
-40C to +85 C
Voltage on any pin relative to VSS
-0.5V to VCC+0.5V (1)
VCC supply Voltage relative to VSS
-0.5V to +7.0V
Notes:
(1) During transitions, inputs may
undershoot to -2.0V or overshoot to VCC
+2.0V for periods less than 20ns.
(2) Stress greater than those listed under
"Absolute Maximum ratings" may cause
permanent damage to the device. This is a
stress rating only and functional operation at
these or any other conditions greater than
those indicated in the operational sections
of this specification is not implied. Exposure
to absolute maximum rating conditions for
extended periods may affect reliability.
Sym
Parameter
Density
Notes Min
Typ
(3)
Max
Units
Test Conditions
128KB
40
80
ICC
VCC Active Current
512KB
1
40
80
mA
VCC = 5.25V
tcycle = 150ns
ICCS
VCC Standby Current
All
2,4
< 0.1
< 1
10
mA
VCC = 5.25V
Control Signals = VCC
ILI
Input Leakage Current
All
5,6
20
A
VCC = VCCMAX
Vin =VCC or VSS
ILO
Output Leakage Current
All
6
20
A
VCC = VCCMAX
Vout =VCC or VSS
VIL
Input Low Voltage
All
6
0
0.8
V
VIH
Input High Voltage
All
6
3.85
VCC
+0.5
V
VOL
Output Low Voltage
All
6
0.4
V
IOL = 3.2mA
VOH
Output High Voltage
All
6
VCC-
0.4
VCC
V
IOH = -2.0mA
Notes:
1. All currents are for x8 mode and are RMS values unless otherwise specified.
2. Control Signals: CE
1
#, CE
2
#, OE#, WE#, REG#.
3. Typical: VCC = 5V, T = +25C.
4. ICCS includes battery recharge current. Value depends on battery discharge level. ICCS min is specified for fully
charged battery. ICCS typical value is specified for battery discharge to 2.7V. ICCS max is specified for a fully
discharged battery (0V). Battery will recharge to 1.5V in 20 sec.
5. Values are the same for byte and word wide modes for all card densities.
6. Exceptions: Leakage currents on CE1#, CE2#, OE#, REG# and WE# will be < 500 A when VIN = GND due to
internal pull-up resistors.
CMOS Test Conditions: VIL = VSS 0.2V, VIH = VCC 0.2V
DC Characteristics
(1)
Battery Characteristics
Parameter
Density
Notes
Type I
Units
Conditions
Battery Life
All
(1)
10
years
Normal operation, T=25C
128KB
24
512KB
18
Battery
Backup Time
(2)
months
(typical)
T=25C
Battery backup time is a calculated
value and is not guaranteed. This
should not be used to schedule
battery recharging.
Notes:
1. Battery Life refers to functional lifetime of battery.
2. Battery backup time is density and temperature dependent.
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