Lutton Court, Bernard Terrace, Edinburgh EH8 9NX, UK
Tel: +44 (0) 131 667 9386 Fax: +44 (0) 131 667 5176
email: admin@wolfson.co.uk
www: http://www.wolfson.co.uk
Description
WM5620L and WM5620 are quad 8-bit digital to analogue
converters (DAC) controlled via a serial interface. Each
DAC's output voltage range isprogrammable for either x1
or x 2 its reference input voltage, allowing near rail to rail
operation for the x 2 output range. Separate high
impedance buffered voltage reference inputs are provided
for each DAC. WM5620L operates on a single supply
voltage of 3 V while WM5620 operates on 5 V.
WM5620/L interfaces to all popular microcontrollers and
microprocessors via a three wire serial interface with CMOS
compatible, schmitt trigger, digital inputs. An 11 bit
command word comprises 2 DAC select bits, an output
range selection bit and 8-bits of data.
Individual or all DAC outputs are changed using WM5620/
L's double buffered DAC registers and the separate LOAD
and LDAC inputs. DAC outputs are updated
simultaneously by writing a complete set of new values
and then pulsing the LDAC input.
The DAC outputs are optimised for single supply
operation and driving ground referenced loads.
An internal power-on-reset function sets the DAC's input
codes to zero at power up.
Ideal in space critical applications WM5620/L is available
in small outline and DIP packages for commercial (0
o
C to
70
o
C) and industrial (-40
o
C to 85
o
C) temperature ranges.
Four 8-bit voltage output DAC's
Three wire serial interface
Programmable x1 or x 2 output range.
Power-on-reset sets outputs to zero
Buffered voltage reference inputs
Simultaneous DAC output update
14 pin SO or DIP package
Key Specifications
Single supply operation:
WM5620L
: 3 V
WM5620
: 5 V
0 to 4 V output (x 2 output range) at 5 V VDD
0 to 2.5 V output (x 2 output range) at 3 V VDD
Low power: 5.1 mW at 3 V, 10 mW at 5 V max.
Guaranteed monotonic output
Applications
Programmable d.c. voltage sources
Digitally controlled attenuator/amplifier
Signal synthesis
Mobile communications
Automatic test equipment
Process control
3 & 5V Quad 8-Bit Voltage Output DAC
with Serial Interface
Features
Wolfson Microelectronics
Production Data
Sept. 1996 Rev 2
1996 Wolfson Microelectronics
WM5620L, WM5620
Production Data data sheets contain
final specifications current on publication
date. Supply of products conforms to
Wolfson Microelectronics standard terms
and conditions
DAC
DAC
DAC
DAC
Latch
Latch
Latch
Latch
Latch
Latch
Latch
Latch
x 2
x 2
x 2
x 2
Serial Interface
Power-on-Reset
9
9
9
9
8
8
8
8
Ref A
2
3
4
Ref B
Ref C
5
Ref D
Clk
Data
Load
7
6
8
DACA
12
11
DACB
10
DACC
DACD
9
V
DD
14
13
LDAC
GND
1
Block Diagram
Wolfson Microelectronics
2
WM5620L, WM5620
Pin Configuration
Ordering Information
DEVICE TEMP. RANGE PACKAGE
WM5620CN
0
o
C to 70
o
C
14 pin plastic DIP
WM5620CD
0
o
C to 70
o
C
14 pin plastic SO
WM5620IN
-40
o
C to 85
o
C
14 pin plastic DIP
WM5620ID
-40
o
C to 85
o
C
14 pin plastic SO
WM5620LCN
0
o
C to 70
o
C
14 pin plastic DIP
WM5620LCD
0
o
C to 70
o
C
14 pin plastic SO
WM5620LIN
-40
o
C to 85
o
C
14 pin plastic DIP
WM5620LID
-40
o
C to 85
o
C
14 pin plastic SO
Absolute Maximum Ratings
(note 1)
Supply Voltage (VDD - VGND) . . . . . . . . . . . . +7V
Digital Inputs . . . . . . . . . . GND - 0.3 V, VDD + 0.3 V
Reference inputs . . . . . . . GND - 0.3 V, VDD + 0.3 V
Top View N and D packages
Operating temperature range, T
A
. . . . . . T
MIN
to T
MAX
WM5620_C_ . . . . . . . . . . . . . . . . 0
o
C to +70
o
C
WM5620_I_ . . . . . . . . . . . . . . . . -40
o
C to +85
o
C
Storage Temperature_ . . . . . . . . . . -50
o
C to +150
o
C
Lead Temperature 1.6mm (1/16 inch) from case
(soldering, 10 sec) . . . . . . . . . . . . . . . + 260
o
C
Recommended Operating Conditions
Electrical Characteristics: WM5620
V
DD
= 5 V, GND = 0 V, V
REF
= 2 V, R
L
= 10 k
, C
L
= 100 pF, T
A
= full range, unless otherwise stated.
SYMBOL MIN NOMINAL MAX UNIT
Supply voltage WM5620
V
DD
4.75
5.25
V
Supply Voltage WM5620L
V
DD
2.7
3.3
5.25
V
Reference input range x1 gain
V
REF
[A/B/C/D]
V
DD
- 1.5
V
DAC output load resistance to GND
R
L
10
k
High level digital input voltage
V
IH
0.8 V
DD
V
Low level digital input voltage
V
IL
0.8
V
Clock frequency
F
CLK
1
MHz
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNIT
Power Supply
Supply current
I
DD
V
DD
= 5V
2
mA
Static Accuracy
Resolution
8
Bits
Monotonicity
8
Bits
Differential Nonlinearity
DNL
V
REF
= 2 V, Range x 2. (note 3)
0.1
0.9
LSB
Integral Nonlinearity
INL
V
REF
= 2 V, Range x 2. (note 4)
1.0
LSB
Zero-code error
ZCE
V
REF
= 2 V, Range x 2. (note 5)
0
30
mV
Zero-code error
Input code = 00 Hex (note 6)
10
V/
O
C
temperature coefficient
Zero-code error
Input code = 00 Hex (note 7)
0.5
mV/V
supply rejection
Wolfson Microelectronics
3
WM5620L, WM5620
Electrical Characteristics: WM5620
Electrical Characteristics: WM5620L
V
DD
= 3V, GND = 0 V, V
REF
=1.25 V, R
L
= 10 k
, C
L
= 100 pF, T
A
= full range, unless otherwise stated.
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNIT
Power Supply
Supply current
I
DD
V
DD
= 3.3V
2
mA
Static Accuracy
Resolution
8
Bits
Monotonicity
8
Bits
Differential Nonlinearity DNL
V
REF
= 1.25 V, Range x 2. (note 3)
0.9
LSB
Integral Nonlinearity
INL
V
REF
= 1.25 V, Range x 2. (note 4)
1.0
LSB
Zero-code error
ZCE
V
REF
= 1.25 V, Range x 2. (note 5)
0
30
mV
Zero-code error
Input code = 00 Hex (note 6)
10
V/
O
C
temperature coefficient
Full scale error
FSE
V
REF
= 1.25 V, Range x 2. (note 8)
60
mV
Full scale error
Input code = FF Hex (note 9)
25
V/
O
C
temperature coefficient
Output sink current
I
O(SINK)
Each DAC output
20
A
Output source current
I
O(SOURCE)
1
mA
Ref. input current
I
REF
VDD = 3.3V; Vref = 1.5V
10
A
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNIT
Digital Inputs
High level input current
I
IH
V
I
= V
DD
10
A
Low level input current
I
IL
V
I
= 0V
10
A
Input capacitance
C
I
15
pF
Timing Parameters
Data input setup time
t
SD
50
ns
Data input hold time
t
HD
50
ns
CLK
to Load
t
HL
50
ns
Load
to CLK
t
SL
50
ns
Load duration
t
WL
250
ns
LDAC duration
t
WD
250
ns
Load
to LDAC
t
LD
0
ns
Electrical Characteristics: WM5620 & WM5620L
V
DD
= 2.7V to 5.5V, GND = 0 V, R
L
= 10 k
, CL = 100 pF, TA = full range, unless otherwise stated.
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNIT
Full scale error
FSE
V
REF
= 2 V, Range x 2. (note 8)
60
mV
Full scale error
Input code = FF Hex (note 9)
25
V/
O
C
temperature coefficient
Full scale error supply
Input code= FF Hex,
0.5
mV/V
rejection
(note 10)
Output sink current
I
O(SINK)
Each DAC output
20
A
Output source current
I
O(SOURCE)
2
mA
Reference input current
I
REF
V
DD
=5V, V
REF
=2V
10
A
V
DD
= 5V 5%, GND = 0 V, V
REF
= 2 V, R
L
= 10 k
, C
L
= 100 pF, T
A
= full range, unless otherwise stated.
Wolfson Microelectronics
4
WM5620L, WM5620
Electrical Characteristics: WM5620 & WM5620L
V
DD
= 2.7V to 5.5V, GND = 0 V, R
L
= 10 k
, CL = 100 pF, TA = full range, unless otherwise stated.
PARAMETER
SYMBOL TEST CONDITIONS
MIN
TYP
MAX
UNIT
Reference Inputs
Reference input voltage V
REF
A, B, C, D, inputs
GND
V
DD
- 1.5
V
Reference input
A, B, C, D, inputs
15
pF
capacitance
Reference feedthrough
A, B, C, D, inputs (note 11)
- 60
dB
Channel to channel
A, B, C, D, inputs (note 12)
-60
dB
isolation
Dynamic Performance
Output settling time
To 1/2 LSB,
V
DD
= 3 V & 5V
10
s
(note13)
Output slew rate
1
V/
s
Input bandwidth
(note 14)
100
kHz
Large Signal Bandwidth
Measured at -3dB point
100
kHz
Digital Crosstalk
Clk = 1MHz sq wave measured at
-50
dB
DACA - DACD
Electrical Characteristics: WM5620 & WM5620L
(continued)
Notes:
1.
Absolute Maximum Ratings are stress ratings only.
Permanent damage to the device may be caused by
continuously operating at or beyond these limits.
Device functional operating range limits are given
under Recommended Operating Conditions.
Guaranteed performance specifications are given
under Electrical Characteristics at the test conditions
specified.
2.
Total Unadjusted Error is the sum of integral linear-
ity error, zero code error and full scale error over the
input code range.
3.
Differential Nonlinearity (DNL) is the difference
between the measured and ideal 1 LSB amplitude
change of any two adjacent codes. A guarantee of
monotonicity means the output voltage changes in
the same direction (or remains constant) as a change
in the digital input code.
4.
Integral Nonlinearity (INL) is the maximum deviation
of the output from the line between zero and full scale
(excluding the effects of zero code and full-scale
errors).
5.
Zero code error is the deviation from zero voltage
output when the digital input code is zero.
6. Zero code error temperature coefficient is given by:
ZCETC = (ZCE(Tmax) - ZCE(Tmin))/VREF
x 10
6
/
(Tmax - Tmin)
7. Zero-code Error Rejection Ratio (ZCE-RR) is meas-
ured by varying the V
DD
voltage, from 4.5 to 5.5 V
d.c., and measuring the proportion of this signal im-
posed on the zero-code output voltage.
8. Full-scale error is the deviation from the ideal full-
scale output (VREF - 1 LSB) with an output load of
10k
9. Full-Scale Temperature Coefficient is given by:
FSETC = (FSE(T
max
) - FSE(T
min
))/V
REF
x 10
6
/(T
max
-
T
min
)
10. Full Scale Error Rejection Ratio (FSE-RR) is meas-
ured by varying the V
DD
voltage, from 4.5 to 5.5 V
d.c., and measuring the proportion of this signal im-
posed on the full-scale output voltage.
Wolfson Microelectronics
5
WM5620L, WM5620
Tot al Unad just ed Error
V
DD
= 5 V , V
ref
= 2.5 V , Range = x 1, T
A
= 25
O
C
-0.5
-0.25
0
0.25
0.5
0
32
64
96
128
160 192
224 256
Input Co de
Error (lsb
)
Electrical Characteristics: WM5620 & WM5620L
(continued)
11 Reference feedthrough is measured at a DAC out-
put with an input code = 00 Hex with a V
REF
input = 1
V
dc
+ 1 V
PP
at 10kHz
12. Channel to channel isolation is measured at a DAC
output with an input code of one DAC to FF Hex and
the code oa all other DACs to oo Hex with a V
REF
input = 1 V
dc
+ 1 V
pp
at 10kHz
13 Setting time is the time for the output signal to remain
within 0.5 LSB of the final measurement value for a
digital input code change of 00 Hex to FF Hex. For WM
5620: V
DD
= 5V, V
REF
= 2V and range = x 2. For
WM5620L: V
DD
= 3, V
REF
= 1.25V and range = x 2.
14 Reference bandwidth is the -3dB bandwidth with an
input at V
REF
= 1.25 V
dc
=+ 2 V
pp
with a digital input
code of full-scale
Parameter Measurement Information
DACA
DACB
DACC
DACD
10K
CL - 100pF
Typical DNL, INL and TUE * at V
DD
= 5 V
Typical Performance Characteristics
Slewing Settling Time and Linearity Measurements
* see note 2
Inte gral No nline arit y
V
DD
= 5 V , V
ref
= 2.5 V , Range = x 1, T
A
= 25
O
C
-0.2
-0.1
0
0.1
0.2
0
32
64
96
128
160
192
224
256
Input Code
Error (lsb
)
D iff erential Nonlinearit y
V
DD
= 5 V , V
ref
= 2.5 V , Range x 1, T
A
= 25
O
C
-0.2
-0.1
0
0.1
0.2
0
32
64
96
128
160
192
224
256
Input Code
Error (lsb
)
D if fe re nt ial Nonline arit y
V
DD
= 5 V , V
ref
= 2 V , Range = x 2, T
A
= 25
O
C
-0.2
-0.1
0
0.1
0.2
0
32
64
96
128
160
192
224
256
Input Code
Error (lsb
)
Wolfson Microelectronics
6
WM5620L, WM5620
Out put Source Current v s
Out put Voltage
0
1
2
3
4
5
6
7
8
0
1
2
3
4
5
V
out
(V)
I
out
(mA
)
V
DD
= 5 V
T
A
= 25
O
C
V
ref
= 2 V
Range = x 2
Input code = 255
Typical DNL, INL and TUE * at V
DD
= 5 V
Typical Performance Characteristics
(Continued)
Typical DNL, INL and TUE at V
DD
= 3 V
Inte gral Nonline arit y
V
DD
= 5 V , V
ref
= 2 V , Range = x 2, T
A
= 25
O
C
-0.2
-0.1
0
0.1
0.2
0
32
64
96
128
160
192
224
256
Input Code
Error (lsb
)
To tal Unadjuste d Error
V
DD
= 5 V , V
ref
= 2 V , Range = x 2, T
A
= 25
O
C
-0.5
-0.25
0
0.25
0.5
0
32
64
96
128
160
192
224
256
Input Code
Error (lsb
)
D if fe re nt ial Nonline arit y
V
DD
= 3 V , V
ref
= 1.25 V , Range x 2, T
A
= 25
O
C
-0.2
-0.1
0
0.1
0.2
0
32
64
96
128
160
192
224
256
Input Code
Error (lsb
)
Inte gral Nonline arit y
V
DD
= 3 V , V
ref
= 1.25 V , Range x 2, T
A
= 25
O
C
-0.2
-0.1
0
0.1
0.2
0
32
64
96
128
160
192
224
256
Input Code
Error (lsb
)
To tal Unadjuste d Error
V
DD
= 3 V , V
ref
= 1.25 V , Range x 2, T
A
= 25
O
C
-0.5
-0.25
0
0.25
0.5
0
32
64
96
128
160
192
224
256
Input Code
Error (lsb
)
Supply C urrent v s
Temperat ure
0.8
0.85
0.9
0.95
1
1.05
1.1
1.15
1.2
-50
0
50
100
Tempera ture (
O
C)
I
DD
(mA
)
V
DD
= 5 V
V
ref
= 2 V
V
DD
= 3 V
V
ref
= 1.25 V
Range = x 2
Input code = 255
Wolfson Microelectronics
7
WM5620L, WM5620
Large Signal Fre que ncy
Re sponse
-20
-18
-16
-14
-12
-10
-8
-6
-4
-2
0
1
10
100
1000
Frequency (kHz)
Relative Gain (dB)
V
DD
= 5 V
T
A
= 25
O
C
V
ref
= 1.25 V
dc
+ 2 V
pp
Input Code = 255
Positive Rise and Settling Time V
DD
= 5 V
Positive Rise and Settling Time V
DD
= 3 V
Fall time = 4.25
s, Negative slew rate = 0.46
s
Settling time = 8.5
s
Fall time = 5.0
s, Negative slew rate = 0.63
s
Settling time = 9.5
s
Rise time = 2.05
s, Positive slew rate = 0.96
s
Settling time = 4.5
s
Rise time = 2.4
s, Positive slew rate = 1.0
s
Settling time = 5.8
s
500 mV/Vert. div
2
s/Hor. div
500 mV/Vert. div
5
s/Hor. div
1 V/Vert. div
2
s/Hor. div
V
DD
= 3 V
TA = 25
O
C
code 00 to FF Hex
Range = x 2
Vref = 1.25 V
1 V/Vert. div
5
s/Hor. div
Negative Fall and Settling Time V
DD
= 3 V
Negative Fall and Settling Time V
DD
= 5 V
V
DD
= 3 V
TA = 25
O
C
code FF to 00 Hex
Range = x 2
Vref = 1.25 V
V
DD
= 5 V
TA = 25
O
C
code 00 to FF Hex
Range = x 2
Vref = 2 V
V
DD
= 5 V
TA = 25
O
C
code FF to 00 Hex
Range = x 2
Vref = 2 V
Typical Performance Characteristics
(Continued)
Small Signal Frequency
Response
-60
-50
-40
-30
-20
-10
0
10
1
10
100
1000
10000
Freq uency (kHz)
Relative Gain (dB)
V
DD
= 5 V
T
A
= 25
O
C
V ref = 2 V
dc
+ 0.5 V
pp
Input code = 255
Wolfson Microelectronics
8
WM5620L, WM5620
A1
A0
RNG
D7
D6
D5
D4
D3
D2
D1
D0
1
2
3
4
5
6
7
8
9
10
11
CLK
Data
Load
LDAC
Timing Waveforms
Figure 1. Load controlled update (LDAC = 0)
CLK
50 %
t
SD
t
HD
Data
Data Input Timing
50 %
CLK
t
HL
t
WL
t
SL
t
LD
t
WD
Load and LDAC Timing
Load
LDAC
Equivalent Input and Output Circuits
Timing Diagrams
Wolfson Microelectronics
9
WM5620L, WM5620
Timing Diagrams
Figure 2. LDAC controlled update
A1
A0
RNG
D7
D6
D5
D4
D3
D2
D1
D0
1
2
3
4
5
6
7
8
9
10
11
CLK
Data
Load
LDAC
CLK
Data
Load
LDAC
A1
A0
RNG
D7
D6
D5
D4
D3
D2
D1
D0
1
2
3
4
5
6
7
8
9
10
11
CLK
Data
Load
LDAC
A1
A0
RNG
D7
D6
D5
D4
D3
D2
D1
D0
1
2
3
4
5
6
7
8
9
10
11
Figure 4. LDAC controlled update using 8-bit serial word.
Figure 3. Load controlled update (LDAC = 0) using 8-bit serial word.
Wolfson Microelectronics
10
WM5620L, WM5620
Functional Description
DAC operation
Each of WM5620/L 's four digital to analogue converters
(DACs) are implemented using a single resistor string with
256 taps corresponding to each of the input 8-bit codes.
One end of a resistor string is connected to the GND pin
and the other end is driven from the output of a reference
input buffer. The use of a resistor string guarantees
monotonicity of the DAC's output voltage. Linearity depends
upon the matching of the resistor string's individual elements
and the performance of the output buffer. The reference input
buffers present a high impedance to reference sources.
Each DAC has a voltage output amplifier which is
programmable for gains of x1 or x 2 through the serial
interface. The DAC output amplifiers feature rail to rail
output stages, allowing outputs over the full supply voltage
range to be achieved with a x 2 gain setting and a VDD/2
reference voltage input. Used in this way a slight
degradation in linearity will occur as the output voltage
approaches VDD.
A power-on-reset activates at power up resetting the DACs
inputs to code 0. Each output voltage is given by:
V
out
= V
ref
x CODE/256 x (1 + RNG)
Where:
RNG controls the output gains of x 1 and x 2
CODE is the range 0 to 255
Pin Descriptions
Pin
Name
Type
Function
1
GND
Supply
Ground return and reference terminal
2
RefA
Analogue input
Reference voltage input to DACA
3
RefB
Analogue input
Reference voltage input to DACB
4
RefC
Analogue input
Reference voltage input to DACC
5
RefD
Analogue input
Reference voltage input to DACD
6
Data
Digital input
Serial interface data
7
Clk
Digital input
Serial interface clock, negative edge sensitive
8
Load
Digital input
Serial interface load
9
DACD
Analogue output
DAC D output
10
DACC
Analogue output
DAC C output
11
DACB
Analogue output
DAC B output
12
DACA
Analogue output
DAC A output
13
LDAC
Digital input
DAC update latch control
14
V
DD
Supply
positive supply voltage
Data Interface
WM5620/L's four double buffered DAC inputs allow
several ways of controlling the update of each DAC's
output.
Serial data is input, MSB first, into the DATA input pin using
CLK, LOAD and LDAC control inputs and comprises 2 DAC
address bits, an output range (RNG) bit and 8 DAC input
bits.
With the LOAD pin high data is clocked into the DATA pin
on each falling edge of CLK. Any number of data bits may
be clocked in, only the last 11 bits are used. When all data
bits have been clocked in, a falling edge at the LOAD pin
latches the data and RNG bits into the correct 9 bit input
latch using the 2 bit DAC address.
If the LDAC input pin is low, the second latch at the DAC
input is transparent, and the DAC input and RNG bit will be
updated on the falling edge of LOAD simultaneously with
the input latch, as shown in figure 1. If the LDAC input is high
during serial data input, as shown in figure 2, the falling edge
of the LOAD input stores the data in the addressed input
latch. The falling edge of LDAC updates the second latches
from the input latches and hence the DAC outputs.
Wolfson Microelectronics
11
WM5620L, WM5620
Serial Input Decode
Functional Description
(Continued)
A1
A0
DAC
0
0
DACA
0
1
DACB
1
0
DACC
1
1
DACD
D7 D6 D5 D4 D3 D2 D1 D0
Output Voltage
0
0
0
0
0
0
0
0
GND
0
0
0
0
0
0
0
1
(1/256) x Ref (1 + RNG)
0
1
1
1
1
1
1
1
(127/256) x Ref (1 + RNG)
1
0
0
0
0
0
0
0
(128/256) x Ref (1 + RNG)
1
1
1
1
1
1
1
1
(255/256) x Ref (1 + RNG)
Using these inputs individual DACs can be updated using
one 11 bit serial input word and the LOAD pin. Using both
LOAD and LDAC, all or selected DACs can be updated
after an appropriate number of data words have been
inputted. Figures 3 & 4 illustrate operation with the 8 clock
pulses available from some microprocessors. If the data
input is interrupted in this way the clock input must be
held low during the break in clock pulses.
The RNG bit controls the DAC output range. When RNG
= 0 the output is between Vref(A,B,C,D) and GND and
when RNG = 1 the range is between 2 x Vref (A,B,C,D)
and GND.
Wolfson Microelectronics
12
WM5620L, WM5620
Linearity, offset, and gain error using
single end supplies
When an amplifier is operated from a single supply, the
voltage offset can still be either positive or negative. With
a positive offset, the output voltage changes on the first
code change. With a negative offset the output voltage may
not change with the first code depending on the magni-
tude of the offset voltage.
The output amplifier, with a negative voltage offset, attempts
to drive the output to a negative voltage. However, because
the most negative supply rail is GND, the output cannot
drive to a negative voltage.
So when the output offset voltage is negative, the output
voltage remains at ZERO volts until the input code value
produces a sufficient output voltage to overcome the
inherent negative offset voltage, resulting in the transfer
function shown below.
Effect of negative offset (single supply)
Applications Information
This negative offset error, not the linearity error, produces
this breakpoint. The transfer function would have followed
the dotted line if the output buffer could drive to a nega-
tive voltage.
For a DAC, linearity is measured between ZERO input code
( all inputs 0 ) and full scale code ( all inputs 1 ) after offset
and full scale are adjusted out or accounted for in some
way. However, single supply operation does not allow for
adjustment when the offset is negative due to the break-
point in the transfer function. So the linearity in the unipo-
lar mode is measured between full scale code and the
lowest code which produces a positive output voltage. The
code is calculated from the maximum specification for the
negative offset.
Wolfson Microelectronics
13
WM5620L, WM5620
Package Descriptions
Plastic Small-Outline Package
Notes:
A. Dimensions in millimeters.
B. Complies with Jedec standard MS-012.
C. This drawing is subject to change without notice.
D. Body dimensions do not include mold flash or protrusion.
E. Dimension A, mould flash or protrusion shall not exceed 0.15mm. Body width, interlead flash or protrusions shall
not exceed 0.25mm.
N
Min
Max
8
4.80
5.00
14
8.55
8.75
16
9.80
10.00
Dimension 'A' Variations
D - 8 pins shown
0.51
0.33
1.75
1.35
0.25
0.10
Pin spacing
1.27 B.S.C.
1.27
0.40
0 to 8
O
O
0.25
0.19
0.50
0.25
x 45 NOM
O
6.20
5.80
4.00
3.80
1
4
5
8
A
Rev. 1 November 96
Wolfson Microelectronics
14
WM5620L, WM5620
Package Descriptions
Notes:
A. Dimensions are in inches
B. Falls within JEDEC MS-001( 20 pin package is shorter than MS-001)
C. N is the maximum number of terminals
D. All end pins are partial width pins as shown, except the 14 pin package which is full width.
Dimension 'A' Variations
Dual-In-Line Package
N or P
Rev. 1 November 96
N
Min
Max
8
0.355
0.400
14
0.735
0.775
16
0.735
0.775
20
0.940
0.975
0.210 Max.
0.070 Max.
0.045
0.030
0.022
0.014
0.015
Min.
0.150
0.115
0.005
Min.
Pin spacing
0.100 B.S.C.
1
N
Seating
plane
0.280
0.240
0.325
0.290
0.014
0.008
105
90
O
O
N/2
A
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