Document Outline
- WM8955L
- Stereo DAC for Portable Audio Applications
- DESCRIPTION
- FEATURES
- APPLICATIONS
- BLOCK DIAGRAM
- TABLE OF CONTENTS
- PIN CONFIGURATION
- ORDERING INFORMATION
- PIN DESCRIPTION
- ABSOLUTE MAXIMUM RATINGS
- RECOMMENDED OPERATING CONDITIONS
- ELECTRICAL CHARACTERISTICS
- OUTPUT PGA S LINEARITY
- HEADPHONE OUTPUT THD VERSUS POWER
- SPEAKER OUTPUT THD VERSUS POWER
- POWER CONSUMPTION
- SIGNAL TIMING REQUIREMENTS
- SYSTEM CLOCK TIMING
- AUDIO INTERFACE TIMING MASTER MODE
- AUDIO INTERFACE TIMING SLAVE MODE
- CONTROL INTERFACE TIMING 3--WIRE MODE
- CONTROL INTERFACE TIMING 2--WIRE MODE
- DEVICE DESCRIPTION
- INTRODUCTION
- SIGNAL PATH
- LINE INPUTS AND OUTPUT MIXERS
- ANALOGUE OUTPUTS
- DIGITAL AUDIO INTERFACE
- MASTER CLOCK AND PHASE LOCKED LOOP
- AUDIO SAMPLE RATES
- CONTROL INTERFACE
- POWER SUPPLIES
- POWER MANAGEMENT
- REGISTER MAP
- DIGITAL FILTER CHARACTERISTICS
- TERMINOLOGY
- DAC FILTER RESPONSES
- APPLICATIONS INFORMATION
- MINIMISING POP NOISE AT THE ANALOGUE OUTPUTS
- LINE OUTPUT CONFIGURATION
- HEADPHONE OUTPUT CONFIGURATION
- SPEAKER OUTPUT CONFIGURATION
- PACKAGE DIMENSIONS
- IMPORTANT NOTICE
WM8955L
Stereo DAC For Portable Audio Applications
WOLFSON MICROELECTRONICS PLC
www.wolfsonmicro.com
Preliminary Technical Data, June 2003, Rev 2.0
Copyright
2003 Wolfson Microelectronics plc
DESCRIPTION
The WM8955L is a low power, high quality stereo DAC with
integrated headphone and loudspeaker amplifiers, designed to
reduce external component requirements in portable digital
audio applications.
The on-chip headphone amplifiers can deliver 40mW into a 16
load. Advanced on-chip digital signal processing performs bass
and treble tone control.
The WM8955L can operate as a master or a slave, and
includes an on-chip PLL. It can use most master clock
frequencies commonly found in portable systems, including
USB, GSM, CDMA or PDC clocks, or standard 256f
s
clock
rates. Different audio sample rates such as 48kHz, 44.1kHz,
8kHz and many others are supported.
The WM8955L operates on supply voltages from 1.8V up to
3.6V, although the digital core can operate on a separate supply
down to 1.42V, saving power. Different sections of the chip can
also be powered down under software control.
The WM8955L is supplied in a very small and thin 5x5mm QFN
package, ideal for use in hand-held and portable systems.
FEATURES
DAC SNR 98dB, THD -86dB (`A' weighted @ 48kHz, 3.3V)
On-chip 400mW BTL Speaker Driver (mono)
On-chip Headphone Driver
- 40mW output power on 16
/ 3.3V
- SNR 96dB, THD 79dB at 20mW with 16
load
Stereo and Mono Line-in mix into DAC output
Separately Mixed Stereo and Mono Outputs
Digital Tone Control and Bass Boost
Low Power
- Down to 7mW for stereo playback (1.8V / 1.5V supplies)
- 10
W Shutdown Mode
Low Supply Voltages
- Analogue and Digital I/O: 1.8V to 3.6V
- Digital core: 1.42V to 3.6V
Master clocks supported: GSM, CDMA, PDC, USB or
standard audio clocks
Audio sample rates supported: 8, 11.025, 12, 16, 22.05, 24,
32, 44.1, 48, 88.2, 96kHz
32-pin QFN package, 5x5x0.9mm size, 0.5mm lead pitch
APPLICATIONS
Smartphone / Multimedia Phone
Digital Audio Player
BLOCK DIAGRAM
DAC
LI2LO
MI2LO
MI2RO
RI2RO
LI2MO
RI2MO
LD2LO
RD2LO
LD2MO
RD2MO
LD2RO
RD2RO
LEFT
MIXER
RIGHT
MIXER
MONO
MIXER
HPDETECT
DCVDD
DBVDD
DGND
DIGITAL
FILTERS
TONE
CONTROL
DIGITAL
AUDIO
INTERFACE
BCLK
DACDAT
DACLRC
VR
EF
AVD
D
AGN
D
VM
I
D
50K
50K
W
WM8955L
VR
E
F
LINEINL
LINEINR
DAC
CONTROL
INTERFACE
CSB
SDIN
SCLK
MODE
ROUT1VOL
LOUT1VOL
MONOVOL
LOUT1
ROUT1
MONOOUT
LOUT2
ROUT2
-1
HP
V
D
D
HP
G
N
D
ROUT2
INV
Loudspeaker
L - (-R)
= L+R
ROUT2VOL
LOUT2VOL
OUT3
VREF
MONOOUT
M
U
X
ROUT1
VREF
-1
MO
NO
IN+
MO
NO
IN-
DIFF. IN
MCLK
f/2
PLL
CLKOUT
f/2
MCLK
SEL
CLKOUT
SEL
MCLK
DIV2
CLKOUT
DIV2
WM8955L
Preliminary Technical Data
w
PTD Rev 2.0 June 2003
2
TABLE OF CONTENTS
DESCRIPTION .......................................................................................................1
FEATURES.............................................................................................................1
APPLICATIONS .....................................................................................................1
BLOCK DIAGRAM .................................................................................................1
TABLE OF CONTENTS .........................................................................................2
PIN CONFIGURATION...........................................................................................3
ORDERING INFORMATION ..................................................................................3
PIN DESCRIPTION ................................................................................................4
ABSOLUTE MAXIMUM RATINGS .........................................................................5
RECOMMENDED OPERATING CONDITIONS .....................................................5
ELECTRICAL CHARACTERISTICS ......................................................................6
TERMINOLOGY............................................................................................................. 7
OUTPUT PGA'S LINEARITY ......................................................................................... 8
HEADPHONE OUTPUT THD VERSUS POWER........................................................... 9
SPEAKER OUTPUT THD VERSUS POWER .............................................................. 10
POWER CONSUMPTION ....................................................................................11
SIGNAL TIMING REQUIREMENTS .....................................................................12
SYSTEM CLOCK TIMING............................................................................................ 12
AUDIO INTERFACE TIMING MASTER MODE ......................................................... 12
AUDIO INTERFACE TIMING SLAVE MODE ............................................................ 13
CONTROL INTERFACE TIMING 3-WIRE MODE ..................................................... 13
CONTROL INTERFACE TIMING 2-WIRE MODE ..................................................... 14
DEVICE DESCRIPTION .......................................................................................15
INTRODUCTION.......................................................................................................... 15
SIGNAL PATH ............................................................................................................. 15
LINE INPUTS AND OUTPUT MIXERS ........................................................................ 19
ANALOGUE OUTPUTS ............................................................................................... 22
DIGITAL AUDIO INTERFACE...................................................................................... 26
MASTER CLOCK AND PHASE LOCKED LOOP ......................................................... 29
AUDIO SAMPLE RATES.............................................................................................. 31
CONTROL INTERFACE .............................................................................................. 33
POWER SUPPLIES ..................................................................................................... 35
POWER MANAGEMENT ............................................................................................. 35
REGISTER MAP...................................................................................................37
DIGITAL FILTER CHARACTERISTICS ...............................................................38
TERMINOLOGY........................................................................................................... 38
DAC FILTER RESPONSES ......................................................................................... 38
APPLICATIONS INFORMATION .........................................................................40
MINIMISING POP NOISE AT THE ANALOGUE OUTPUTS ........................................ 40
LINE OUTPUT CONFIGURATION............................................................................... 40
HEADPHONE OUTPUT CONFIGURATION ................................................................ 41
SPEAKER OUTPUT CONFIGURATION...................................................................... 41
PACKAGE DIMENSIONS ....................................................................................42
IMPORTANT NOTICE ..........................................................................................43
ADDRESS:................................................................................................................... 43
Preliminary Technical Data
WM8955L
w
PTD Rev 2.0 June 2003
3
PIN CONFIGURATION
ORDERING INFORMATION
ORDER CODE
TEMPERATURE
RANGE
PACKAGE
MOISTURE
SENSITIVITY
LEVEL
WM8955LEFL
-25
C to +85
C
32-pin QFN
(5x5x0.9mm)
MSL1
WM8955LSEFL
-25
C to +85
C
32-pin QFN
(5x5x0.9mm)
(lead free)
MSL1
WM8955LEFL/R
-25
C to +85
C
32-pin QFN
(5x5x0.9mm)
(tape and reel)
MSL1
WM8955LSEFL/R
-25
C to +85
C
32-pin QFN
(5x5x0.9mm)
(lead free, tape
and reel)
MSL1
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
25
26
27
28
29
30
31
32
DA
CDA
T
BCLK
DCV
DD
DG
ND
D
BVD
D
MC
L
K
DACL
RC
OUT3
AV
DD
VM
I
D
AG
ND
VRE
F
NC
H
P
DE
TE
CT
HPGND
PLLGND
MONOOUT
HPV
D
D
ROUT1
LOUT1
ROUT2
LOUT2
CL
KOUT
CSB
MODE
MONOIN+
LINEINL
LINEINR
MONOIN-
SDIN
SCLK
NC
Note:
Reel quantity = 3,500
WM8955L
Preliminary Technical Data
w
PTD Rev 2.0 June 2003
4
PIN DESCRIPTION
PIN NO
NAME
TYPE
DESCRIPTION
1
MCLK
Digital Input
Master Clock
2
DCVDD
Supply
Digital Core Supply
3
DBVDD
Supply
Digital Buffer (I/O) Supply
4
DGND
Supply
Digital Ground (return path for both DCVDD and DBVDD)
5
BCLK
Digital Input / Output
Audio Interface Bit Clock
6
DACDAT
Digital Input
DAC Digital Audio Data
7
DACLRC
Digital Input / Output
Audio Interface Left / Right Clock
8
CLKOUT
Digital Output
Buffered Clock Output (from MCLK or internal PLL)
9
PLLGND
Supply
Internally connected to AGND. Connect this pin to AGND externally
for best PLL performance, or leave floating.
10
MONOOUT
Analogue Output
Mono Output
11
OUT3
Analogue Output
Output 3 (can be used as Headphone Pseudo Ground)
12
ROUT1
Analogue Output
Right Output 1 (Line or Headphone)
13
LOUT1
Analogue Output
Left Output 1 (Line or Headphone)
14
HPGND
Supply
Supply for Analogue Output Drivers (LOUT1/2, ROUT1/2)
15
ROUT2
Analogue Output
Right Output 1 (Line or Headphone or Speaker)
16
LOUT2
Analogue Output
Left Output 1 (Line or Headphone or Speaker)
17
HPVDD
Supply
Supply for Analogue Output Drivers (LOUT1/2, ROUT1/2,
MONOUT)
18
AVDD
Supply
Analogue Supply
19
AGND
Supply
Analogue Ground (return path for AVDD)
20
VREF
Analogue Output
Reference Voltage Decoupling Capacitor
21
VMID
Analogue Output
Midrail Voltage Decoupling Capacitor
22
NC
No Connect
No Internal Connection
23
HPDETECT
Logic Input
Headphone / Speaker switch (referred to AVDD)
24
NC
No Connect
No Internal Connection
25
MONOIN-
Analogue Input
Negative end of MONOIN+, for differential mono signals
26
MONOIN+
Analogue Input
Analogue Line-in to mixers (mono channel)
27
LINEINR
Analogue Input
Analogue Line-in to mixers (right channel)
28
LINEINL
Analogue Input
Analogue Line-in to mixers (left channel)
29
MODE
Digital Input
Control Interface Selection
30
CSB
Digital Input
Chip Select / Device Address Selection
31
SDIN
Digital Input/Output
Control Interface Data Input / 2-wire Acknowledge output
32
SCLK
Digital Input
Control Interface Clock Input
Preliminary Technical Data
WM8955L
w
PTD Rev 2.0 June 2003
5
ABSOLUTE MAXIMUM RATINGS
Absolute Maximum Ratings are stress ratings only. Permanent damage to the device may be caused by continuously
operating at or beyond these limits. Device functional operating limits and guaranteed performance specifications are given
under Electrical Characteristics at the test conditions specified.
ESD Sensitive Device. This device is manufactured on a CMOS process. It is therefore generically
susceptible to damage from excessive static voltages. Proper ESD precautions must be taken during handling
and storage of this device.
Wolfson tests its package types according to IPC/JEDEC J-STD-020A for Moisture Sensitivity to determine acceptable storage
conditions prior to surface mount assembly. These levels are:
MSL1 = unlimited floor life at <30
C / 85% Relative Humidity. Not normally stored in moisture barrier bag.
MSL2 = out of bag storage for 1 year at <30
C / 60% Relative Humidity. Supplied in moisture barrier bag.
MSL3 = out of bag storage for 168 hours at <30
C / 60% Relative Humidity. Supplied in moisture barrier bag.
CONDITION
MIN
MAX
Supply voltages
-0.3V
+3.63V
Voltage range digital inputs
DGND -0.3V
DBVDD +0.3V
Voltage range analogue inputs
AGND -0.3V
AVDD +0.3V
Operating temperature range, T
A
-25
C
+85
C
Storage temperature after soldering
-65
C
+150
C
Package body temperature (soldering 10 seconds)
+260
C
Package body temperature (soldering 2 minutes)
+183
C
Notes
1.
Analogue and digital grounds must always be within 0.3V of each other.
2.
All digital and analogue supplies are completely independent from each other.
RECOMMENDED OPERATING CONDITIONS
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Digital supply range (Core)
DCVDD
1.42
2.0
3.6
V
Digital supply range (Buffer)
DBVDD
1.8
2.0
3.6
V
Analogue supplies range
AVDD, HPVDD
1.8
2.0
3.6
V
Ground
DGND, AGND, HPGND
0
V
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