Document Outline
- WM8973L
- Stereo CODEC for Portable Audio Applications
- DESCRIPTION
- FEATURES
- APPLICATIONS
- BLOCK DIAGRAM
- TABLE OF CONTENTS
- PIN CONFIGURATION
- ORDERING INFORMATION
- PIN DESCRIPTION
- ABSOLUTE MAXIMUM RATINGS
- RECOMMENDED OPERATION CONDITIONS
- ELECTRICAL CHARACTERISTICS
- OUTPUT PGAS LINEARITY
- HEADPHONE OUTPUT THD VERSUS POWER
- POWER CONSUMPTION
- SIGNAL TIMING REQUIREMENTS
- AUDIO INTERFACE TIMING SLAVE MODE
- AUDIO INTERFACE TIMING MASTER MODE
- SYSTEM CLOCK TIMING
- DEVICE DESCRIPTION
- POWER MANAGEMENT
- POWER SUPPLIES
- CONTROL INTERFACE
- CLOCKING AND SAMPLE RATES
- AUDIO INTERFACE CONTROL
- HEADPHONE OUTPUT
- THERMAL SHUTDOWN
- HEADPHONE SWITCH
- ENABLING THE OUTPUTS
- ANALOGUE OUTPUTS
- OUTPUT SIGNAL PATH
- 3D STEREO ENHANCEMENT
- AUTOMATIC LEVEL CONTROL (ALC)
- INPUT SIGNAL PATH
- INTRODUCTION
- REGISTER MAP
- DIGITAL FILTER CHARACTERISTICS
- HIGHPASS FILTER
- DE-EMPHASIS FILTER RESPONSES
- ADC FILTER RESPONSES
- DAC FILTER RESPONSES
- TERMINOLOGY
- APPLICATIONS INFORMATION
- POWER MANAGEMENT EXAMPLES
- RECOMMENDED EXTERNAL COMPONENTS
- LINE INPUT CONFIGURATION
- MICROPHONE INPUT CONFIGURATION
- MINIMISING POP NOISE AT THE ANALOGUE OUTPUTS
- PACKAGE DIMENSIONS
- IMPORTANT NOTICE
- ADDRESS:
w
WM8973L
Stereo CODEC for Portable Audio Applications
WOLFSON MICROELECTRONICS plc
www.wolfsonmicro.com
Advanced Information, July 2004, Rev 3.2
Copyright
2004 Wolfson Microelectronics plc
DESCRIPTION
The WM8973L is a low power, high quality stereo CODEC
designed for portable digital audio applications.
The device integrates complete interfaces to stereo or mono
microphones and a stereo headphone. External component
requirements are drastically reduced as no separate
microphone or headphone amplifiers are required.
Advanced on-chip digital signal processing performs
graphic equaliser, 3-D sound enhancement and automatic
level control for the microphone or line input.
The WM8973L can operate as a master or a slave, with
various master clock frequencies including 12 or 24MHz for
USB devices, or standard 256f
s
rates like 12.288MHz and
24.576MHz. Different audio sample rates such as 96kHz,
48kHz, 44.1kHz are generated directly from the master
clock without the need for an external PLL.
The WM8973L operates at supply voltages down to 1.8V,
although the digital core can operate at voltages down to
1.42V to save power, and the maximum for all supplies is
3.6 Volts. Different sections of the chip can also be powered
down under software control.
The WM8973L is supplied in a very small and thin 5x5mm
QFN package, ideal for use in hand-held and portable
systems.
FEATURES
DAC SNR 98dB (`A' weighted), THD 84dB at 48kHz, 3.3V
ADC SNR 95dB (`A' weighted), THD -82dB at 48kHz, 3.3V
Complete Stereo / Mono Microphone Interface
- Programmable ALC / Noise Gate
On-chip 400mW BTL Speaker Driver (mono)
On-chip
Headphone
Driver
-
>40mW output power on 16
/ 3.3V
-
THD 80dB at 20mW, SNR 90dB with 16
load
-
No DC blocking capacitors required (capless mode)
Separately mixed mono output
Digital Graphic Equaliser
Low
Power
-
7mW stereo playback (1.8V / 1.5V supplies)
-
14mW record & playback (1.8V / 1.5V supplies)
Low Supply Voltages
-
Analogue 1.8V to 3.6V
-
Digital core: 1.42V to 3.6V
-
Digital I/O: 1.8V to 3.6V
256fs / 384fs or USB master clock rates: 12MHz, 24MHz
Audio sample rates: 8, 11.025, 16, 22.05, 24, 32, 44.1, 48,
88.2, 96kHz generated internally from master clock
5x5x0.9mm QFN package
APPLICATIONS
MP3 Player / Recorder
AAC/WMA/Multi-Format Player / Recorder
Minidisc Player / Recorder
Portable Digital Music Systems
BLOCK DIAGRAM
WM8973L
Advanced Information
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AI Rev 3.2 July 2004
2
TABLE OF CONTENTS
DESCRIPTION .......................................................................................................1
FEATURES.............................................................................................................1
APPLICATIONS .....................................................................................................1
BLOCK DIAGRAM .................................................................................................1
TABLE OF CONTENTS .........................................................................................2
PIN CONFIGURATION...........................................................................................4
ORDERING INFORMATION ..................................................................................4
PIN DESCRIPTION ................................................................................................5
ABSOLUTE MAXIMUM RATINGS .........................................................................6
RECOMMENDED OPERATION CONDITIONS .....................................................6
ELECTRICAL CHARACTERISTICS ......................................................................7
OUTPUT PGA'S LINEARITY ......................................................................................... 9
HEADPHONE OUTPUT THD VERSUS POWER......................................................... 10
POWER CONSUMPTION............................................................................................ 11
SIGNAL TIMING REQUIREMENTS .....................................................................12
SYSTEM CLOCK TIMING............................................................................................ 12
AUDIO INTERFACE TIMING MASTER MODE ......................................................... 12
AUDIO INTERFACE TIMING SLAVE MODE ............................................................ 13
DEVICE DESCRIPTION .......................................................................................16
INTRODUCTION.......................................................................................................... 16
INPUT SIGNAL PATH.................................................................................................. 16
AUTOMATIC LEVEL CONTROL (ALC) ....................................................................... 23
3D STEREO ENHANCEMENT..................................................................................... 26
OUTPUT SIGNAL PATH.............................................................................................. 27
ANALOGUE OUTPUTS ............................................................................................... 32
ENABLING THE OUTPUTS ......................................................................................... 34
HEADPHONE SWITCH ............................................................................................... 34
THERMAL SHUTDOWN .............................................................................................. 36
HEADPHONE OUTPUT ............................................................................................... 36
DIGITAL AUDIO INTERFACE...................................................................................... 37
AUDIO INTERFACE CONTROL .................................................................................. 40
CLOCKING AND SAMPLE RATES .............................................................................. 41
CONTROL INTERFACE .............................................................................................. 43
POWER SUPPLIES ..................................................................................................... 44
POWER MANAGEMENT ............................................................................................. 45
REGISTER MAP...................................................................................................47
DIGITAL FILTER CHARACTERISTICS ...............................................................48
TERMINOLOGY........................................................................................................... 48
DAC FILTER RESPONSES ......................................................................................... 49
ADC FILTER RESPONSES ......................................................................................... 50
DE-EMPHASIS FILTER RESPONSES ........................................................................ 51
HIGHPASS FILTER ..................................................................................................... 52
Advanced Information
WM8973L
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AI Rev 3.2 July 2004
3
APPLICATIONS INFORMATION .........................................................................53
RECOMMENDED EXTERNAL COMPONENTS........................................................... 53
LINE INPUT CONFIGURATION................................................................................... 54
MICROPHONE INPUT CONFIGURATION .................................................................. 54
MINIMISING POP NOISE AT THE ANALOGUE OUTPUTS ........................................ 55
POWER MANAGEMENT EXAMPLES ......................................................................... 55
IMPORTANT NOTICE ..........................................................................................57
ADDRESS:................................................................................................................... 57
WM8973L
Advanced Information
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AI Rev 3.2 July 2004
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PIN CONFIGURATION
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
25
26
27
28
29
30
31
32
DACD
AT
BC
L
K
DC
VDD
DGND
D
BVDD
MC
L
K
DACL
R
C
OUT3
AV
D
D
VM
I
D
AG
ND
VR
E
F
MI
C
B
I
A
S
RI
NP
U
T
3 /
HP
D
E
T
E
C
T
HPGND
ADCLRC
MONOOUT
H
PVDD
ROUT1
LOUT1
ROUT2
LOUT2
A
DCDA
T
CSB
MODE
LINPUT2
LINPUT1
RINPUT1
RINPUT2
LI
N
P
U
T
3
SDIN
SCLK
ORDERING INFORMATION
ORDER CODE
TEMPERATURE RANGE
PACKAGE
MOISTURE
SENSITIVITY LEVEL
PEAK SOLDERING
TEMPERATURE
WM8973LGEFL/V
-25
C to +85
C
32-pin QFN (5x5x0.9mm)
(lead free)
MSL3 260
o
C
WM8973LGEFL/RV
-25
C to +85
C
32-pin QFN (5x5x0.9mm)
(lead free, tape and reel)
MSL3 260
o
C
Note:
Reel quantity = 3500
Advanced Information
WM8973L
w
AI Rev 3.2 July 2004
5
PIN DESCRIPTION
PIN NO
NAME
TYPE
DESCRIPTION
1 MCLK
Digital Input
Master Clock
2 DCVDD
Supply Digital
Core
Supply
3 DBVDD
Supply
Digital Buffer (I/O) Supply
4 DGND
Supply
Digital Ground (return path for both DCVDD and DBVDD)
5 BCLK
Digital Input / Output
Audio Interface Bit Clock
6 DACDAT
Digital Input
DAC Digital Audio Data
7 DACLRC
Digital Input / Output
Audio Interface Left / Right Clock/Clock Out
8 ADCDAT
Digital Output
ADC Digital Audio Data
9 ADCLRC
Digital Input / Output
Audio Interface Left / Right Clock
10 MONOOUT
Analogue Output
Mono Output
11 OUT3
Analogue Output
Analogue Output 3 (can be used as Headphone Pseudo Ground)
12 ROUT1
Analogue Output
Right Output 1 (Line or Headphone)
13 LOUT1
Analogue Output
Left Output 1 (Line or Headphone)
14 HPGND
Supply
Supply for Analogue Output Drivers (LOUT1/2, ROUT1/2)
15 ROUT2
Analogue Output
Right Output 1 (Line or Headphone or Speaker)
16 LOUT2
Analogue Output
Left Output 1 (Line or Headphone or Speaker)
17 HPVDD
Supply
Supply for Analogue Output Drivers (LOUT1/2, ROUT1/2,
MONOUT)
18 AVDD
Supply Analogue
Supply
19 AGND
Supply
Analogue Ground (return path for both AVDD and MVDD)
20 VREF
Analogue Output
Reference Voltage Decoupling Capacitor
21 VMID
Analogue Output
Midrail Voltage Decoupling Capacitor
22 MICBIAS
Analogue Output
Microphone Bias
23 RINPUT3
/
HPDETECT
Analogue Input
Right Channel Input 3 or Headphone Plug-in Detection
24 LINPUT3
Analogue Input
Left Channel Input 3
25 RINPUT2
Analogue Input
Right Channel Input 2
26 LINPUT2
Analogue Input
Left Channel Input 2
27 RINPUT1
Analogue Input
Right Channel Input 1
28
LINPUT1
Analogue Input
Left Channel Input 1
29 MODE
Digital Input
Control Interface Selection
30 CSB
Digital Input
Chip Select / Device Address Selection
31 SDIN
Digital Input/Output
Control Interface Data Input / 2-wire Acknowledge output
32
SCLK
Digital Input
Control Interface Clock Input
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